JP2000306762A - Multilayer ceramic capacitor - Google Patents

Multilayer ceramic capacitor

Info

Publication number
JP2000306762A
JP2000306762A JP11443799A JP11443799A JP2000306762A JP 2000306762 A JP2000306762 A JP 2000306762A JP 11443799 A JP11443799 A JP 11443799A JP 11443799 A JP11443799 A JP 11443799A JP 2000306762 A JP2000306762 A JP 2000306762A
Authority
JP
Japan
Prior art keywords
ceramic capacitor
multilayer ceramic
electrode layer
internal electrode
dielectric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11443799A
Other languages
Japanese (ja)
Inventor
Hidenori Katsumura
英則 勝村
Ryuichi Saito
隆一 斉藤
Hiroshi Kagata
博司 加賀田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP11443799A priority Critical patent/JP2000306762A/en
Publication of JP2000306762A publication Critical patent/JP2000306762A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To obtain a multiplayer ceramic capacitor, in which a high quality Q-factor can be attained in a high frequency region by specifying the thickness of an inner electrode layer. SOLUTION: In a multiplayer ceramic capacitor comprising a dielectric layer 1 and an inner electrode layer 2, the inner electrode layer 2 has a thickness of 12 μm or the inner electrode layer 2 principally comprises silver or copper and has thickness of 9 μm or larger. A dielectric magnetic composition, where the dielectric layer 1 principally comprises Bi2O3, Nb2O5, or Bi2O3, CaO, Nb2O5, or Bi2O3, CaO, ZnO, Nb2O5, or BaO, Re2O5 (Re is at least one kind selected from among Nd, Sm), TiO2 and glass is employed.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は積層セラミックコン
デンサ、特に高周波領域で使用される積層セラミックコ
ンデンサに関するものである。
The present invention relates to a multilayer ceramic capacitor, and more particularly to a multilayer ceramic capacitor used in a high frequency range.

【0002】[0002]

【従来の技術】図1は一般的な積層セラミックコンデン
サの断面を示したものである。
2. Description of the Related Art FIG. 1 shows a cross section of a general multilayer ceramic capacitor.

【0003】図1のように積層セラミックコンデンサ
は、誘電体層1と内部電極層2が交互に積層された素子
であり、かつ素子の両端で、内部電極層2を交互に接続
している一対の端子電極3とから構成されている。
As shown in FIG. 1, the multilayer ceramic capacitor is an element in which dielectric layers 1 and internal electrode layers 2 are alternately stacked, and a pair of internal electrodes 2 are alternately connected at both ends of the element. And the terminal electrode 3 of FIG.

【0004】従来、低容量で温度計数が小さい積層セラ
ミックコンデンサでは、誘電体層1に例えばBaO−N
23−TiO2を主成分とする誘電体磁気組成物など
焼成温度が1200℃以上の高温焼結材料が使用され、
また内部電極層2には誘電体磁気組成物の焼成温度の関
係から、パラジウムのような融点の高い貴金属材料が使
用されてきた。また内部電極層2の厚みは、価格あるい
は構造欠陥を防止する観点から、3μm以下と薄く抑え
られてきた。
Conventionally, in a multilayer ceramic capacitor having a low capacitance and a small temperature coefficient, for example, BaO-N
A high-temperature sintering material having a sintering temperature of 1200 ° C. or more, such as a dielectric magnetic composition containing d 2 O 3 —TiO 2 as a main component, is used.
In addition, a noble metal material having a high melting point, such as palladium, has been used for the internal electrode layer 2 because of the firing temperature of the dielectric magnetic composition. Further, the thickness of the internal electrode layer 2 has been suppressed to a small value of 3 μm or less from the viewpoint of cost or prevention of structural defects.

【0005】[0005]

【発明が解決しようとする課題】ところで近年、携帯電
話など高周波領域の電磁波を利用する通信システムの進
展が著しい。この進展に伴い、積層セラミックコンデン
サに対しても高周波領域への対応が求められており、特
にQ値を高める必要がある。Q値を高めるためには、内
部電極層2の高周波領域における電気抵抗値を小さくす
る必要があるが、従来の積層セラミックコンデンサでは
内部電極層2の厚みは一般的に3μm以下と薄く、また
内部電極層2に電気抵抗が比較的大きいパラジウムを用
いているため、例えば静電容量3.0pFの積層セラミ
ックコンデンサの周波数1GHzにおけるQ値は、せい
ぜい200程度と低い。
In recent years, communication systems utilizing electromagnetic waves in a high-frequency region such as mobile phones have made remarkable progress. With this development, multilayer ceramic capacitors are also required to be compatible with a high frequency region, and in particular, it is necessary to increase the Q value. In order to increase the Q value, it is necessary to reduce the electric resistance of the internal electrode layer 2 in a high frequency region. However, in the conventional multilayer ceramic capacitor, the thickness of the internal electrode layer 2 is generally as thin as 3 μm or less. Since palladium having relatively large electric resistance is used for the electrode layer 2, the Q value at a frequency of 1 GHz of a multilayer ceramic capacitor having a capacitance of, for example, 3.0 pF is as low as about 200 at most.

【0006】本発明は前記従来の問題を解決するため、
特に高周波領域において高いQ値を有する積層セラミッ
クコンデンサを提供することを目的としている。
The present invention solves the above-mentioned conventional problems.
In particular, it is an object of the present invention to provide a multilayer ceramic capacitor having a high Q value in a high frequency region.

【0007】[0007]

【課題を解決するための手段】上記目的を達成するため
に本発明は、誘電体層と内部電極層を備えた積層セラミ
ックコンデンサにおいて、内部電極層の厚みを12μm
以上とした構成、あるいは内部電極層の主成分を銀また
は銅とし、かつ内部電極層の厚みを9μm以上とした構
成である。この構成により、内部電極層の電気抵抗値を
下げ、特に高周波領域で高いQ値を有する積層セラミッ
クコンデンサを得ることができる。
According to the present invention, there is provided a multilayer ceramic capacitor having a dielectric layer and an internal electrode layer, the internal electrode layer having a thickness of 12 μm.
The above configuration or a configuration in which the main component of the internal electrode layer is silver or copper and the thickness of the internal electrode layer is 9 μm or more. With this configuration, it is possible to reduce the electric resistance value of the internal electrode layer and obtain a multilayer ceramic capacitor having a high Q value particularly in a high frequency region.

【0008】[0008]

【発明の実施の形態】本発明の請求項1に記載の発明
は、誘電体層と内部電極層を備えた積層セラミックコン
デンサにおいて、内部電極層の厚みを12μm以上とし
たものであり、高周波領域において高いQ値を有する積
層セラミックコンデンサを得ることができるという作用
を有する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to claim 1 of the present invention is directed to a multilayer ceramic capacitor having a dielectric layer and an internal electrode layer, wherein the thickness of the internal electrode layer is set to 12 μm or more, In this case, a multilayer ceramic capacitor having a high Q value can be obtained.

【0009】本発明の請求項2に記載の発明は、誘電体
層と内部電極層を備えた積層セラミックコンデンサにお
いて、内部電極層の主成分を銀または銅とし、かつ厚み
を9μm以上としたものであり、高周波領域において高
いQ値を有するセラミックコンデンサを得ることができ
るという作用を有する。
According to a second aspect of the present invention, there is provided a multilayer ceramic capacitor having a dielectric layer and an internal electrode layer, wherein the main component of the internal electrode layer is silver or copper and the thickness is 9 μm or more. This has the effect that a ceramic capacitor having a high Q value in a high frequency region can be obtained.

【0010】請求項3に記載の発明は、誘電体層をBi
23、Nb25を主成分とする誘電体磁気組成物とした
ものであり、高周波領域において極めて高いQ値を有
し、かつ静電容量の温度計数が小さい積層セラミックコ
ンデンサを得ることができるという作用を有する。
According to a third aspect of the present invention, the dielectric layer is made of Bi.
A dielectric ceramic composition containing 2 O 3 and Nb 2 O 5 as main components, to obtain a multilayer ceramic capacitor having an extremely high Q value in a high frequency region and a small temperature coefficient of capacitance. It has the effect of being able to.

【0011】請求項4に記載の発明は、誘電体層をBi
23、CaO、Nb25を主成分とする誘電体磁気組成
物としたものであり、高周波領域において極めて高いQ
値を有し、かつ静電容量の温度計数が小さい積層セラミ
ックコンデンサを得ることができるという作用を有す
る。
According to a fourth aspect of the present invention, the dielectric layer is made of Bi.
This is a dielectric magnetic composition containing 2 O 3 , CaO, and Nb 2 O 5 as main components, and has a very high Q in a high frequency region.
This has the effect that a multilayer ceramic capacitor having a small value and a small temperature coefficient of capacitance can be obtained.

【0012】請求項5に記載の発明は、誘電体層をBi
23、CaO、ZnO、Nb25を主成分とする誘電体
磁気組成物としたものであり、高周波領域において極め
て高いQ値を有し、かつ静電容量の温度計数が小さい積
層セラミックコンデンサを得ることができるという作用
を有する。
According to a fifth aspect of the present invention, the dielectric layer is made of Bi.
Multilayer ceramic having a dielectric magnetic composition containing 2 O 3 , CaO, ZnO, and Nb 2 O 5 as main components, having an extremely high Q value in a high frequency range and a small temperature coefficient of capacitance. It has the effect that a capacitor can be obtained.

【0013】請求項6に記載の発明は、誘電体層をBa
O、Re25(ReはNd,Smから選ばれる少なくと
も一種類)、TiO2およびガラスを主成分とする誘電
体磁気組成物としたものであり、高周波領域において極
めて高いQ値を有し、かつ静電容量の温度計数が小さい
積層セラミックコンデンサを得ることができるという作
用を有する。
According to a sixth aspect of the present invention, the dielectric layer is made of Ba.
O, Re 2 O 5 (where Re is at least one selected from Nd and Sm), a dielectric magnetic composition containing TiO 2 and glass as main components, and having an extremely high Q value in a high frequency region. In addition, there is an effect that a multilayer ceramic capacitor having a small capacitance temperature coefficient can be obtained.

【0014】請求項7に記載の発明は、誘電体層をAl
23、Ln25(LnはLa,Ce,Nd,Sm,E
u,Gd,Tbから選ばれる少なくとも一種類)、Mg
Oおよびガラスを主成分とする誘電体磁気組成物とした
ものであり、高周波領域において極めて高いQ値を有
し、かつ静電容量の温度計数が小さい積層セラミックコ
ンデンサを得ることができるという作用を有する。
According to a seventh aspect of the present invention, the dielectric layer is made of Al.
2 O 3 , Ln 2 O 5 (Ln is La, Ce, Nd, Sm, E
u, Gd, Tb), Mg
This is a dielectric magnetic composition containing O and glass as main components, and has an extremely high Q value in a high-frequency region and an effect of obtaining a multilayer ceramic capacitor having a small temperature coefficient of capacitance. Have.

【0015】次に、本発明の具体的な実施の形態につい
て述べる。積層セラミックコンデンサとしての構成は図
1に示すものとほとんど同一のため同じ符号を用いて説
明する。
Next, specific embodiments of the present invention will be described. Since the configuration of the multilayer ceramic capacitor is almost the same as that shown in FIG. 1, the description will be made using the same reference numerals.

【0016】誘電体層1を構成する誘電体磁気組成物
は、BaO,Nd25,TiO2,Sm23を主成分と
する系(以下BNTと記す)、Bi23,Nb25を主
成分とする系(以下BNと記す)、Bi23,CaO,
Nb25を主成分とする系(以下BCNと記す)、Bi
23,CaO,ZnO,Nb25を主成分とする系(以
下BCZNと記す)、BaO,Nd25,TiO2,S
23を主成分とするセラミック粉末にPbO,SiO
2,B23を主成分とするガラスを混合した系(以下B
NTGと記す)、Al23,MgO,Sm23を主成分
とするセラミック粉末にPbO,SiO2,B23を主
成分とするガラスを混合した系(以下AMSGと記す)
の六種類である。
The dielectric magnetic composition constituting the dielectric layer 1 includes a system mainly composed of BaO, Nd 2 O 5 , TiO 2 , and Sm 2 O 3 (hereinafter referred to as BNT), Bi 2 O 3 , Nb A system containing 2 O 5 as a main component (hereinafter referred to as BN), Bi 2 O 3 , CaO,
A system containing Nb 2 O 5 as a main component (hereinafter referred to as BCN), Bi
A system mainly composed of 2 O 3 , CaO, ZnO, and Nb 2 O 5 (hereinafter referred to as BCZN), BaO, Nd 2 O 5 , TiO 2 , S
PbO, SiO 2 is added to ceramic powder containing m 2 O 3 as a main component.
2 , B 2 O 3 mixed glass (hereinafter referred to as B
NTG), a system in which a glass mainly containing PbO, SiO 2 and B 2 O 3 is mixed with a ceramic powder mainly containing Al 2 O 3 , MgO and Sm 2 O 3 (hereinafter referred to as AMSG)
There are six types.

【0017】(表1)は各誘電体磁気組成物の焼成温度
範囲と高周波帯域における電気特性を示したものであ
る。BNTは焼成温度が約1300℃と高いため、内部
電極層2にはパラジウムなどを主成分とする低導電率で
高融点の金属しか用いることができない。一方BN,B
CN,BCZN,BNTG,AMSGの焼成温度はいず
れも1100℃以下と低いため、銀、銅を主成分とする
高導電率で低融点の金属も使用できる。
Table 1 shows the firing temperature range of each dielectric magnetic composition and the electrical characteristics in a high frequency band. Since the baking temperature of BNT is as high as about 1300 ° C., only a low-conductivity and high-melting-point metal mainly composed of palladium or the like can be used for the internal electrode layer 2. On the other hand, BN, B
Since the firing temperature of CN, BCZN, BNTG, and AMSG is as low as 1100 ° C. or less, a metal having a high conductivity and a low melting point containing silver and copper as main components can also be used.

【0018】[0018]

【表1】 [Table 1]

【0019】これらの各誘電体粉末を酢酸ブチルにジブ
チルフタレート、ポリビニルブチラール樹脂を溶かした
溶液中に加え、ボールミルで24時間混合した。得られ
たスラリーからドクターブレード法などにより厚さ約4
0μmの誘電体グリーンシートを得た。
Each of these dielectric powders was added to a solution of dibutyl phthalate and polyvinyl butyral resin in butyl acetate, and mixed in a ball mill for 24 hours. A thickness of about 4 is obtained from the obtained slurry by a doctor blade method or the like.
A 0 μm dielectric green sheet was obtained.

【0020】一方、銀、銅、パラジウム各金属粉末と、
エチルセルロースをブチルカルビトールに溶解させたビ
ヒクルを混合し、更に三本ロールミルを用いて混練する
ことによって内部電極層用の導電性ペーストを得た。
On the other hand, silver, copper and palladium metal powders,
A vehicle in which ethyl cellulose was dissolved in butyl carbitol was mixed and kneaded using a three-roll mill to obtain a conductive paste for an internal electrode layer.

【0021】上記グリーンシートの表面にこの導電ペー
ストを矩形状の内部電極パターンを有するスクリーン版
を用いて印刷し、乾燥させた。このとき内部電極層2の
厚みを、スクリーン版の製版条件、導電性ペーストの金
属粉末の粒径、金属粉末とビヒクルの混合比率およびペ
ースト粘度を調整することにより変化させた。
This conductive paste was printed on the surface of the green sheet using a screen plate having a rectangular internal electrode pattern, and dried. At this time, the thickness of the internal electrode layer 2 was changed by adjusting the plate making conditions of the screen plate, the particle diameter of the metal powder of the conductive paste, the mixing ratio of the metal powder and the vehicle, and the paste viscosity.

【0022】次に図1に示した構成となるようグリーン
シートと内部電極層2を積層する。すなわち、内部電極
層2が印刷されていないグリーンシートを複数枚積層し
た後、内部電極層2が印刷されたグリーンシートを位置
をあわせながら複数枚交互に積層し、さらに内部電極層
2が印刷されていないグリーンシートを複数枚積層し
た。この積層ブロックを40℃の温度で300kg/c
2の圧力により圧着し、格子状に切断した。なお焼成
後の静電容量が約3.0pFとなるよう、積層数と内部
電極層2の重なり面積を調整した。
Next, the green sheet and the internal electrode layer 2 are laminated so as to have the structure shown in FIG. That is, after laminating a plurality of green sheets on which the internal electrode layers 2 are not printed, a plurality of the green sheets on which the internal electrode layers 2 are printed are alternately laminated while aligning the positions, and further the internal electrode layers 2 are printed. Green sheets were stacked. 300 kg / c at 40 ° C.
It was crimped under a pressure of m 2 and cut into a grid. The number of layers and the overlapping area of the internal electrode layers 2 were adjusted so that the capacitance after firing was about 3.0 pF.

【0023】内部電極層2に銅を用いた素子は窒素−水
蒸気雰囲気で、銀、パラジウムを用いた素子は大気雰囲
気中で600℃−2時間処理して有機バインダを焼却
し、その後窒素雰囲気に切り替え、各誘電体磁気組成物
に適した温度まで昇温し、2時間保持することにより焼
成した。
A device using copper for the internal electrode layer 2 is treated in a nitrogen-water vapor atmosphere, and a device using silver and palladium is treated at 600 ° C. for 2 hours in an air atmosphere to incinerate the organic binder, and then to a nitrogen atmosphere. Switching was performed, the temperature was raised to a temperature suitable for each dielectric magnetic composition, and firing was performed by holding for 2 hours.

【0024】この焼成体素子の側面に、銀あるいは銅と
ガラスフリット、ビヒクルからなる端子電極用導電ペー
ストを塗布して焼き付け、端子電極3を形成した。
A terminal electrode 3 was formed by applying and baking a terminal electrode conductive paste made of silver or copper, glass frit and vehicle on the side surface of the fired device.

【0025】(表2)は上述の工程で作製した積層セラ
ミックコンデンサの誘電体材料、内部電極材料と焼成後
の厚みおよび各電気特性を示したものである。なお内部
電極層2の厚みは、素子の断面を研磨し光学顕微鏡で観
察することにより測定した。また積層セラミックコンデ
ンサの1GHzにおける容量値およびQ値は、インピー
ダンスアナライザを用いて測定した。
Table 2 shows the dielectric material, the internal electrode material, the thickness after firing, and the respective electrical characteristics of the multilayer ceramic capacitor manufactured in the above-described steps. Note that the thickness of the internal electrode layer 2 was measured by polishing a cross section of the element and observing it with an optical microscope. The capacitance value and Q value of the multilayer ceramic capacitor at 1 GHz were measured using an impedance analyzer.

【0026】[0026]

【表2】 [Table 2]

【0027】試料番号1のように誘電体層1がBNT、
内部電極層2がパラジウム、その厚みが3μmと言う従
来の積層セラミックコンデンサでは、容量値3.0pF
におけるQ値は190と低いが、内部電極層2を厚くす
るとQ値は上昇し、試料番号3のように12μmとなる
とQ値は400に達する。
As shown in Sample No. 1, the dielectric layer 1 is made of BNT,
In a conventional multilayer ceramic capacitor in which the internal electrode layer 2 is palladium and its thickness is 3 μm, the capacitance value is 3.0 pF.
Is as low as 190, but as the internal electrode layer 2 is made thicker, the Q value rises, and reaches 12 at 12 μm as in Sample No. 3, and reaches 400.

【0028】また、試料番号4〜6のように誘電体層1
がBCN、内部電極層2が銀の場合、電極厚みが5μm
と本発明の範囲外のQ値は280とやや低いが、9μm
以上とすることにより400を越えるようになる。
As shown in Sample Nos. 4 to 6, the dielectric layer 1
Is BCN and the internal electrode layer 2 is silver, the electrode thickness is 5 μm
And the Q value outside the range of the present invention is slightly lower at 280, but 9 μm
By doing so, the number exceeds 400.

【0029】また、試料番号7,8のように内部電極層
2が銅の場合、試料番号9〜14のように誘電体層1を
BN,BCZN,BNTG,AMSGとした場合におい
ても、内部電極層2が銀、銅の場合はその厚みが9μm
以上、パラジウムの場合は12μm以上であれば、容量
値3.0pFにおけるQ値は400以上と大きな値が得
られる。
Further, even when the internal electrode layer 2 is made of copper as in Sample Nos. 7 and 8, the dielectric layer 1 is made of BN, BCZN, BNTG and AMSG as in Sample Nos. 9 to 14, When the layer 2 is silver or copper, its thickness is 9 μm.
As described above, in the case of palladium, if it is 12 μm or more, the Q value at a capacitance value of 3.0 pF is as large as 400 or more.

【0030】また、誘電体層1にBN,BCZN,BN
TG,AMSGを用いた積層セラミックコンデンサは、
焼成温度が低いため内部電極層2に導電率の高い銀ある
いは銅を使用できるだけでなく、静電容量の温度係数が
いずれも±60ppm/℃以内と小さく、極めて電気特
性の優れた積層セラミックコンデンサが得られた。
Further, BN, BCZN, BN
Multilayer ceramic capacitors using TG and AMSG
Since the firing temperature is low, not only can silver or copper having high conductivity be used for the internal electrode layer 2, but also the temperature coefficient of capacitance is as small as ± 60 ppm / ° C. or less, and a multilayer ceramic capacitor having extremely excellent electric characteristics can be obtained. Obtained.

【0031】なお、上述の実施の形態は一例であり、実
施の形態に限定されるものではない。例えば誘電体層1
に使用可能な他の材料として、金や白金などを挙げるこ
とができ、また誘電体層1に使用可能な他の材料とし
て、MgO−CaO−TiO2系などが挙げられる。
The above embodiment is an example, and the present invention is not limited to the embodiment. For example, dielectric layer 1
Examples of other materials that can be used for the dielectric layer include gold and platinum, and examples of other materials that can be used for the dielectric layer 1 include an MgO—CaO—TiO 2 system.

【0032】[0032]

【発明の効果】以上説明したように本発明によれば、内
部電極層の厚みを12μm以上とした構成あるいは内部
電極層の主成分を銀または銅とし、かつ内部電極層の厚
みを9μm以上とした構成により、内部電極層の電気抵
抗値を下げ、高周波領域で極めて高いQ値を有する積層
セラミックコンデンサを得ることができる。
As described above, according to the present invention, the internal electrode layer has a thickness of 12 μm or more, or the main component of the internal electrode layer is silver or copper, and the internal electrode layer has a thickness of 9 μm or more. With this configuration, it is possible to reduce the electric resistance of the internal electrode layer and obtain a multilayer ceramic capacitor having an extremely high Q value in a high frequency region.

【0033】さらに本発明の好ましい例によれば、高周
波領域で高いQ値を有し、かつ静電容量値の温度係数が
±60ppm/℃以内と小さい積層セラミックコンデン
サを得ることができる。
Further, according to the preferred embodiment of the present invention, it is possible to obtain a multilayer ceramic capacitor having a high Q value in a high frequency region and a small temperature coefficient of the capacitance value within ± 60 ppm / ° C.

【図面の簡単な説明】[Brief description of the drawings]

【図1】一般的な積層コンデンサの断面図FIG. 1 is a cross-sectional view of a general multilayer capacitor.

【符号の説明】[Explanation of symbols]

1 誘電体層 2 内部電極層 3 端子電極 Reference Signs List 1 dielectric layer 2 internal electrode layer 3 terminal electrode

───────────────────────────────────────────────────── フロントページの続き (72)発明者 加賀田 博司 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 Fターム(参考) 5E001 AB03 AC09 AC10 AE00 AE02 AE03 AE04 AF00 AF06 AH01 AH05 AH09 AJ01 5E082 AA01 AB03 BB05 BC40 EE04 EE23 EE26 EE35 FG06 FG22 FG25 FG26 FG27 FG54 GG10 GG11 GG28 HH43 JJ03 JJ12 JJ23 LL02 MM22 MM24 PP09 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hiroshi Kagata 1006 Kazuma Kadoma, Kadoma-shi, Osaka Matsushita Electric Industrial Co., Ltd.F-term (reference) BB05 BC40 EE04 EE23 EE26 EE35 FG06 FG22 FG25 FG26 FG27 FG54 GG10 GG11 GG28 HH43 JJ03 JJ12 JJ23 LL02 MM22 MM24 PP09

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 誘電体層と内部電極層を備えた積層セラ
ミックコンデンサにおいて、内部電極層の厚みを12μ
m以上とした積層セラミックコンデンサ。
In a multilayer ceramic capacitor having a dielectric layer and an internal electrode layer, the internal electrode layer has a thickness of 12 μm.
m or more.
【請求項2】 誘電体層と内部電極層を備えた積層セラ
ミックコンデンサにおいて、内部電極層の主成分が銀ま
たは銅であり、かつ厚みを9μm以上とした積層セラミ
ックコンデンサ。
2. A multilayer ceramic capacitor comprising a dielectric layer and an internal electrode layer, wherein the main component of the internal electrode layer is silver or copper and the thickness is 9 μm or more.
【請求項3】 誘電体層をBi23、Nb25を主成分
とする誘電体磁気組成物とした請求項1または2に記載
の積層セラミックコンデンサ。
3. The multilayer ceramic capacitor according to claim 1, wherein the dielectric layer is a dielectric magnetic composition containing Bi 2 O 3 and Nb 2 O 5 as main components.
【請求項4】 誘電体層をBi23、CaO、Nb25
を主成分とする誘電体磁気組成物とした請求項1または
2に記載の積層セラミックコンデンサ。
4. The dielectric layer is made of Bi 2 O 3 , CaO, Nb 2 O 5
3. The multilayer ceramic capacitor according to claim 1, wherein the dielectric ceramic composition is mainly composed of:
【請求項5】 誘電体層をBi23、CaO、ZnO、
Nb25を主成分とする誘電体磁気組成物とした請求項
1または2に記載の積層セラミックコンデンサ。
5. The dielectric layer is made of Bi 2 O 3 , CaO, ZnO,
The multilayer ceramic capacitor according to claim 1 or 2 as a dielectric magnetic composition whose main component is nb 2 O 5.
【請求項6】 誘電体層をBaO、Re25(ReはN
d,Smから選ばれる少なくとも一種類)、TiO2
よびガラスを主成分とする誘電体磁気組成物とした請求
項1または2に記載の積層セラミックコンデンサ。
6. The dielectric layer is made of BaO, Re 2 O 5 (Re is N
3. The multilayer ceramic capacitor according to claim 1, wherein the dielectric ceramic composition comprises at least one of d and Sm), TiO 2, and glass.
【請求項7】 誘電体層をAl23、Ln25(Lnは
La,Ce,Nd,Sm,Eu,Gd,Tbから選ばれ
る少なくとも一種類)、MgOおよびガラスを主成分と
する誘電体磁気組成物とした請求項1または2に記載の
積層セラミックコンデンサ。
7. The dielectric layer is mainly composed of Al 2 O 3 , Ln 2 O 5 (Ln is at least one selected from La, Ce, Nd, Sm, Eu, Gd and Tb), MgO and glass. 3. The multilayer ceramic capacitor according to claim 1, wherein the multilayer ceramic capacitor is a dielectric magnetic composition.
JP11443799A 1999-04-22 1999-04-22 Multilayer ceramic capacitor Pending JP2000306762A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11443799A JP2000306762A (en) 1999-04-22 1999-04-22 Multilayer ceramic capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11443799A JP2000306762A (en) 1999-04-22 1999-04-22 Multilayer ceramic capacitor

Publications (1)

Publication Number Publication Date
JP2000306762A true JP2000306762A (en) 2000-11-02

Family

ID=14637720

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP2000306762A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7098160B2 (en) * 2003-08-07 2006-08-29 Matsushita Electric Industrial Co., Ltd. Dielectric ceramic composition and ceramic electronic component employing the same
DE10325008B4 (en) * 2003-06-03 2007-11-22 Epcos Ag Electrical component and its manufacture
CN100383899C (en) * 2003-01-30 2008-04-23 广东风华高新科技股份有限公司 High-frequency chip multilayer ceramic capacitor and method for making same
US8576538B2 (en) 2011-01-28 2013-11-05 Murata Manuacturing Co., Ltd. Electronic component and substrate module
JP2015176912A (en) * 2014-03-13 2015-10-05 エナジー・ストレージ・マテリアルズ合同会社 Solid ion capacitor and manufacturing method thereof
JP2015176911A (en) * 2014-03-13 2015-10-05 エナジー・ストレージ・マテリアルズ合同会社 Solid ion capacitor, and manufacturing method thereof
US10117333B2 (en) 2015-01-31 2018-10-30 Murata Manufacturing Co., Ltd. Multilayer ceramic capacitor, mounting structure of multilayer ceramic capacitor, and taped electronic component array
US10892102B2 (en) 2017-12-07 2021-01-12 Taiyo Yuden Co., Ltd. Multi-layer ceramic capacitor

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100383899C (en) * 2003-01-30 2008-04-23 广东风华高新科技股份有限公司 High-frequency chip multilayer ceramic capacitor and method for making same
DE10325008B4 (en) * 2003-06-03 2007-11-22 Epcos Ag Electrical component and its manufacture
US7098160B2 (en) * 2003-08-07 2006-08-29 Matsushita Electric Industrial Co., Ltd. Dielectric ceramic composition and ceramic electronic component employing the same
US8576538B2 (en) 2011-01-28 2013-11-05 Murata Manuacturing Co., Ltd. Electronic component and substrate module
JP2015176912A (en) * 2014-03-13 2015-10-05 エナジー・ストレージ・マテリアルズ合同会社 Solid ion capacitor and manufacturing method thereof
JP2015176911A (en) * 2014-03-13 2015-10-05 エナジー・ストレージ・マテリアルズ合同会社 Solid ion capacitor, and manufacturing method thereof
US10117333B2 (en) 2015-01-31 2018-10-30 Murata Manufacturing Co., Ltd. Multilayer ceramic capacitor, mounting structure of multilayer ceramic capacitor, and taped electronic component array
US10892102B2 (en) 2017-12-07 2021-01-12 Taiyo Yuden Co., Ltd. Multi-layer ceramic capacitor
US11367575B2 (en) 2017-12-07 2022-06-21 Taiyo Yuden Co., Ltd. Multi-layer ceramic capacitor

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