JP2000299396A - Manufacture of airtight sealing package - Google Patents
Manufacture of airtight sealing packageInfo
- Publication number
- JP2000299396A JP2000299396A JP11107457A JP10745799A JP2000299396A JP 2000299396 A JP2000299396 A JP 2000299396A JP 11107457 A JP11107457 A JP 11107457A JP 10745799 A JP10745799 A JP 10745799A JP 2000299396 A JP2000299396 A JP 2000299396A
- Authority
- JP
- Japan
- Prior art keywords
- side wall
- wall portion
- substrate
- uncured
- sealing material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/16251—Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、ＩＣ,ＬＳＩ用パ
ッケージ、発光素子を用いる表示体,照明,センサー用パ
ッケージ、受光素子を用いるセンサー,カメラ、ＣＣＤ
用パッケージ、フィラメントを用いる照明灯等のような
気密封止を必要とするパッケージの製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a package for ICs and LSIs, a display using light emitting elements, a package for lighting and sensors, a sensor using light receiving elements, a camera, and a CCD.
The present invention relates to a method for manufacturing a package that requires hermetic sealing, such as a package for use, an illumination lamp using a filament, and the like.
【０００２】[0002]
【従来技術】従来一般に、上記気密封止パッケージの製
造は、電子部品素子搭載の基板（又はリードフレーム）
上に、成形枠材の張り付け、その他金型成形手段等を適
用して、上記素子の周りに側壁としての枠部を形成し、
しかる後、該枠部上に光学的に透明乃至不透明の蓋材を
接着剤の適用下に被せ接着することにより行われてい
た。2. Description of the Related Art Conventionally, the hermetically sealed package is generally manufactured by a substrate (or a lead frame) on which electronic components are mounted.
Above, by applying a molding frame material, applying other mold molding means and the like, to form a frame portion as a side wall around the element,
Thereafter, an optically transparent or opaque lid material is applied over the frame portion by applying an adhesive, and the lid material is adhered.
【０００３】また、基板に、側壁としての枠部を形成す
る代わりに収納用ケースと呼ばれる凹部を形成し、該凹
部内に上記素子を収納搭載した後に、その上から蓋材を
接着剤の適用下に被せ接着するという製造方法も提案さ
れている。In addition, instead of forming a frame portion as a side wall, a recess called a storage case is formed on the substrate, and after the above-described element is stored and mounted in the recess, a lid material is applied from above by applying an adhesive. A manufacturing method in which the lower part is adhered and bonded has also been proposed.
【０００４】[0004]
【発明が解決しようとする課題】上記従来の製造方法で
は、接着剤適用による接着工程を含むために全体として
製造工程が複雑となり、生産効率の低下ひいては製造コ
スト高を招いていた。また蓋材を接着剤を使用して接着
しているために、接着部分からの水分の侵入を充分確実
に防止することが難しい上に、接着剤の滲みによる不具
合を発生し易く、品質,性能面での信頼性にも乏しかっ
た。However, in the above-mentioned conventional manufacturing method, the manufacturing process is complicated as a whole because the bonding process is performed by applying an adhesive, and the production efficiency is lowered and the manufacturing cost is increased. In addition, since the lid is bonded with an adhesive, it is difficult to prevent water from entering from the bonded part sufficiently, and it is easy to cause problems due to bleeding of the adhesive. The reliability in terms of surface was also poor.
【０００５】本発明は、製造工程の簡略化ひいては製造
の低コスト化が可能である上に品質,性能面での信頼性
の高い製品が得られる気密封止パッケージの製造方法を
提供することを目的としてなされたものである。An object of the present invention is to provide a method of manufacturing a hermetically sealed package capable of simplifying the manufacturing process and, at the same time, lowering the manufacturing cost and obtaining a highly reliable product in terms of quality and performance. It was made for the purpose.
【０００６】[0006]
【課題を解決するための手段】本発明は、基板上に搭載
された電子部品素子を該素子の周りに形成される側壁部
及び該側壁部上に被せられる蓋材を適用して気密封止す
るに際し、基板及び蓋材の少なくとも一方に、液状封止
材を用い孔版印刷手段を適用して未硬化側壁部を形成
し、しかる後、基板と蓋材とを未硬化側壁部を介し張り
合わせた状態で該未硬化側壁部を硬化させ、もって硬化
側壁部の形成と同時に該側壁部を構成している封止材の
接着材としての働きで基板と蓋材とを接着一体化するこ
とを特徴とする気密封止パッケージの製造方法に係る。SUMMARY OF THE INVENTION According to the present invention, an electronic component element mounted on a substrate is hermetically sealed by applying a side wall formed around the element and a lid material covering the side wall. In doing so, at least one of the substrate and the lid member, a stencil printing means was applied using a liquid sealing material to form an uncured side wall portion, and then the substrate and the lid member were bonded together via the uncured side wall portion. The uncured side wall portion is cured in the state, and the substrate and the lid material are bonded and integrated together with the formation of the cured side wall portion at the same time as the adhesive of the sealing material constituting the side wall portion. And a method for manufacturing a hermetically sealed package.
【０００７】更に本発明は、基板上に搭載された電子部
品素子を該素子の周りに形成される側壁部及び該側壁部
上に被せられる蓋材を適用して気密封止するに際し、基
板上に多数個の電子部品素子が相互間に間隔を存し且つ
縦横に列をなすように搭載されており、基板及び蓋材の
少なくとも一方に、液状封止材を用い孔版印刷手段を適
用して未硬化側壁部を電子部品素子の各々の周りを取り
囲むように格子状に形成し、しかる後、基板と蓋材とを
該未硬化側壁部を介し張り合わせた状態で該側壁部を硬
化させ、もって格子状硬化側壁部の形成と同時に該側壁
部を構成している封止材の接着材としての働きで基板と
蓋材とを接着一体化し、次いで基板並びに蓋材を格子状
側壁部の縦横の中心線に沿って分断し多数個取りするこ
とを特徴とする気密封止パッケージの製造方法に係る。Further, according to the present invention, when an electronic component element mounted on a substrate is hermetically sealed by applying a side wall formed around the element and a cover material covering the side wall, A large number of electronic component elements are mounted so as to be spaced apart from each other and form rows and columns, and at least one of the substrate and the lid member, using a stencil printing means using a liquid sealing material, The uncured side wall portion is formed in a lattice shape so as to surround each of the electronic component elements, and thereafter, the side wall portion is cured in a state where the substrate and the lid member are stuck together via the uncured side wall portion, and Simultaneously with the formation of the lattice-shaped cured side wall portion, the substrate and the lid material are bonded and integrated by acting as an adhesive of the sealing material constituting the side wall portion, and then the substrate and the lid material are vertically and horizontally aligned with the lattice-shaped side wall portion. It is characterized by dividing along the center line and taking many pieces According to the method of manufacturing a sealed package.
【０００８】本発明製造方法によれば、未硬化側壁部の
形成のための孔版印刷を、真空雰囲気下で行うことが出
来る。According to the manufacturing method of the present invention, stencil printing for forming an uncured side wall portion can be performed in a vacuum atmosphere.
【０００９】また、未硬化側壁部上への蓋材の被蓋を、
真空雰囲気下又は不活性ガスの充満雰囲気下で行うこと
ができる。In addition, the cover of the cover material on the uncured side wall portion is
It can be performed in a vacuum atmosphere or an atmosphere filled with an inert gas.
【００１０】また、電子部品素子として、発光素子を用
いる場合には、基板に対し未硬化側壁部が比較的粘度及
び/又は粘度比の小さい液状封止材を用いて孔版印刷に
より形成され、該側壁部は、未硬化状態での液状封止材
の下方への流動により底部側ほど漸進的に厚肉になり、
蓋材は光学的に透明でその裏面側に比較的高粘度及び/
又は高粘度比の液状封止材を用いて未硬化側壁補助部が
形成され、上記未硬化側壁部の流動による上部の量不足
が上記補助部によって補われる構成になっていてもよ
い。When a light emitting element is used as an electronic component element, an uncured side wall portion is formed by stencil printing using a liquid sealing material having a relatively low viscosity and / or viscosity ratio with respect to the substrate. The side wall gradually becomes thicker toward the bottom due to the downward flow of the liquid sealing material in the uncured state,
The lid material is optically transparent and has a relatively high viscosity on the back side and / or
Alternatively, the uncured side wall auxiliary portion may be formed using a liquid sealing material having a high viscosity ratio, and the auxiliary portion may compensate for the shortage of the upper portion due to the flow of the uncured side wall portion.
【００１１】[0011]
【発明の実施の形態】以下に本発明の一実施形態を添付
図面に基づき説明する。図１〜８は本発明の多数個取り
製造方法の一実施形態を示し、本実施形態によれば、図
１に示すように、基板１上には、複数個の電子部品素子
２が搭載され、該素子２は、図４に示すように、相互間
に間隔部３を存して縦横に列をなしている。一方上記素
子２,２間の間隔部３は格子状となり、縦横に延出して
いる。An embodiment of the present invention will be described below with reference to the accompanying drawings. 1 to 8 show an embodiment of a multi-cavity manufacturing method according to the present invention. According to this embodiment, a plurality of electronic component elements 2 are mounted on a substrate 1 as shown in FIG. As shown in FIG. 4, the elements 2 are arranged in rows and columns with an interval 3 therebetween. On the other hand, the space 3 between the elements 2, 2 has a lattice shape and extends vertically and horizontally.
【００１２】図２〜４に示すように、上記基板１上に
は、格子状間隔部３と一致するように、液状封止材４１
を用い且つ孔版印刷手段を適用して、未硬化側壁部４１
ａが格子状に形成される。As shown in FIGS. 2 to 4, the liquid sealing material 41 is placed on the substrate 1 so as to coincide with the lattice-shaped space 3.
And by applying a stencil printing means, the uncured side wall 41
a is formed in a lattice shape.
【００１３】図２に示すように、孔版印刷に適用される
孔版５は、上記間隔部３と同一パターンで且つ間隔部３
より多少狭小幅の格子状通孔部６を備え、該通孔部６に
よって区画された孔版区画部５ａ,５ａ……には、それ
ぞれ下面側から上方へ凹入するザグリ部７が形成され、
該ザグリ部７内には、孔版印刷時に、電子部品素子２が
収納される。因みに、孔版区画部５ａ，５ａの相互は、
通孔部６を横切るように残された細幅のブリッジ部（図
示せず）により連結され、孔版５としての形態を保持し
ている。ブリッジ部は細幅であるので、孔版印刷への悪
影響はない。As shown in FIG. 2, the stencil 5 applied to stencil printing has the same pattern as
A stencil partitioning portion 5a, 5a,... Partitioned by the through-hole 6 is formed with a counterbore portion 7 that is recessed upward from the lower surface side.
The electronic component element 2 is accommodated in the counterbore portion 7 at the time of stencil printing. Incidentally, the stencil sections 5a, 5a
It is connected by a narrow bridge portion (not shown) left across the through hole 6, and retains the form as the stencil 5. Since the bridge portion is narrow, there is no adverse effect on stencil printing.
【００１４】図２に示す状態で、スキージ８の作動をし
て液状封止材４１を通孔部６内に押し込み充填し、しか
る後、孔版５を離脱することにより、図３,４に示すよ
うに、基板１の間隔部３の幅方向中央領域に液状封止材
４１からなる未硬化側壁部４１ａを格子状に形成するこ
とができる。格子状形成の未硬化側壁部４１ａは、図４
に示すように、電子部品素子２のそれぞれの周囲を枠状
に取り囲んでいる。In the state shown in FIG. 2, the squeegee 8 is actuated to push and fill the liquid sealing material 41 into the through-hole portion 6, and then the stencil 5 is detached, whereby the stencil 8 is detached as shown in FIGS. As described above, the uncured side wall portion 41 a made of the liquid sealing material 41 can be formed in a lattice shape in the center region in the width direction of the interval portion 3 of the substrate 1. The uncured side wall portion 41a formed in a lattice is shown in FIG.
As shown in the figure, the periphery of each of the electronic component elements 2 is framed.
【００１５】図５,６に示すように、未硬化側壁部４１
ａを形成した後は、蓋材９が該側壁部４１ａ上に被せら
れ、更にスペーサ１０を介在させた状態で、該側壁部４
１ａに対し押し付けられる。この押し付けにより、蓋材
９は未硬化側壁部４１ａのフラット上面の全面に均一に
密着される。蓋材９の押し付けをスペーサ１０を介在さ
せた状態で行うことにより、基板１と蓋材９との間の間
隔１１を一定に保持でき、押し付けに拘わらず未硬化側
壁部４１ａの高さの寸法精度を保持できる。As shown in FIGS. 5 and 6, the uncured side wall portion 41 is formed.
a, the lid member 9 is put on the side wall portion 41a, and with the spacer 10 interposed therebetween,
1a. By this pressing, the lid member 9 is uniformly brought into close contact with the entire flat upper surface of the uncured side wall portion 41a. By pressing the lid member 9 with the spacer 10 interposed therebetween, the distance 11 between the substrate 1 and the lid member 9 can be kept constant, and the dimension of the height of the uncured side wall portion 41a regardless of the pressing. Accuracy can be maintained.
【００１６】図６に示すように、未硬化側壁部４１ａ上
に蓋材９を施した後は、該側壁部４１ａの硬化が加熱炉
或いは乾燥炉を適用して行われる。As shown in FIG. 6, after the lid material 9 is provided on the uncured side wall 41a, the side wall 41a is cured by using a heating furnace or a drying furnace.
【００１７】未硬化側壁部４１ａを構成している液状封
止材４１は加熱により速やかに硬化し、電子部品素子２
の周りに硬化側壁部４が形成される。また封止材は本来
接着性に優れ、該封止材の接着剤としての働きで、硬化
側壁部４を介し基板１と蓋材９が強固に接着固定され
る。The liquid sealing material 41 constituting the uncured side wall portion 41a is quickly cured by heating, and
Is formed around the periphery of the substrate. Further, the sealing material is originally excellent in adhesiveness, and the substrate 1 and the lid material 9 are firmly bonded and fixed via the cured side wall portion 4 by the function of the sealing material as an adhesive.
【００１８】よって、本発明製造方法によれば、封止材
とは別に接着剤を使用したり、更には接着を別工程で行
うという必要がなくなり、接着剤の使用及び接着工程を
省くことができ、製造工程の簡略化ひいては生産効率の
向上を計ることができる。Therefore, according to the manufacturing method of the present invention, it is not necessary to use an adhesive separately from the sealing material, and it is not necessary to perform the bonding in a separate step, so that the use of the adhesive and the bonding step can be omitted. As a result, the manufacturing process can be simplified, and the production efficiency can be improved.
【００１９】液状封止材（未硬化側壁部）の硬化を終え
た後は、図７に示すように、基板１並びに蓋材９を硬化
側壁部４の部分で縦横の中心線Ｌ上を通るように分断す
ることにより、気密封止パッケージＡの多数個取りが可
能になる。After the curing of the liquid sealing material (uncured side wall portion) is completed, as shown in FIG. 7, the substrate 1 and the lid member 9 pass over the vertical and horizontal center lines L at the cured side wall portion 4. Such division makes it possible to take a large number of hermetically sealed packages A.
【００２０】液状封止材は、本来、電子部品素子２を機
械的,熱的ストレス,湿度等の外的要因から保護するため
に使用され、本発明では該封止材を側壁形成用に加え基
板１と蓋材９とを接着するための接着剤としても兼用し
ているので、接着部からの水分の侵入を安定確実に防止
することができ、高品質,高性能の製品が得られる。The liquid sealing material is originally used to protect the electronic component element 2 from external factors such as mechanical, thermal stress and humidity. In the present invention, the sealing material is used for forming the side wall. Since it is also used as an adhesive for bonding the substrate 1 and the lid member 9, it is possible to stably and surely prevent intrusion of moisture from the bonding portion, and to obtain a high quality and high performance product.
【００２１】図８は多数個取りされた製品を示し、上面
が平らで側面が垂直且つ直線の製品が得られる。FIG. 8 shows a product taken in large numbers. A product having a flat top surface, a vertical side surface and a straight line is obtained.
【００２２】尚、気密封止パッケージの製造は、上記多
数個取りに何等限定されず、該多数個取り製造に準じ
て、一個ずつの製造を行うことが出来る。The production of the hermetically sealed package is not limited to the above-described multi-cavity production, and the production of the hermetically sealed package can be performed one by one according to the multi-cavity production.
【００２３】図９〜１１は、電子部品素子２として発光
素子、例えば発光ダイオードを用いた気密封止パッケー
ジ（チップＬＥＤ）の本発明に従う製造方法の一例を示
している。9 to 11 show an example of a method for manufacturing a hermetically sealed package (chip LED) using a light emitting element, for example, a light emitting diode as the electronic component element 2 according to the present invention.
【００２４】本実施形態に於いて、図９は先の実施形態
の図５に対応し、基板１上には、低粘度比（例えば粘度
比：１.５程度）の液状封止材４１を用い孔版印刷手段
を適用して、未硬化側壁部４１ａが電子部品素子２のそ
れぞれを取り囲むように格子状に形成されている。未硬
化側壁部４１ａは比較的低粘度比の液状封止材を用いて
形成されているので、形成後は、その一部が低粘度比に
より下方へ流動し、肉厚が下方側ほど漸進的に厚くな
り、内周面がやや湾曲し椀状を呈する。In this embodiment, FIG. 9 corresponds to FIG. 5 of the previous embodiment, and a liquid sealing material 41 having a low viscosity ratio (for example, a viscosity ratio of about 1.5) is provided on the substrate 1. By applying stencil printing means, the uncured side wall portions 41a are formed in a lattice shape so as to surround each of the electronic component elements 2. Since the uncured side wall portion 41a is formed using a liquid sealing material having a relatively low viscosity ratio, after formation, a part of the uncured side wall portion flows downward due to the low viscosity ratio, and the thickness gradually decreases as the thickness decreases. And the inner peripheral surface is slightly curved to have a bowl shape.
【００２５】一方、蓋材９は光学的に透明であり、該蓋
材９の裏面側には、上記未硬化側壁部４１ａと同一のパ
ターンで未硬化側壁補助部４２が、比較的高粘度比（例
えば粘度比：３.０程度）の液状封止材を用い孔版印刷
手段を適用して、好ましくは、上記側壁部４１ａに比べ
多少薄肉厚に形成される。因みに、比較的粘度比の大き
い液状封止材を用いるのは、孔版印刷後の垂れ下がり変
形を防止するためである。On the other hand, the lid member 9 is optically transparent, and an uncured side wall auxiliary part 42 having the same pattern as the uncured side wall part 41a has a relatively high viscosity ratio on the back side of the lid member 9. A stencil printing means is applied using a liquid sealing material having a viscosity ratio of, for example, about 3.0, and is preferably formed to be slightly thinner than the side wall portion 41a. Incidentally, the reason why the liquid sealing material having a relatively large viscosity ratio is used is to prevent sagging deformation after stencil printing.
【００２６】図１０に示すように、このような状態で未
硬化側壁部４１ａ上に蓋材９を被せると、補助部４２が
上記側壁部４１ａの上端部にうまく接続され、流動によ
る上部の量不足が解消され、蓋材９を未硬化側壁部４１
ａ上に、隙間を発生させること無しに、しっかりと密着
させることが出来る。As shown in FIG. 10, when the lid member 9 is put on the uncured side wall portion 41a in such a state, the auxiliary portion 42 is well connected to the upper end of the side wall portion 41a, and the amount of the upper portion due to the flow is increased. The shortage is eliminated, and the lid material 9 is removed from the uncured side wall portion 41.
A can be firmly adhered to a without generating a gap.
【００２７】図１０に示す状態で、先の実施形態と同様
に、未硬化側壁部４１ａ並びに補助部４２の加熱硬化
と、硬化後に分断を行うことにより、チップＬＥＤを多
数個取りできる。In the state shown in FIG. 10, a large number of chip LEDs can be obtained by heat-curing the uncured side wall portion 41a and the auxiliary portion 42 and dividing them after curing as in the previous embodiment.
【００２８】図１１は、多数個取りされた製品の一つを
示し、ＬＥＤ（電子部品素子）から発生した光の一部
は、椀状の内周面で反射して蓋材９に集光し光量が増し
輝度が向上する。この場合、液状封止材に白色顔料（例
えばＴｉＯ2）を混入し、白色に着色しておくことによ
り、輝度をより一層向上できる。FIG. 11 shows one of the products taken in large numbers. A part of the light generated from the LED (electronic component element) is reflected on the inner peripheral surface of the bowl shape and condensed on the cover member 9. The amount of light increases and the luminance improves. In this case, the brightness can be further improved by mixing a white pigment (for example, TiO 2 ) into the liquid sealing material and coloring it in white.
【００２９】本発明に於いて、液状封止材としては、公
知の各種の熱硬化性封止用樹脂を用いることができる。
特にエポキシ樹脂系の液状封止材は、機械的,熱的スト
レス,湿度等の外的要因からの保護性、孔版印刷後の形
状保持性及び接着性等に優れ、特に好適であり、通常
は、粘度が１００〜１００００ポイズ、粘度比が１.５
〜５.０程度のものが使用される。このようなエポキシ
樹脂系の封止材は、市販品、例えばＮＰＲ−１００Ｔ
（商品名、日本レック株製、粘度１５００、粘度比２.
０）として入手できる。In the present invention, as the liquid sealing material, various known thermosetting sealing resins can be used.
In particular, epoxy resin-based liquid sealing materials are excellent in mechanical, thermal stress, protection from external factors such as humidity, excellent shape retention after stencil printing, adhesiveness, and the like, and are particularly suitable. Having a viscosity of 100 to 10,000 poise and a viscosity ratio of 1.5.
Approximately 5.0 are used. Such epoxy resin-based sealing materials are commercially available products, for example, NPR-100T.
(Trade name, manufactured by Nippon Lec Co., Ltd., viscosity 1500, viscosity ratio 2.
0).
【００３０】基材１及び蓋材９の材質、詳しくは封止材
との接着面となる部分の材質は、上記液状封止材に対し
接着適性を有しているものであれば特に制限はない。例
えばエポキシ樹脂系封止材を使用する場合には、次の材
質のものが適当である。The material of the base material 1 and the lid material 9, more specifically, the material of the portion to be bonded to the sealing material is not particularly limited as long as it has adhesiveness to the liquid sealing material. Absent. For example, when an epoxy resin-based sealing material is used, the following materials are suitable.
【００３１】基材１：ガラス−エポキシ,アラミド−エ
ポキシ,紙−フェノールなどのような有機基板、ガラス,
セラミック等の無機基板、アルミベース,鉄ベース,銅ベ
ース等の金属基板 蓋材９：ＰＥＴ,アクリル樹脂,ＰＰＳ,ポリカーボネー
トなどのプラスチック板、ガラス−エポキシ,ガラス−
ポリエステル,アラミド−エポキシなどの複合材、ガラ
ス,セラミックなどの無機材、アルミ,銅、ＳＵＳ等の金
属材、ＰＥＴ,ポリイミド,ポリカーボネート等のプラス
チックフィルム 基材１上に搭載される電子部品素子２としては、ＩＣ,
ＬＳＩ,発光ダイオード,受光素子,レーザーダイオード
等を例示でき、それぞれ単独又はそれらを適宜組み合わ
せて使用される。Substrate 1: Organic substrate such as glass-epoxy, aramid-epoxy, paper-phenol, etc., glass,
Inorganic substrate such as ceramic, metal substrate such as aluminum base, iron base, copper base, etc. Lid 9: plastic plate such as PET, acrylic resin, PPS, polycarbonate, glass-epoxy, glass-
Composite materials such as polyester and aramid-epoxy; inorganic materials such as glass and ceramic; metal materials such as aluminum, copper and SUS; plastic films such as PET, polyimide, and polycarbonate As electronic component elements 2 mounted on a base material 1 Is an IC,
An LSI, a light emitting diode, a light receiving element, a laser diode, and the like can be exemplified, and each of them is used alone or in an appropriate combination thereof.
【００３２】基材１は表裏回路と共に周辺部に、表裏回
路を電気的に接続するスルーホールを備え、また裏面回
路にはマザーボード等への接続用パッド部が設けられて
いる。このような基板の構成そのものは、従来構成のも
のと実質的に異なるところがなく、表裏回路、スルホー
ル及び接続用パッドは、図では省略されている。スルー
ホールは予め絶縁性或いは導電性樹脂で穴埋めされ、基
板の表裏面に向かう気体の流通は遮断されている。スル
ーホールの穴埋めは、未硬化側壁部の孔版印刷時を利用
して行うこともできる。The substrate 1 is provided with through holes for electrically connecting the front and back circuits together with the front and back circuits at the peripheral portion, and a pad portion for connection to a motherboard or the like is provided on the back surface circuit. The configuration itself of such a substrate is substantially the same as that of the conventional configuration, and the front and back circuits, through holes, and connection pads are omitted in the drawing. The through holes are filled with insulating or conductive resin in advance, and the flow of gas toward the front and back surfaces of the substrate is shut off. The filling of the through-holes can also be performed using the time of stencil printing of the uncured side wall portion.
【００３３】蓋材９の光学的性質は、通常の電子部品素
子の場合には、光学的に不透明のもので充分であるが、
表示体,照明,光センサー,カメラ,ＣＣＤパッケージのよ
うに発光素子や受光素子を用いる場合には、上記例示の
蓋材の内、透明ガラス板、透明プラスチック板（又はシ
ート）等のような光学的に透明なものが使用される。As for the optical properties of the cover member 9, optically opaque ones are sufficient for ordinary electronic component elements.
In the case of using a light emitting element or a light receiving element such as a display, an illumination, an optical sensor, a camera, and a CCD package, an optical member such as a transparent glass plate or a transparent plastic plate (or sheet) among the lid materials exemplified above. A transparent material is used.
【００３４】孔版５の区画部５ａに形成されるザグリ部
７の平面形状は、円,楕円,多角形等任意である。図１２
〜１４は、ザグリ部７が正方形状の場合を示している。
図１３は図１２の１３−１３線に沿う縦断面図、図１４
は図１２の１４−１４線に沿う縦断面図をそれぞれ示
し、区画部５ａ,５ａの相互はコーナ部に残されたブリ
ッジ部１２により連結されている。また図１５はザグリ
部７が円形の場合を示し、ブリッジ部１２は辺の部分に
残されている。The planer shape of the counterbore portion 7 formed in the partitioning portion 5a of the stencil 5 is arbitrary such as a circle, an ellipse, and a polygon. FIG.
14 show the case where the counterbore portion 7 is square.
13 is a longitudinal sectional view taken along line 13-13 of FIG.
12 is a longitudinal sectional view taken along the line 14-14 in FIG. 12, and the partition portions 5a, 5a are connected to each other by the bridge portion 12 left in the corner portion. FIG. 15 shows a case where the counterbore part 7 is circular, and the bridge part 12 is left in the side part.
【００３５】図１６は、図１５に示す孔版５を適用して
形成された側壁形成用部４１ａを、また図１７は多数個
取りされた製品を示し、電子部品素子２は円筒状の空所
内に収納されている。因みに図１６図に対応する図４、
及び図１７に対応する図８では、電子部品素子２は角筒
状の空所内に収納されている。FIG. 16 shows a side wall forming portion 41a formed by applying the stencil 5 shown in FIG. 15, and FIG. 17 shows a product obtained by taking a large number of pieces. The electronic component element 2 is placed in a cylindrical space. It is stored in. 4 corresponding to FIG. 16,
In FIG. 8 corresponding to FIG. 17 and FIG. 17, the electronic component element 2 is housed in a rectangular cylindrical space.
【００３６】孔版印刷手段適用による未硬化側壁部４１
ａの形成は、真空雰囲気下で行うことが気泡の巻き込み
等を防止できるので、有利である。Uncured side wall 41 by stencil printing means
The formation of a is advantageous in that it is performed in a vacuum atmosphere because it can prevent entrapment of air bubbles and the like.
【００３７】未硬化側壁部４１ａ上への蓋材９の被蓋工
程は、真空又は不活性ガス（例えば窒素,ヘリウム,アル
ゴン,ネオン等）の充満雰囲気中で行うことが出来き、
前者の場合には、パッケージ内を真空雰囲気に、また後
者の場合には不活性ガスの充満雰囲気にそれぞれ保持で
き、電子部品素子の酸化変質等を防止できる。The step of covering the lid material 9 on the uncured side wall portion 41a can be performed in a vacuum or an atmosphere filled with an inert gas (eg, nitrogen, helium, argon, neon, etc.).
In the former case, the inside of the package can be maintained in a vacuum atmosphere, and in the latter case, the atmosphere can be maintained in an inert gas-filled atmosphere, thereby preventing the electronic components from being oxidized and deteriorated.
【００３８】未硬化側壁部の硬化工程は、通常雰囲気で
行えばよい。The step of curing the uncured side wall portion may be performed in a normal atmosphere.
【００３９】[0039]
【発明の効果】本発明によれば、製造工程の簡略化ひい
ては製造の低コスト化が可能である上に品質,性能面で
の信頼性の高い製品が得られる気密封止パッケージの製
造方法を提供できる。According to the present invention, there is provided a method for manufacturing a hermetically sealed package which simplifies the manufacturing process and thus reduces the cost of manufacture, and also obtains a highly reliable product in terms of quality and performance. Can be provided.
【００４０】また、接着剤の使用と接着工程を省き得る
ので、材料費が安価になることに加え、接着工程を省き
得るので、その分、設備が簡素となり、設備費を節減で
きる。Further, since the use of the adhesive and the bonding step can be omitted, the material cost can be reduced, and the bonding step can be omitted, so that the equipment can be simplified and the equipment cost can be reduced accordingly.
【図１】本発明製造方法に適用される基板上に電子部材
素子を搭載した状況を示す側面図である。FIG. 1 is a side view showing a state where an electronic member element is mounted on a substrate applied to the manufacturing method of the present invention.
【図２】本発明製造方法に於ける、孔版印刷工程の状況
を概略的に示す縦断側面図である。FIG. 2 is a vertical sectional side view schematically showing a state of a stencil printing step in the manufacturing method of the present invention.
【図３】同、孔版上への未硬化側壁の形成状況を概略的
に示す縦断側面図である。FIG. 3 is a vertical cross-sectional side view schematically showing the state of formation of an uncured side wall on a stencil.
【図４】同、一部切り欠き斜視図である。FIG. 4 is a partially cutaway perspective view of the same.
【図５】同、未硬化側壁上へ蓋材の施蓋直前の状況を概
略的に示す縦断面図である。FIG. 5 is a longitudinal sectional view schematically showing a state immediately before the lid material is covered on the uncured side wall.
【図６】同、施蓋直後の状況を概略的に示す縦断面図で
ある。FIG. 6 is a longitudinal sectional view schematically showing a situation immediately after the cover is applied.
【図７】同、硬化工程及び硬化工程後の分断状況を示す
縦断面図である。FIG. 7 is a vertical cross-sectional view showing a curing step and a cutting state after the curing step.
【図８】同、分断後に得られた製品の斜視図である。FIG. 8 is a perspective view of a product obtained after the division.
【図９】本発明の他の実施形態に於ける、図５に対応す
る図である。FIG. 9 is a view corresponding to FIG. 5 in another embodiment of the present invention.
【図１０】同、図６に対応する図である。FIG. 10 is a diagram corresponding to FIG. 6;
【図１１】同、図８に対応する図である。FIG. 11 is a diagram corresponding to FIG.
【図１２】本発明製造方法に適用される孔版の部分平面
図である。FIG. 12 is a partial plan view of a stencil applied to the manufacturing method of the present invention.
【図１３】図１２の１３−１３線に沿う縦断面図であ
る。FIG. 13 is a longitudinal sectional view taken along line 13-13 of FIG.
【図１４】図１２の１４−１４線に沿う縦断面図であ
る。FIG. 14 is a longitudinal sectional view taken along line 14-14 of FIG. 12;
【図１５】孔版の他の一例を示す部分平面図である。FIG. 15 is a partial plan view showing another example of a stencil.
【図１６】図１５に示す孔版を適用して形成された未硬
化側壁部の斜視図である。FIG. 16 is a perspective view of an uncured side wall formed by applying the stencil shown in FIG.
【図１７】同、製品の斜視図である。FIG. 17 is a perspective view of the same product.
１ 基材 ２ 電子部品素子 ３ 間隔部 ４ 硬化側壁部 ５ 孔版 ６ 格子状通孔部 ７ ザグリ部 ８ スキージ ９ 蓋材 １０ スペーサ １１ 間隔 １２ ブリッジ部 DESCRIPTION OF SYMBOLS 1 Base material 2 Electronic component element 3 Interval part 4 Hardened side wall part 5 Stencil 6 Grid-shaped through-hole part 7 Counterbore part 8 Squeegee 9 Cover material 10 Spacer 11 Interval 12 Bridge part
───────────────────────────────────────────────────── フロントページの続き Ｆターム(参考） 5F041 AA06 AA14 AA31 AA34 AA42 AA43 AA44 DA20 DA61 DA72 DA74 DA75 DA76 DB03 EE25 ────────────────────────────────────────────────── ─── Continued on the front page F term (reference) 5F041 AA06 AA14 AA31 AA34 AA42 AA43 AA44 DA20 DA61 DA72 DA74 DA75 DA76 DB03 EE25
Claims (6)
の周りに形成される側壁部及び該側壁部上に被せられる
蓋材を適用して気密封止するに際し、基板及び蓋材の少
なくとも一方に、液状封止材を用い孔版印刷手段を適用
して未硬化側壁部を形成し、しかる後、基板と蓋材とを
未硬化側壁部を介し張り合わせた状態で該未硬化側壁部
を硬化させ、もって硬化側壁部の形成と同時に該側壁部
を構成している封止材の接着材としての働きで基板と蓋
材とを接着一体化することを特徴とする気密封止パッケ
ージの製造方法。An electronic component device mounted on a substrate is hermetically sealed by applying a side wall formed around the device and a lid material covering the side wall portion. On at least one side, a stencil printing means is applied using a liquid sealing material to form an uncured side wall portion, and thereafter, the uncured side wall portion is adhered to the substrate and the lid via the uncured side wall portion. Producing a hermetically sealed package, wherein the substrate and the lid material are hardened and, at the same time as the formation of the hardened side wall portion, the substrate and the lid material are bonded and integrated by acting as an adhesive of the sealing material constituting the side wall portion. Method.
の周りに形成される側壁部及び該側壁部上に被せられる
蓋材を適用して気密封止するに際し、基板上に多数個の
電子部品素子が相互間に間隔を存し且つ縦横に列をなす
ように搭載されており、基板及び蓋材の少なくとも一方
に、液状封止材を用い孔版印刷手段を適用して未硬化側
壁部を電子部品素子の各々の周りを取り囲むように格子
状に形成し、しかる後、基板と蓋材とを該未硬化側壁部
を介し張り合わせた状態で該側壁部を硬化させ、もって
格子状硬化側壁部の形成と同時に該側壁部を構成してい
る封止材の接着材としての働きで基板と蓋材とを接着一
体化し、次いで基板並びに蓋材を格子状側壁部の縦横の
中心線に沿って分断し多数個取りすることを特徴とする
気密封止パッケージの製造方法。2. A method for sealing a plurality of electronic component elements mounted on a substrate by applying a side wall portion formed around the element and a lid material covering the side wall portion to hermetically seal the electronic component elements on the substrate. The electronic component elements are mounted so as to be spaced apart from each other and form rows and columns, and at least one of the substrate and the lid material is applied with a stencil printing means using a liquid sealing material, and the uncured side wall is applied. Part is formed in a lattice shape so as to surround each of the electronic component elements, and then the side wall is cured in a state where the substrate and the lid material are bonded together via the uncured side wall part, thereby curing the lattice. At the same time as the formation of the side wall portion, the substrate and the lid material are bonded and integrated by acting as an adhesive of the sealing material constituting the side wall portion, and then the substrate and the lid material are aligned with the vertical and horizontal center lines of the lattice-shaped side wall portion. Hermetically sealed package characterized by being cut along and taken into multiple pieces The method of production.
真空雰囲気下で行うことを特徴とする請求項１又は２記
載の製造方法。3. A stencil printing for forming an uncured side wall portion,
The method according to claim 1, wherein the method is performed in a vacuum atmosphere.
囲気下又は不活性ガスの充満雰囲気下で行うことを特徴
とする請求項１又は２記載の製造方法。4. The method according to claim 1, wherein the covering of the uncured side wall portion with the cover material is performed in a vacuum atmosphere or an atmosphere filled with an inert gas.
/又は粘度比の小さい液状封止材を用いて孔版印刷によ
り形成され、該側壁部は、未硬化状態での液状封止材の
下方への流動により底部側ほど漸進的に厚肉になり、蓋
材側に比較的高粘度及び/又は高粘度比の液状封止材を
用いて未硬化側壁補助部が形成され、上記上記未硬化側
壁部の流動による上部の量不足が上記補助部によって補
われる構成になっていることを特徴とする請求項１又は
２記載の製造方法。5. An uncured side wall portion having a relatively high viscosity and
/ Or formed by stencil printing using a liquid sealing material having a small viscosity ratio, and the side wall portion gradually becomes thicker toward the bottom side by the downward flow of the liquid sealing material in an uncured state, An uncured side wall auxiliary portion is formed on the lid material side using a liquid sealing material having a relatively high viscosity and / or a high viscosity ratio, and the auxiliary portion compensates for an insufficient amount of the upper portion due to the flow of the uncured side wall portion. 3. The manufacturing method according to claim 1, wherein the manufacturing method is performed.
学的に透明であり、液状封止材が白色に着色されている
ことを特徴とする請求項５記載の製造方法。6. The manufacturing method according to claim 5, wherein the electronic component element is a light emitting element, the lid material is optically transparent, and the liquid sealing material is colored white.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10745799A JP3362219B2 (en) | 1999-04-15 | 1999-04-15 | Manufacturing method of hermetically sealed package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10745799A JP3362219B2 (en) | 1999-04-15 | 1999-04-15 | Manufacturing method of hermetically sealed package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000299396A true JP2000299396A (en) | 2000-10-24 |
| JP3362219B2 JP3362219B2 (en) | 2003-01-07 |
Family
ID=14459668
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10745799A Expired - Fee Related JP3362219B2 (en) | 1999-04-15 | 1999-04-15 | Manufacturing method of hermetically sealed package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3362219B2 (en) |
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