JP2000294516A - Anti-diffusion film for semiconductor device and manufacture of the film - Google Patents

Anti-diffusion film for semiconductor device and manufacture of the film

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Publication number
JP2000294516A
JP2000294516A JP11245373A JP24537399A JP2000294516A JP 2000294516 A JP2000294516 A JP 2000294516A JP 11245373 A JP11245373 A JP 11245373A JP 24537399 A JP24537399 A JP 24537399A JP 2000294516 A JP2000294516 A JP 2000294516A
Authority
JP
Japan
Prior art keywords
film
thin film
diffusion
lower thin
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11245373A
Other languages
Japanese (ja)
Inventor
Hon Fan Suun
ホン ファン スーン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hyundai Microelectronics Co Ltd
Original Assignee
Hyundai Microelectronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Microelectronics Co Ltd filed Critical Hyundai Microelectronics Co Ltd
Publication of JP2000294516A publication Critical patent/JP2000294516A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76846Layer combinations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76847Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned within the main fill metal

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a anti-diffusion film of a semiconductor device which can prevent the phenomenon that impurities diffuse into a semiconductor substrate, electrical resistance is made high and a leakage current is increased, and a manufacturing method of the anti-diffusion film. SOLUTION: After a lower thin film 30 composed of titanium Ti is formed on the upper surfaces of a contact hole 20 and a semiconductor substrate 10, the lower thin film 30 is subjected to plasma treatment, and a TiNx film composed of titanium nitrogen compound is formed from the surface as far as a prescribed depth. After that, an anti-diffusion film 40 composed of titanium nitride TiN is formed on the upper surface of the lower thin film 30, and a anti-diffusion film of a semiconductor device is manufactured.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子の拡散
防止膜及びその製造方法に係るもので、詳しくは、不純
物が基板内に拡散する現象を防止し得る半導体素子の拡
散防止膜及びその製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a diffusion preventing film for a semiconductor device and a method for manufacturing the same, and more particularly, to a diffusion preventing film for a semiconductor device and a method for manufacturing the same, which can prevent the diffusion of impurities into a substrate. It is about the method.

【0002】[0002]

【従来の技術】一般に、半導体素子の配線工程において
は、半導体基板にコンタクトホールを形成し、前記コン
タクトホール及び半導体基板の上面に、基板物質と拡散
防止膜との接着を容易にするための下部薄膜を形成した
後、該下部薄膜の上面に拡散防止膜を形成している。
2. Description of the Related Art Generally, in a wiring process of a semiconductor device, a contact hole is formed in a semiconductor substrate, and a lower portion for facilitating adhesion between a substrate material and a diffusion barrier film is formed on the contact hole and the upper surface of the semiconductor substrate. After forming the thin film, a diffusion prevention film is formed on the upper surface of the lower thin film.

【0003】具体的には、チタニウムTiの下部薄膜
に、窒化チタニウムTiNの拡散防止膜を蒸着するのが
一般的であった。また、前記拡散防止膜と後続の工程で
プラグになる金属物質とが反応する現象を防止するた
め、前記拡散防止膜の上面に更に上部薄膜(チタニウム
Ti膜)を形成する場合もあった。
Specifically, it has been common practice to deposit a diffusion preventing film of titanium nitride TiN on a lower thin film of titanium Ti. In addition, an upper thin film (a titanium Ti film) may be further formed on the upper surface of the diffusion prevention film in order to prevent a phenomenon in which the diffusion prevention film reacts with a metal material that becomes a plug in a subsequent process.

【0004】ところで、半導体素子の高集積化に伴い、
アスペクト比(エッチング深さ/パターン幅)が大きく
なるが、このようにアスペクト比の大きい表面上でも塗
布性の優秀な化学気相蒸着法(以下、CVD法と称す)
によって拡散防止膜を蒸着する方法として、tetra-kis
dimethyl amino titanium(以下、TDMATと称
す)をソース物質とする有機金属化学気相蒸着法(MO
CVD)が広く用いられている。
By the way, with the high integration of semiconductor devices,
Although the aspect ratio (etching depth / pattern width) increases, the chemical vapor deposition method (hereinafter, referred to as CVD method) having excellent coatability even on a surface having such a large aspect ratio.
Tetra-kis
Metal organic chemical vapor deposition (MO) using dimethyl amino titanium (hereinafter referred to as TDMAT) as a source material
CVD) is widely used.

【0005】このように形成されたTiN拡散防止膜の
内部には、図4に示すような構造を有する炭素が30〜40
at%(原子量の百分率)ほど含有され、それら炭素は不
純物として作用して抵抗を増大させ、拡散防止膜の性能
を低下させるため、前記TiN拡散防止膜を形成した
後、窒素と水素とのプラズマ処理を施して炭素を除去し
ていた。
In the thus formed TiN diffusion preventing film, carbon having a structure as shown in FIG.
at% (percent of atomic weight), these carbons act as impurities to increase the resistance and reduce the performance of the diffusion barrier film. Therefore, after forming the TiN diffusion barrier film, the plasma of nitrogen and hydrogen is formed. It was treated to remove carbon.

【0006】その結果、拡散防止膜の比抵抗は、プラズ
マ処理以前の1000μΩcmから、処理後に約250μΩcmに
まで低下するが、拡散防止膜内の炭素の含有量は約10at
%で、依然として高い値を有するという欠点がある。
As a result, the specific resistance of the diffusion barrier film decreases from 1000 μΩcm before the plasma treatment to about 250 μΩcm after the plasma treatment, but the carbon content in the diffusion barrier film is about 10 atm.
% Has the disadvantage that it still has a high value.

【0007】図5は、TDMATをソース物質として有
機金属化学気相蒸着法により蒸着した後、窒素と水素と
のプラズマ処理を施して形成されたTi上部薄膜とTi
N拡散防止膜に対するX線光電子分光器(X-ray photoe
lectron spectroscope)の測定結果を示したグラフ
で、拡散防止膜内の炭素含量が示されている。
FIG. 5 shows a Ti upper thin film and a Ti upper thin film formed by subjecting TDMAT as a source material to vapor deposition by a metal organic chemical vapor deposition method and then performing a plasma treatment with nitrogen and hydrogen.
X-ray photoemission spectrometer (X-ray photoe
FIG. 3 is a graph showing the results of measurement by an electron spectroscope, and shows the carbon content in the diffusion barrier film.

【0008】即ち、薄膜に対しスパッタリングを施して
食刻しながら深さに応じた原子の含量変化を測定した結
果を示したものであって、横軸のスパッタリング時間
は、Ti上部薄膜の表面からの深さに比例し、TiN拡
散防止膜は、225〜475秒の間スパッタリングを施したと
きの深さに存在し、該拡散防止膜内には約10at%の炭素
が含有されている。
That is, the results of measurement of the change in the atomic content according to the depth while sputtering and etching the thin film are shown. The abscissa indicates the sputtering time from the surface of the Ti upper thin film. The TiN diffusion prevention film is present at a depth when sputtering is performed for 225 to 475 seconds, and the diffusion prevention film contains about 10 at% of carbon.

【0009】[0009]

【発明が解決しようとする課題】然るに、このような従
来の半導体素子の拡散防止膜及びその製造方法において
は、熱処理工程時に、拡散防止膜内に残留された炭素が
不純物として基板内に拡散して電気的抵抗を高くし、漏
泄電流が増大して素子の特性を低下させるという不都合
な点があった。
However, in such a conventional diffusion barrier film for a semiconductor device and a method for manufacturing the same, carbon remaining in the diffusion barrier film during the heat treatment step diffuses into the substrate as an impurity. Therefore, there is an inconvenience that the electrical resistance is increased, the leakage current is increased, and the characteristics of the device are deteriorated.

【0010】そこで、本発明は、このような従来の課題
に鑑みてなされたもので、不純物が基板内に拡散する現
象を防止し得る拡散防止膜及びその製造方法を提供する
ことを目的とする。
The present invention has been made in view of such conventional problems, and an object of the present invention is to provide a diffusion preventing film capable of preventing a phenomenon in which impurities diffuse into a substrate, and a method of manufacturing the same. .

【0011】[0011]

【課題を解決するための手段】このような目的を達成す
るため、請求項1に係る半導体素子の拡散防止膜は、半
導体基板及び該半導体基板に形成されたコンタクトホー
ルの上面に形成された下部薄膜と、該下部薄膜の上面に
形成された拡散防止膜とから構成される半導体素子の拡
散防止膜であって、前記下部薄膜の表面から所定厚さま
でが窒素化合物により形成される構成とした。
In order to achieve the above object, a diffusion preventing film for a semiconductor device according to claim 1 is provided in a lower portion formed on an upper surface of a semiconductor substrate and a contact hole formed in the semiconductor substrate. A diffusion prevention film for a semiconductor device comprising a thin film and a diffusion prevention film formed on an upper surface of the lower thin film, wherein a thickness from a surface of the lower thin film to a predetermined thickness is formed of a nitrogen compound.

【0012】請求項2記載の発明では、前記所定厚さ
を、20〜100Åとする構成とした。請求項3記載の
発明では、前記拡散防止膜が、チタニウム窒化物(Ti
N),タンタリウム窒化物(TaN),タングステン窒
化物(WN)のいずれかで形成され、前記下部薄膜の所
定厚さよりも下層の部位が、チタニウム(Ti),タン
タリウム(Ta),タングステン(W)のいずれかで形
成される構成とした。
According to the second aspect of the present invention, the predetermined thickness is set to 20 to 100 °. According to the third aspect of the present invention, the diffusion preventing film is made of titanium nitride (Ti).
N), tantalum nitride (TaN), or tungsten nitride (WN), and portions of the lower thin film below a predetermined thickness are formed of titanium (Ti), tantalum (Ta), and tungsten (W). W).

【0013】請求項4記載の発明では、前記下部薄膜の
表面から所定厚さまでの窒素化合物が、プラズマ処理に
より形成される構成とした。一方、請求項5記載に係る
半導体素子の拡散防止膜の製造方法は、半導体基板及び
該半導体基板に形成されたコンタクトホールの上面に下
部薄膜を形成する工程と、前記下部薄膜に対しプラズマ
処理を施す工程と、前記下部薄膜の上面に拡散防止膜を
形成する工程と、を順次行う構成とした。
[0013] In the invention described in claim 4, the nitrogen compound from the surface of the lower thin film to a predetermined thickness is formed by plasma processing. On the other hand, a method of manufacturing a diffusion barrier film for a semiconductor device according to claim 5 includes a step of forming a lower thin film on an upper surface of a semiconductor substrate and a contact hole formed in the semiconductor substrate, and performing a plasma treatment on the lower thin film. The step of applying and the step of forming a diffusion barrier film on the upper surface of the lower thin film are sequentially performed.

【0014】請求項6記載の発明では、前記プラズマ処
理を施す工程が、圧力100〜2000mTorr,温度200〜500
℃,電力200〜1000Wの条件下で、窒素プラズマを前記下
部薄膜に対し照射する構成とした。
According to a sixth aspect of the present invention, the step of performing the plasma treatment includes the steps of: a pressure of 100 to 2000 mTorr and a temperature of 200 to 500 mTorr.
The configuration was such that the lower thin film was irradiated with nitrogen plasma at a temperature of 200 ° C. and a power of 200 to 1000 W.

【0015】請求項7記載の発明では、前記拡散防止膜
を形成する工程が、 TDMAT(tetra-kis dimethyl amino titaniu
m), TDEAT(tetra-kis diethyl amino titanium), PDMAT(penta dimethyl amino tantalum), PDEAT(penta diethyl amino titanium) のいずれかをソース物質として有機金属化学気相蒸着法
(MOCVD)を施して前記下部薄膜の上面に拡散防止
膜を形成する構成とした。
[0015] In the invention according to claim 7, the step of forming the diffusion barrier film includes the step of forming TDMAT (tetra-kis dimethyl amino titaniu).
m), TDEAT (tetra-kis diethylaminotitalum), PDMAT (pentadimethylaminotantalum) or PDEAT (pentadiethylaminotitanium) as a source material and metalorganic chemical vapor deposition (MOCVD). The diffusion preventing film is formed on the upper surface of the thin film.

【0016】[0016]

【発明の実施の形態】以下、本発明の実施の形態を、図
面を用いて説明する。本発明に係る半導体素子の拡散防
止膜においては、図1に示したように、内部にコンタク
トホール20が形成された半導体基板10と、前記コン
タクトホール20及び半導体基板10の上面に形成され
た下部薄膜30と、該下部薄膜30の上面に形成された
拡散防止膜40とから構成され、前記下部薄膜30は、
該下部薄膜30の表面から所定厚さまでが窒素化合物に
て形成されている。
Embodiments of the present invention will be described below with reference to the drawings. As shown in FIG. 1, in a diffusion barrier film of a semiconductor device according to the present invention, a semiconductor substrate 10 having a contact hole 20 formed therein, and a lower portion formed on the upper surface of the contact hole 20 and the semiconductor substrate 10 are formed. The lower thin film 30 includes a thin film 30 and a diffusion barrier film 40 formed on an upper surface of the lower thin film 30.
A portion from the surface of the lower thin film 30 to a predetermined thickness is formed of a nitrogen compound.

【0017】以下、このように構成された本発明に係る
半導体素子の拡散防止膜の製造方法を、図面を用いて説
明する。先ず、図1(A)に示したように、内部にコン
タクトホール20が形成された半導体基板10を準備
し、そのコンタクトホール20を有する半導体基板10
に、湿式又は乾式洗浄を施した後、前記コンタクトホー
ル20の上面に、後続工程で形成される拡散防止膜40
の接着性を向上するための下部薄膜30を、チタニウム
Tiを用いて形成する。
Hereinafter, a method for manufacturing a diffusion barrier film of a semiconductor device according to the present invention having the above structure will be described with reference to the drawings. First, as shown in FIG. 1A, a semiconductor substrate 10 having a contact hole 20 formed therein is prepared, and the semiconductor substrate 10 having the contact hole 20 is prepared.
After performing a wet or dry cleaning, a diffusion prevention film 40 formed in a subsequent process is formed on the upper surface of the contact hole 20.
The lower thin film 30 for improving the adhesiveness of is formed by using titanium Ti.

【0018】この場合、前記下部薄膜30は、電気的抵
抗を低下させる役割も果たす。尚、前記下部薄膜30
は、前記チタニウムTiに限定されず、タンタリウムT
a又はタングステンWを用いることができる。
In this case, the lower thin film 30 also plays a role of reducing electric resistance. The lower thin film 30
Is not limited to the titanium Ti, but tantalum T
a or tungsten W can be used.

【0019】その後、1500mTorrの圧力及び650Wの電力
の条件下で発生された窒素プラズマを、370℃の温度下
でプラズマ処理を施して前記下部薄膜30に照射する。
この場合、圧力は100〜2000mTorr、電力は200〜1000W、
温度は200〜500℃の範囲とすることが好ましい。
Thereafter, the lower thin film 30 is irradiated with nitrogen plasma generated under the conditions of a pressure of 1500 mTorr and a power of 650 W at a temperature of 370 ° C.
In this case, the pressure is 100-2000mTorr, the power is 200-1000W,
The temperature is preferably in the range of 200 to 500C.

【0020】上記プラズマ処理の結果、図1(B)に示
したように、チタニウムTiの下部薄膜30の表面から
所定の深さまで、即ち、厚さX1(通常、20〜100Å)ま
でが窒素プラズマと反応してチタニウム窒素化合物のT
iNX膜となる。
As a result of the plasma treatment, as shown in FIG. 1 (B), nitrogen extends from the surface of the lower thin film 30 of titanium Ti to a predetermined depth, that is, the thickness X 1 (usually 20 to 100 °). Reacts with plasma to form titanium nitrogen compound T
the iN X film.

【0021】前記下部薄膜30の厚さX1よりも下層の
厚さX2の部分(図1(B)参照)チタニウムTiにて
形成されているため、後続して施される熱処理工程でチ
タニウム硅素化合物(Ti-silicide)が形成されて電気
抵抗が低下されることになる。
Since a portion having a thickness X 2 lower than the thickness X 1 of the lower thin film 30 (see FIG. 1B) is formed of titanium Ti, it is formed in a subsequent heat treatment step. As a result, a silicon compound (Ti-silicide) is formed to lower the electric resistance.

【0022】その後、図1(C)に示したように、前記
下部薄膜30の上面に、TDMAT(tetra-kis dimet
hyl amino titanium)をソース物質とする有機金属化
学気相蒸着MOCVD法により、チタニウム窒化物Ti
Nの拡散防止膜40を蒸着形成する。但し、前記ソース
物質は、前記TDMATに限定されず、 TDEAT(tetra-kis diethyl amino titaniu
m), PDMAT(penta dimethyl amino tantalum), PDEAT(penta diethyl amino titanium) のいずれかを用いることもできる。
Thereafter, as shown in FIG. 1C, a TDMAT (tetra-kis dimet) is formed on the upper surface of the lower thin film 30.
hyl amino titanium) as a source material by metal organic chemical vapor deposition MOCVD method.
An N diffusion prevention film 40 is formed by vapor deposition. However, the source material is not limited to the TDMAT, but may be TDEAT (tetra-kis diethyl amino titaniu).
m), PDMAT (penta dimethyl amino tantalum), or PDEAT (penta diethyl amino titanium).

【0023】また、前記拡散防止膜40は、前記チタニ
ウム窒化物TiNに限定されず、タンタリウム窒化物
(TaN)又はタングステン窒化物(WN)のような物
質を用いることもできる。
The diffusion barrier film 40 is not limited to the titanium nitride TiN, but may be made of a material such as tantalum nitride (TaN) or tungsten nitride (WN).

【0024】ここで、前記拡散防止膜40は、同一の反
応炉内でインサイツー工程(in si-tu)を施して蒸着形
成され、空気中に露出されないため、該拡散防止膜40
の内部には酸素又は水分が存在せず、炭素のような不純
物が拡散防止膜の蒸着又は熱処理工程時に基板内に浸透
する現象を確実に防止することができる。
Here, the diffusion barrier film 40 is formed by performing an in-situ process (insi-tu) in the same reaction furnace, and is not exposed to air.
Oxygen or moisture does not exist inside the substrate, and the phenomenon that impurities such as carbon permeate into the substrate during the deposition or heat treatment process of the diffusion prevention film can be reliably prevented.

【0025】即ち、図2に示したように、点線にて示し
た窒素プラズマ処理を施した場合は、シリコン基板内の
炭素の濃度が、実線にて示した窒素プラズマ処理を施さ
ない場合よりも低い。
That is, as shown in FIG. 2, when the nitrogen plasma processing shown by the dotted line is performed, the concentration of carbon in the silicon substrate becomes higher than when the nitrogen plasma processing shown by the solid line is not performed. Low.

【0026】このような結果が実際の素子の動作に与え
る影響を確認するため、漏泄電流を測定すると、図3
(A)〜(B)に示したように、○印を結ぶ線で示され
る窒素プラズマ処理を施した場合は、+印を結ぶ線で示
される窒素プラズマ処理を施さない場合よりも、N+/P界
面 及びP+/N界面で全て漏泄電流が減少されて、素子の
特性が向上されることが認められる。
When the leakage current was measured to confirm the effect of such a result on the actual operation of the device, FIG.
As shown in (A) and (B), when the nitrogen plasma treatment indicated by the line connecting the 印 marks is performed, the N + is larger than when the nitrogen plasma treatment indicated by the line connecting the + marks is not performed. It can be seen that the leakage current is reduced at the / P interface and the P + / N interface, and the characteristics of the device are improved.

【0027】[0027]

【発明の効果】以上説明したように、請求項1,3及び
5に係る発明によると、拡散防止膜と当接する下部薄膜
を窒素化合物に形成して、炭素の拡散を防止して電気的
抵抗及び漏泄電流が増大する現象を防止し得るという効
果がある。
As described above, according to the first, third and fifth aspects of the present invention, the lower thin film in contact with the diffusion preventing film is formed of a nitrogen compound to prevent the diffusion of carbon and to reduce the electric resistance. In addition, there is an effect that a phenomenon that leakage current increases can be prevented.

【0028】又、請求項4に係る発明によると、プラズ
マ処理を包含する下部薄膜及び拡散防止膜の形成工程
を、全て同一の反応炉内で施すインサイツー(in si-t
u)工程により行わせることができ、これによって外部
の空気に露出させずに酸素又は水分の無い良質の拡散防
止膜を形成でき、よって、拡散防止膜内に残留する炭素
が不純物として拡散防止膜の蒸着又は熱処理工程時に基
板内に拡散される現象を防止し得るという効果がある。
According to the fourth aspect of the present invention, the steps of forming the lower thin film and the diffusion barrier film including the plasma treatment are performed in-situ in the same reactor.
u) process, whereby a good quality anti-diffusion film free of oxygen or moisture can be formed without exposing to the outside air, so that carbon remaining in the anti-diffusion film becomes an impurity. This has the effect of preventing the phenomenon of diffusion into the substrate during the vapor deposition or heat treatment step.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る半導体素子の拡散防止膜の製造方
法を示した工程縦断面図である。
FIG. 1 is a process longitudinal sectional view showing a method for manufacturing a diffusion barrier film of a semiconductor device according to the present invention.

【図2】本発明に係る窒素プラズマ処理の有無による拡
散防止膜及びシリコン基板内の炭素の濃度を比較して示
したグラフである。
FIG. 2 is a graph comparing the concentration of carbon in a diffusion barrier film and the concentration of carbon in a silicon substrate according to the presence or absence of a nitrogen plasma treatment according to the present invention.

【図3】本発明に係る半導体素子の漏泄電流を測定した
結果を示したグラフで、(A)はN+/P界面 の漏泄電流
を示し、(B)はP+/N界面の漏泄電流を示す。
3A and 3B are graphs showing the results of measuring the leakage current of the semiconductor device according to the present invention, wherein FIG. 3A shows the leakage current at the N + / P interface, and FIG. 3B shows the leakage current at the P + / N interface. Is shown.

【図4】従来の拡散防止膜の形成時に利用されたTDM
ATの構造を示した化学式である。
FIG. 4 shows a TDM used in forming a conventional diffusion barrier film.
It is a chemical formula showing the structure of AT.

【図5】従来の拡散防止膜内の炭素含量を示したX線光
電子分光器の測定結果である。
FIG. 5 is a measurement result of an X-ray photoelectron spectrometer showing the carbon content in a conventional diffusion barrier film.

【符号の説明】[Explanation of symbols]

10…半導体基板 20…コンタクトホール 30…下部薄膜 40…拡散防止膜 DESCRIPTION OF SYMBOLS 10 ... Semiconductor substrate 20 ... Contact hole 30 ... Lower thin film 40 ... Diffusion prevention film

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 4M104 BB14 BB17 BB18 CC01 DD45 DD86 FF18 HH04 5F033 JJ18 JJ19 JJ21 JJ32 JJ33 JJ34 KK01 NN06 NN07 PP02 PP11 QQ90 QQ98 WW02 WW03 WW05 WW08 XX28  ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4M104 BB14 BB17 BB18 CC01 DD45 DD86 FF18 HH04 5F033 JJ18 JJ19 JJ21 JJ32 JJ33 JJ34 KK01 NN06 NN07 PP02 PP11 QQ90 QQ98 WW02 WW03 WW05 WW08 XX28

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】半導体基板及び該半導体基板に形成された
コンタクトホールの上面に形成された下部薄膜と、 該下部薄膜の上面に形成された拡散防止膜とから構成さ
れる半導体素子の拡散防止膜であって、 前記下部薄膜の表面から所定厚さまでが窒素化合物によ
り形成されたことを特徴とする半導体素子の拡散防止
膜。
An anti-diffusion film for a semiconductor device comprising: a semiconductor substrate; a lower thin film formed on an upper surface of a contact hole formed in the semiconductor substrate; and a diffusion prevention film formed on an upper surface of the lower thin film. An anti-diffusion film for a semiconductor device, wherein a portion from a surface of the lower thin film to a predetermined thickness is formed of a nitrogen compound.
【請求項2】前記所定厚さが、20〜100Åであるこ
とを特徴とする請求項1記載の半導体素子の拡散防止
膜。
2. The anti-diffusion film of a semiconductor device according to claim 1, wherein said predetermined thickness is 20 to 100 °.
【請求項3】前記拡散防止膜が、チタニウム窒化物(T
iN),タンタリウム窒化物(TaN),タングステン
窒化物(WN)のいずれかで形成され、前記下部薄膜の
所定厚さよりも下層の部位が、チタニウム(Ti),タ
ンタリウム(Ta),タングステン(W)のいずれかで
形成されることを特徴とする請求項1又は2記載の半導
体素子の拡散防止膜。
3. The method according to claim 1, wherein the diffusion preventing film is made of titanium nitride (T).
iN), tantalum nitride (TaN), or tungsten nitride (WN), and a portion of the lower thin film below a predetermined thickness is made of titanium (Ti), tantalum (Ta), tungsten ( 3. The anti-diffusion film for a semiconductor device according to claim 1, wherein the anti-diffusion film is formed of any one of the following:
【請求項4】前記下部薄膜の表面から所定厚さまでの窒
素化合物が、プラズマ処理により形成されることを特徴
とする請求項1〜3のいずれか1つに記載の半導体素子
の拡散防止膜。
4. The anti-diffusion film for a semiconductor device according to claim 1, wherein the nitrogen compound from the surface of the lower thin film to a predetermined thickness is formed by plasma treatment.
【請求項5】半導体基板及び該半導体基板に形成された
コンタクトホールの上面に下部薄膜を形成する工程と、 前記下部薄膜に対しプラズマ処理を施す工程と、 前記下部薄膜の上面に拡散防止膜を形成する工程と、 を順次行うことを特徴とする半導体素子の拡散防止膜の
製造方法。
5. A step of forming a lower thin film on an upper surface of a semiconductor substrate and a contact hole formed in the semiconductor substrate; a step of performing plasma processing on the lower thin film; Forming a diffusion prevention film for a semiconductor device.
【請求項6】前記プラズマ処理を施す工程が、圧力100
〜2000mTorr,温度200〜500℃,電力200〜1000Wの条件
下で、窒素プラズマを前記下部薄膜に対し照射すること
を特徴とする請求項5記載の半導体素子の拡散防止膜の
製造方法。
6. The method according to claim 1, wherein the step of performing the plasma treatment is performed at a pressure of 100.
6. The method according to claim 5, wherein the lower thin film is irradiated with nitrogen plasma under the conditions of -2000 mTorr, temperature of 200-500 [deg.] C., and power of 200-1000 W.
【請求項7】前記拡散防止膜を形成する工程が、 TDMAT(tetra-kis dimethyl amino titaniu
m), TDEAT(tetra-kis diethyl amino titanium), PDMAT(penta dimethyl amino tantalum), PDEAT(penta diethyl amino titanium) のいずれかをソース物質として有機金属化学気相蒸着法
(MOCVD)を施して前記下部薄膜の上面に拡散防止膜を
形成することを特徴とする請求項5又は6に記載の半導
体素子の拡散防止膜の製造方法。
7. The method according to claim 1, wherein the step of forming the diffusion barrier film comprises: TDMAT (tetra-kis dimethyl amino titaniu).
m), TDEAT (tetra-kis diethylaminotitalum), PDMAT (pentadimethylaminotantalum) or PDEAT (pentadiethylaminotitanium) as a source material and metalorganic chemical vapor deposition (MOCVD). 7. The method according to claim 5, wherein an anti-diffusion film is formed on the upper surface of the thin film.
JP11245373A 1999-04-02 1999-08-31 Anti-diffusion film for semiconductor device and manufacture of the film Pending JP2000294516A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR11591/1999 1999-04-02
KR1019990011591A KR20000065373A (en) 1999-04-02 1999-04-02 Diffusion barrier in semiconductor device and fabrication method thereof

Publications (1)

Publication Number Publication Date
JP2000294516A true JP2000294516A (en) 2000-10-20

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ID=19578633

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Country Link
JP (1) JP2000294516A (en)
KR (1) KR20000065373A (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100415542B1 (en) * 2001-06-28 2004-01-24 주식회사 하이닉스반도체 Forming method of contact for semiconductor
KR100425581B1 (en) * 2001-09-13 2004-04-03 한국전자통신연구원 Semiconductor device having metal wiring layer completely buried in the hole and fabrication method by using selective nitridation process

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