JP2000289255A - Control apparatus for printer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To restrict generation of noises by preventing a next latch signal from being inputted while a delayed strobe signal is being inputted. SOLUTION: A strobe signal St is inputted to a delay circuit 13 at a printing start timing. The delay circuit 13 outputs four delayed strobe signals to driving circuits of drivers IC Dr1-IC Dr4 with applying a time delay starting from the strobe signal. When the delayed strobe signal is sent to each driving circuit of the driver IC Dr1 printing pixel data of a corresponding area in a latch 12 are read out and a corresponding heating element R (R1-Rn) is driven to heat. The delayed strobe signal is fed to each driving circuit of the driver IC Dr2 with a delay of the delay time to the timing. As a result, printing pixel data of a corresponding area in the latch 12 are read out and, a corresponding heating element R is driven to heat. Similarly, corresponding heating elements R of each driving circuit of the drivers IC Dr3 and IC Dr4 are driven to heat.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a control device for a thermal type line printer in which a plurality of heating elements are independently heated and driven by a driving circuit to form print pixels.

[0002]

2. Description of the Related Art A thermal type line printer heats and drives a number of heating elements arranged in a row direction.
This is a printer that prints one line of data in parallel and simultaneously. The printing control of this type of printer is as follows. That is, the pixel data (1 or 0 data) stored in the shift register is transferred in parallel into the latch based on the latch signal. Next, a drive circuit for driving each heating element is turned on by the strobe signal, the data in the latch is fetched, and the heating element is heated according to the data. Here, the plurality of driving circuits are realized by using a plurality of driver ICs including a plurality of driving circuits.

However, in the control of the printer, when there are many heating elements to be driven, when a strobe signal is input to the drive circuit, the current fluctuates rapidly and this generates noise, which causes the driver IC to malfunction, Eventually, printing disturbances may occur.

Therefore, in order to avoid this problem,
There is a printer control device that includes a delay circuit that shifts the timing at which the strobe signal is applied, and shifts the timing at which the strobe signal is applied to each driver IC.

[0005]

However, in the control of the printer using the conventional delay circuit, a latch signal for fetching the next row of data into the latch is generated during the input of the delayed strobe signal. May be given. In this case, the power supply to the plurality of driver ICs is cut off at the same time, and a sharp voltage drop occurs, which may cause noise. In addition, the drive circuit related to the strobe signal interrupted on the way cannot supply a sufficient amount of current to the heating element, and as a result, the heating amount of the heating element becomes insufficient and the print quality deteriorates. There was a problem.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned conventional problems, and to prevent a next latch signal from being inputted during the input of the delayed strobe signal, thereby suppressing the generation of the noise. To provide a control device.

[0007]

In order to achieve the above object, a printer control apparatus according to the present invention comprises a plurality of heating elements for forming print pixels and a plurality of heating elements for driving each of the heating elements. A drive circuit provided correspondingly, divided into a plurality of groups, a first storage circuit for temporarily holding print pixel data corresponding to the number of the heating elements, and a predetermined timing signal A second storage circuit that inputs the print pixel data held in the first storage circuit in parallel based on the second storage circuit and temporarily holds the print pixel data held in the second storage circuit, A starting signal generating circuit for generating a starting signal to be taken into each driving circuit; and a starting signal shifted from the driving circuit by a predetermined time for each group of the driving circuits based on the starting signal from the starting signal generating circuit. A delay circuit that supplies a signal, and a timing signal control circuit that prohibits the timing signal from being supplied to the second storage circuit while the activation signal supplied to each group of the drive circuits is valid. Be composed.

In the above configuration, when a timing signal for taking in the next data into the second storage circuit is supplied while the start signal delayed by the delay circuit is supplied to each driving circuit, The signal control circuit prohibits a timing signal from being input to the second storage circuit. As a result, simultaneous cutoff of the drive circuit is prevented, and the generation of noise based on this is eliminated.

In the present invention, the timing signal control circuit is a first gate circuit having an input terminal for inputting a start signal output from the delay circuit to each group of the drive circuits and one output terminal. When all of the activation signals input from the input terminal are not valid, a predetermined value is output from the output terminal, and the predetermined value is output from an output terminal of the first gate circuit. And a second gate circuit that supplies the timing signal to the second storage circuit only when the second storage circuit is provided.

In the present invention, the timing signal control circuit includes a timer circuit for measuring a predetermined time after a start signal is given to the first group of the drive circuits, and a timer circuit for measuring a predetermined time by the timer circuit. And a gate circuit that supplies the timing signal to the second memory circuit.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram according to an embodiment of a printer control device of the present invention. In the figure, the printer has a number of heating elements (resistors) R _{1 to} R _n for simultaneously printing one line of print pixel data. The heating elements R _{1 to} R _n are arranged at the tip of a print head extending along the width direction of the thermal paper as a print medium, and simultaneously form one row of pixels on the paper by selective heating drive. .

In the embodiment, the heating elements R _{1 to} R _n include 4
One driver ICDr ₁ ~Dr ₄ is connected as a driving element. Each driver ICDr ₁ ~Dr ₄ are each provided with a plurality of driving circuit for driving the plurality of heating elements, the four drivers ICDR ₁ ~
All the heating elements R _{1 to} R _n are heated and driven by Dr ₄ . In one embodiment, for 640 heating elements, each driver IC is connected to and drives 160 heating elements.

[0013] Each driving circuit of each driver ICDr ₁ ~Dr ₄ is composed of a single transistor Tr, an AND circuit 10 connected to its output to the base of the transistor Tr. AND circuit 10 inputs the print pixel data from the strobe signal St ₁ ~St ₄ and the latch 12 from the delay circuit 13 to be described later, when both signals are "High", thereby driving the transistor Tr. That is, when the data “1” meaning “print” is given as the print pixel data, the strobe signal is “Low”.
From “High”, that is, when the transition is made effectively, AN
“High” is output from the D circuit 10, and the transistor Tr is driven. Thus, the corresponding heating element R ₁
To R _n is heated, the corresponding area of the thermal paper is colored by receiving the heat pulse.

The printer according to the present embodiment has a shift register 11 and a latch 12 for temporarily storing one line of print pixel data. The shift register 11 receives and holds one line of print pixel data in synchronization with the clock signal. The print pixel data is data corresponding to each row of print pixels, and is composed of a bit string of “1” meaning “print” and “0” meaning “not print”. The latch 12 is connected to the shift register 1
1 is connected in parallel to each other, and transfers and holds each bit data on the shift register to its corresponding storage area in parallel. The transfer timing of data from the shift register 11 to the latch 12 is determined by a signal output from the latch signal control circuit 14 (hereinafter referred to as an output latch signal L _out).
Is controlled by the input timing to the latch 12). Each storage area of the latch 12 as described above is connected to an input terminal of the AND circuit 10 of the driver ICDr ₁ ~Dr _4, when the new data is taken into the latch 12 by the input of the output latch signal L _out, The input data to the AND circuit 10 is immediately changed according to the contents.

The delay circuit 13 receives the strobe signal St, and outputs four strobe signals (hereinafter, referred to as "strobe signals") delayed by a predetermined time from the input timing of the strobe signal St.
This produces a) of delayed strobe signal St ₁ ~St _4. Strobe signal St input to delay circuit 13
Is transitioned to “High” in accordance with the timing of printing, and is maintained for a predetermined time and then returned to “Low”. The heating elements R _{1 to} R _n are connected to “H” of the strobe signal St.
Since the heating is performed during the “high” period, the “high” period is determined in consideration of the heat generation period suitable for printing.
Note that in this specification, the strobe signal St is valid during this “High” period.

The four delayed strobe signal St ₁ ~St ₄ delay circuit 13, each of the four drivers ICDR ₁ ~
It corresponds to Dr ₄ and is input to each of these AND circuits 10. That is, each AND of the _first driver ICDr ₁
The circuit 10 receives the delayed strobe signal St ₁ , and the AND circuit 10 of the _second driver ICDr ₂ receives the delayed strobe signal St ₂ of each A of the _third driver ICDr ₃ .
The delay strobe signal St ₃ is input to the ND circuit 10, and the delay strobe signal St ₄ is input to each AND circuit 10 of the _fourth driver ICDr ₄ . The delayed strobe signal St ₁ input to the driver ICDr ₁ is
After the strobe signal St is input to the delay circuit 13, the signal is made "High", that is, made valid without giving a predetermined delay time. Delayed strobe signal St ₂ which is input to the driver ICDR ₂ is delayed strobe signal St ₁ is "Hig
h ”, and after a delay of a predetermined delay time T ₁ ,“ Hi ”
gh ”. Delayed strobe signal St ₃ which is input to the driver ICDR ₃ is the delayed time T ₁ delay delayed strobe signal St ₂ is from the transition to the "High" to "High". Moreover, delayed strobe signal St ₄ inputted to the driver ICDR ₄ is the delayed time T ₁ delay delayed strobe signal St ₃ from being shifted from the "High" to "High". Thus, from the first delayed strobe signal St ₁ is shifted from the "High", the last delayed strobe signal St ₄ is "Hig
before being transited to h ", it is given three times the delay of the delay time T _1. Thus, if the lifetime of one of the delayed strobe signal to the T _2, four delay lifetime of the strobe signal St ₁ ～St ₄ is a 3T ₁ + T ₂ (FIG. 4
See).

The AND circuit 10 of each of the driver ICs
The transistor Tr is driven according to the data of the latch 12 during a period when the delay strobe signal applied thereto is “High”. The timing of the rising and falling edges of the delayed strobe signal St ₁ ~St ₄ given to each driver ICDr ₁ ~Dr ₄ by the action of the delay circuit 13, since the offset for each driver IC, falling simultaneous rising and falling In this case, a rapid current fluctuation at the time is avoided.

The latch signal control circuit 14 controls the latch signal L
_{When "in"} is input during the valid period of the delay strobe signal, the input of "in" is prohibited from being supplied to the latch 12. That is, the latch signal control circuit 14
The effective period outside of the latch signal L _in the delayed strobe signal, that is, when all of the delayed strobe signal is in a state of "Low" is directly latches the latch signal 12
Output to (the output latch signal L _out), when the life of the latch signal L _in the delayed strobe signals, i.e. either of the delayed strobe signal is in a state of "High" does not output a latch signal. FIG. 2 shows an embodiment of the latch signal control circuit 14. In this embodiment, the latch signal control circuit 14 is composed of two logic circuits, a NOR circuit 20 and an AND circuit 21. NO
R circuit 20 inputs the four delayed strobe signal St ₁ ~St ₄ from the delay circuit 13, all of "Lo
"High" is output when in the "w" state, and "Low" is output when any of the strobe signals is in the "High" state.

The AND circuit 21 inputs the output and the latch signal L _in from the NOR circuit 20, both "Hi
gh ”as a latch signal L _out , and“ High ”as a latch signal L _out .
"Low" is output.

[0020] When any one of the delayed strobe signal St ₁ ~St ₄ from the delay circuit 13 is output by the arrangement, when the latch signal L _in is input, the AND circuit 21
Does not output this to latch 12. In this way,
While the delay strobe signals St _{1 to} St ₄ are valid, the input of the latch signal to the latch 12 is prohibited.

FIG. 3 shows another embodiment of the latch signal control circuit 14. In this embodiment, the latch signal control circuit 14 includes the timer circuit 30 and the AND circuit 3
1. The timer circuit 30 is started (reset) at the timing when the strobe signal St (or the first delayed strobe signal St ₁ ) is input, and outputs a predetermined time “High”. After a lapse of a predetermined time, the output transits to the initial “Low”. This predetermined time is
It is set to the valid period of all delay strobe signals St _{1 to} St ₄ , that is, 3T ₁ + T ₂ . Therefore, the timer circuit 3
0 outputs “High” only while all the delay strobe signals St _{1 to} St ₄ are valid.

The AND circuit 31 is connected to the timer circuit 30.
Of the inverted output and the input of the latch signal L _in, both "H
“High” is output as the latch signal L _out only when the state is “high”, and in other states,
"Low" is output.

[0023] After the strobe signal St is given by the arrangement, when the timer circuit 30 measures the predetermined time, when the latch signal L _in is input, the AND circuit 31, outputs it to the latch 12 do not do. Thus, while delayed strobe signal St ₁ ~St ₄ is valid, the latch signal to the latch 12 is prohibited from being input.

FIG. 4 is a timing chart of signals in the control device according to the embodiment. The operation of the control device will be described below with reference to FIG. 1 and FIG. FIG The Note especially the state of the delayed strobe signal St ₁ input latch signal is inputted to the lifetime of ~St ₄ L _in and output latch signal L _out is the output of the latch signal control circuit 14.

As shown in the figure, the print pixel data D for one row is supplied to the shift register 1 in synchronization with the clock signal C.
It is taken into 1. Thereafter, the latch signal control circuit 14
To the latch signal L _in is input, a latch signal control circuit 14, depending on whether the delayed strobe signal St ₁ ~St ₄ is valid, and outputs a latch signal L _out. The latch 12 receives the latch signal L _out and takes in the print pixel data D of the shift register.

On the other hand, the strobe signal St is input to the delay circuit 13 at the timing of starting printing. Delay circuit 13
Starts with four delayed strobe signals St ₁
~ St ₄ with a delay of T ₁ time,
It outputs to each of the drive circuits r _{1 to} Dr ₄ . When the first delay strobe signal St ₁ is applied to each drive circuit of the _first driver ICDr ₁ , the print pixel data of the corresponding area in the latch 12 is read, and accordingly, the corresponding heating element R Is driven by heating. Delayed time T ₁ only with this timing, the second delayed strobe signal St ₂ is supplied to the second drive circuits of the driver ICDR _2. As a result, the print pixel data of the corresponding area in the latch 12 is read, and the corresponding heating element R is driven to heat accordingly. Similarly, delayed _one hour T, sequentially delayed strobe signal St ₃ and St ₄ driver ICDR ₃
, And Dr ₄ , and the corresponding heating element R is heated and driven. Thus, each driver IC Dr ₁
The drive start time and the drive end time of Dr ₄ are shifted by T ₁ , and the corresponding current waveform V _H has a mesa shape as shown in FIG. 4, and the current rapidly rises and falls. Is avoided.

Here, the delay strobe signals St ₁ to St ₁
(In the figure, the period T) lifetime of St ₄ in, the case where the latch signal L _in is applied to the latch signal control circuit 14 (reference numeral 40). In this case, the latch signal control circuit 14
Does not output this to the latch 12 as described above. Thus, the switching of the driving circuit over a plurality of the driver IC is avoided, the state of the current waveform V _H is maintained.

As described above, an embodiment of the present invention has been described with reference to the drawings. However, the present invention is not limited to the matters described in the embodiment, and the claims and the detailed description of the invention, and The range in which those skilled in the art can make changes and applications based on well-known techniques is included. In the above embodiment, only a circuit configuration example of the control device of the present invention is shown, and the control device according to the present invention can be configured by another known method. In the above embodiment, the number of driver ICs is four, but the scope of the present invention is not limited to the number of driver ICs. For example,
Driving circuits in one driver IC may be divided into a plurality of groups, each of which may be configured to supply a delayed strobe signal.

[0029]

As described above, according to the present invention, while the start signal delayed by the delay circuit is given to each drive circuit, the timing signal for taking the next data into the second storage circuit is generated. When given, the timing signal control circuit prohibits a timing signal from being input to the second storage circuit. As a result, simultaneous cutoff of the drive circuit is prevented, and a sharp current drop is eliminated. As a result, generation of noise is eliminated, and problems of malfunction of the apparatus and deterioration of print quality are avoided.

[Brief description of the drawings]

FIG. 1 is a circuit diagram according to an embodiment of a printer control device of the present invention.

FIG. 2 is a circuit diagram showing one embodiment of a latch signal control circuit according to the present invention.

FIG. 3 is a circuit diagram showing another embodiment of the latch signal control circuit according to the present invention.

FIG. 4 is a timing chart of signals in the control device according to the present invention.

[Explanation of symbols]

10 the AND circuit 11 shift register 12 latch 13 delay circuit 14 latch signal control circuit 20 NOR circuit 21 the AND circuit 30 a timer circuit 31 the AND circuits R ₁ to R _n heating elements Dr ₁ ~Dr ₄ driver IC Tr transistor L _in input latch signal L _out output latch signal St strobe signal St ₁ ~St ₄ delayed strobe signal

Claims (3)

[Claims] 1. A plurality of heating elements for forming print pixels, and a driving circuit provided for the heating elements for driving each of the heating elements, the driving circuits being divided into a plurality of groups. A first storage circuit for temporarily storing print pixel data corresponding to the number of the heating elements; and a print pixel data stored in the first storage circuit in parallel based on a predetermined timing signal. A second storage circuit for inputting and temporarily storing, a start signal generating circuit for generating a start signal for causing each of the drive circuits to capture the print pixel data held in the second storage circuit; A delay circuit for providing the drive signal to the drive circuit with a predetermined time delay for each group of the drive circuits based on a start signal from the signal generation circuit; And a timing signal control circuit for prohibiting the timing signal from being supplied to the second storage circuit while the motion signal is valid. 2. The first gate circuit, comprising: an input terminal for inputting a start signal output from the delay circuit to each group of the drive circuits, and one output terminal, A case where a predetermined value is output from the output terminal when all the activation signals input from the input terminal are not valid; and a case where the predetermined value is output from an output terminal of the first gate circuit. The timing signal only to the second
2. The printer control device according to claim 1, further comprising a second gate circuit provided to said storage circuit. 3. A timing signal control circuit, comprising: a timer circuit for measuring a predetermined time after a start signal is given to a first group of the drive circuits; and the timing circuit only when a predetermined time has elapsed by the timer circuit. 2. The printer control device according to claim 1, further comprising: a gate circuit that supplies a signal to the second storage circuit.