JP2000277680A - Method for manufacturing semiconductor package - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor package, whereby external connection electrodes of a substrate can be aligned with high accuracy, in dicing with the substrate's external connection electrode surface adhered onto a flat support surface of a cutter, etc. SOLUTION: In this semiconductor package manufacturing method comprising dicing after a plurality of chips 11 are mounted on the surface 10a of a substrate 10, electrodes 13 are provided on a back surface 10b of the substrate 10, and the substrate 10 is aligned in the condition of the substrate 10 adhered to a flat support surface 14a, a light-permeable part aligned with electrodes 13 is formed on the substrate 10, the back surface 10b of the substrate 10 is adhered to the support surface 14a, and the alignment is made for dicing from the surface 10a of the substrate 10 to the light-permeable part as a reference.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a method of manufacturing a semiconductor package formed by dicing a substrate on which an IC chip is mounted. More specifically, the present invention relates to a method of manufacturing a semiconductor package in which alignment for dicing is performed with a substrate adhered to a flat reference surface.

[0002]

2. Description of the Related Art Along with the miniaturization and high-density mounting of semiconductor packages, CSPs (Chip Size Packages) having a small shape almost the same as an IC chip cut from a wafer have been developed.

FIG. 3 shows a conventional CSP manufacturing method.
As shown in FIG. 3A, one surface (front surface) 1 of the substrate 1
a, a plurality of IC chips 2 are mounted via chip connection electrode pads 3. The other surface (back surface) 1b of the substrate 1
The external connection electrode 4 is formed on the substrate. Such a substrate 1
Is adhered to the flat support surface 6a of the support member 6 on, for example, an XY table via an adhesive tape (or an adhesive) 5 with its surface (chip mounting surface) 1a facing down. This X
The Y table is provided in a cutting device such as a dicing saw. In this state, each IC chip 2 is cut and divided along the cutting line 7 using a cutting device such as a dicing saw. As a result, as shown in FIG.
SP8 is formed. The CSP 8 is bonded to motherboards (not shown) of various electronic devices via the external connection electrodes 4.

In this case, when the substrate 1 is diced, the IC chip mounting surface is joined to the supporting member in a state where the external connection electrodes 4 are exposed above the substrate 1. Positioning for dicing can be performed with reference to the electrode 4 while observing.
Therefore, the external electrode 4 important as a CSP product can be positioned with high accuracy relative to the outer shape of the CSP.

[0005]

However, FIG.
As shown in (A), each IC chip 2 mounted on the substrate 1
If the external dimensions are different, the IC chip mounting surface cannot be joined to a flat support surface. In such a case, as shown in FIG. 1B, dicing is performed by bonding the back surface 1b side of the substrate 1 provided with the flat external connection electrodes 4 to the support member 6.

However, when the external connection electrode surface is joined to the support surface 6a of the support member 6 with the electrode surface side down,
Since the external connection electrodes 4 are covered under the substrate and cannot be observed from above, alignment based on these electrodes 4 cannot be performed, and the positional accuracy of the external connection electrodes 4 important as a CSP product is reduced. descend.

The present invention has been made in consideration of the above-mentioned prior art, and is intended to provide an external connection electrode when dicing is performed with the external connection electrode surface side of a substrate adhered to a flat support surface such as a cutting device. It is an object of the present invention to provide a method of manufacturing a semiconductor package which can perform high-accuracy alignment.

[0008]

According to the present invention, a plurality of chips are mounted on a surface of a substrate.
An electrode is provided on the back surface of the substrate, and the substrate is aligned and diced in a state where the substrate is bonded to a flat support surface.
Forming a light transmitting portion aligned with the electrode, bonding a back surface side of the substrate to the support surface, and performing positioning for dicing based on the light transmitting portion from the front surface side of the substrate; And a method of manufacturing a semiconductor package characterized by the following.

According to this configuration, for example, light is irradiated from the back side in a state where the back side of the substantially flat substrate on which the electrodes are formed is adhered to the flat support surface, so that the substrate previously aligned with the electrodes is formed. The light can be transmitted through the light transmitting portion, and the electrode on the back side covered with the substrate can be aligned by observing this light from the front side of the substrate.

In a preferred configuration example, at least a part of the substrate is formed only of a light transmitting material, and a positioning mark for dicing is provided on the light transmitting material portion. The positioning mark is detected from the substrate surface side by irradiating the substrate, and the positioning of the electrodes is performed with reference to the positioning mark.

According to this structure, a positioning mark pre-aligned with the electrode on the rear surface of the substrate is provided on the light transmitting portion of the substrate, and the positioning mark is observed from the front surface of the substrate by irradiating light from the rear surface of the substrate. Thus, the positioning of the electrodes is performed based on the positioning marks.

In another preferred configuration, the substrate has a positioning through hole, and positioning for dicing is performed based on the through hole.

According to this configuration, the through hole for alignment is used as a reference when setting the substrate and also as a reference for alignment for forming the electrode pattern. The position of the electrode on the back surface of the substrate can be adjusted.

In another preferred configuration example, a plurality of general chips having different shapes are mixed on the substrate.

According to this configuration, highly accurate electrode positioning can be performed on a substrate such as a module in which general chips having different shapes are mixed, and the present invention is applied to modules of various electronic products. Reliability can be improved.

[0016]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is an explanatory diagram of a CSP manufacturing process according to an embodiment of the present invention.

On the surface 10a of the substrate 10, a plurality of IC chips 11 (only one is shown)
Implemented via Each IC is provided on the back surface 10b of the substrate 10.
External connection electrodes 13 are formed corresponding to the chips 11. This substrate 10 is formed of a translucent resin material that transmits light, and in the case of a multilayer wiring structure, an inner layer pattern 19 is formed. The inner layer pattern 19 is not formed near the end 10 c of the substrate 10, and light is transmitted near the end 10 c of the substrate 10. A positioning mark 16 is formed in a light transmitting portion near the substrate end 10c. Since the positioning mark 16 is formed by patterning with the external connection electrode 13 by a photolithography method, the positioning mark 16 is formed on the back surface of the substrate in a state where the positioning mark 16 is aligned with the external connection electrode 13 with extremely high accuracy.

Such a substrate 10 is provided with the external connection electrode 1.
The support member 14 is placed via an adhesive tape (or an adhesive) 18 with the substantially flat back surface 10b on which the surface 3 is formed facing downward.
Is joined to the flat support surface 14a on the upper surface. Support member 1
4 includes a light source 15 on the back side of the end 10 c of the substrate 10. A camera 17 is provided above the end 10 c of the substrate 10.

In the above configuration, the light source 15 causes the substrate 1
An end 10c (light transmitting portion) of the substrate is illuminated from the back side of the substrate 0, and the camera 17 captures an image of the positioning mark 16. By image processing of the imaged positioning mark 16,
The position of the external connection electrode 13 is detected from the position of the positioning mark 16. An XY table (not shown) on which the support member 14 is mounted is driven based on the detected position data so that the external connection electrode 13 is arranged at a predetermined position with respect to a cutting device such as a dicing saw (not shown). The substrate 10 is aligned. In such a state, the substrate 10 is divided for each IC chip by a dicing saw or the like. After the division, the support member 14 is peeled off with a solvent or the like to form a CSP alone.

In the above embodiment, alignment is performed by transmitting light through the substrate itself and irradiating light from the back side.
Instead of such a configuration, a through hole may be provided in the substrate, and the through hole may be observed from the surface side of the substrate, and the positioning may be performed with reference to the through hole. In this case, if the through-hole is clearly visible from the substrate front side due to the size of the through-hole and the contrast with the supporting member on the back side of the substrate, the XY table, or the like, the front side without irradiating light from the back side of the substrate. Positioning can be performed by observation or imaging.
When the through-hole is difficult to see or when the detection accuracy and reliability are further increased, a light source may be provided on the back surface side of the substrate as in the embodiment of FIG. 1 to irradiate the through-hole.

Such a through-hole may be newly formed in alignment with the external connection electrode patterned on the substrate, or by utilizing an alignment through-hole originally formed in the substrate. Is also good. Since the wiring pattern of the external connection electrode and the like is formed with reference to the through hole for alignment, the external connection electrode is positioned at a predetermined position with respect to the cutting device by performing alignment using the through hole. can do. If the existing through-holes for alignment are used, the positioning accuracy of the external connection electrodes can be easily improved without providing new equipment or modifying.

FIGS. 2A and 2B are explanatory views in which the positioning method using such a through hole is compared with a conventional technique, wherein FIG. 2A shows the conventional technique and FIG. 2B shows the method of the present invention. Conventionally, as shown in (A), the land patterns 22, 23 on the front surface 20a and the back surface 20b of the substrate 20 are separately positioned from different sides, respectively. For example, the displacement between the land patterns on both sides is 2c at the maximum.

On the other hand, according to the method of the present invention, the substrate 20
The through hole 21 provided on the front surface 20a is visually or imaged with a camera, and the land pattern 23 on the rear surface is aligned with the land pattern 22 on the front surface. And c becomes theoretically, and the amount of displacement is theoretically halved compared to the conventional method.

[0024]

As described above, in the present invention, the substantially flat back surface of the substrate on which the electrodes are formed is adhered to the flat support surface, for example, by irradiating light from the back surface, thereby obtaining the back surface of the substrate. The light passes through the light transmitting portion (substrate itself or through hole) of the substrate which is pre-aligned with the electrode of
The alignment of the light transmitting portion can be performed from the front side of the substrate, and the alignment of the electrode on the back side can be performed.

Thus, the position of the electrode formation surface on the back surface of the substrate can be adjusted without being affected by the state of the IC chip mounting surface on the front surface of the substrate, and the electrode position accuracy with respect to the outer shape of the semiconductor package is improved. In addition, since dicing is performed with the electrode surface facing down, dust and other impurities such as cutting powder hardly adhere to the electrode, thereby improving the quality.

[Brief description of the drawings]

FIG. 1 is a sectional view of a substrate in a middle of a substrate cutting step according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram comparing a state of displacement due to a through hole between a conventional technique and the method of the present invention.

FIG. 3 is an explanatory view of a conventional CSP manufacturing method.

FIG. 4 is an explanatory view of a conventional CSP manufacturing method of different chip sizes.

[Explanation of symbols]

1: substrate, 2: IC chip, 3: IC connection electrode pad, 4: external connection electrode, 5: adhesive tape, 6: support member, 7: cutting line, 8: CSP, 10: substrate, 10a: surface , 10b: back surface, 11: IC chip,
12: chip connection electrode pad, 13: external connection electrode, 14: support member, 14a: support surface, 15: light source, 1
6: positioning mark, 17: camera, 18: adhesive tape, 19: inner layer pattern, 20: substrate, 21: through hole,
22, 23: Land pattern.

Claims (4)

[Claims] 2. A semiconductor package comprising: mounting a plurality of chips on a surface of a substrate; providing electrodes on a back surface of the substrate; and positioning and dicing the substrate with the substrate adhered to a flat support surface. In the method, a light transmitting portion aligned with the electrode is formed on the substrate, a back surface side of the substrate is adhered to the support surface, and dicing is performed from the front surface side of the substrate with reference to the light transmitting portion. A method for manufacturing a semiconductor package, comprising: 2. A method according to claim 1, wherein at least a part of said substrate is formed only of a light transmitting material, a positioning mark for dicing is provided on said light transmitting material, and light is applied to said light transmitting material from the back side of the substrate. 2. The method of manufacturing a semiconductor package according to claim 1, wherein the positioning mark is detected from the substrate surface side, and the positioning of the electrodes is performed with reference to the positioning mark. 3. The method of manufacturing a semiconductor package according to claim 1, wherein said substrate has a through hole for positioning, and positioning for dicing is performed based on said through hole. 4. The method according to claim 1, wherein a plurality of general chips having different shapes are mixed on the substrate.