JP2000277615A - Wiring-forming device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To restrain a metal wiring from increasing in parasitic capacitance by a method wherein a dummy metal basic pattern low in metal density is spread over blocks adjacent to the metal wiring, and another dummy metal basic pattern high in metal density is spread over other blocks apart from the metal wiring. SOLUTION: A wiring-forming device automatically designs two metal wirings 11 and 12 corresponding to an operator's control or in accordance with previously determined algorithm, and dummy metals located within a range equal to the length of the side of a dummy metal basic pattern are arranged so as to be a dummy metal basic pattern P1. A dummy metal basic pattern 2 of high metal density is arranged in the other blocks. Thereafter, the metal wirings 11 and 12 are considered to be enhanced in width, a part of a dummy metal- included in the thick metal wirings is eliminated, and dummy metals 21a and 21b are arranged.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring forming apparatus for designing a metal wiring in a region corresponding to a semiconductor chip on a floor plan.

[0002]

2. Description of the Related Art Conventionally, when a metal multilayer wiring is formed on a floor plan, the surface is flattened when the metal wiring is actually formed on the semiconductor substrate, and the width dimension of the metal wiring is made uniform during etching. A dummy metal pattern may be added to improve the reliability of wiring formation.

FIG. 1 to FIG. 3 are views showing a region or a part of a region assuming a semiconductor chip.

FIG. 1 shows two metal wirings 1 in a region D.
1 and 12 are shown, and FIG.
In addition to the metal wirings 11 and 12 in the region D,
The dummy metal 21 is arranged in a region excluding the region in the vicinity of.

FIG. 3A shows each metal wiring 1.
In addition to 1 and 12, a large number of island-shaped dummy metals 21 are arranged. The dummy metal 21 shown in FIG. 3A is arranged as follows. That is, first, the dummy metal basic pattern P shown in FIG. 3B, in which the dummy metal 21 'is arranged only in a part of one block B, is laid all over the area D in FIG. 3A. Next, as in the case of FIG. 2, the widths of the metal wirings 11 and 12 are considered to be widened, and the dummy metal portions overlapping the wide metal wirings are deleted. By doing so, FIG.
As shown in (A), a large number of island-shaped dummy metals 21 can be arranged so as not to overlap with the metal wirings 11 and 12.

[0006]

For example, in consideration of a metal wiring as shown in FIG.
The above design rules are imposed, and conventionally, dummy metals were added to satisfy them.

However, the arrangement of the dummy metal increases the parasitic capacitance of the metal wiring. However, conventionally, no particular consideration has been given to suppressing the increase in the parasitic capacitance.

SUMMARY OF THE INVENTION In view of the above circumstances, the present invention provides a wiring forming apparatus capable of improving the reliability of wiring formation by arranging dummy metals and executing a floor plan in which the parasitic capacitance of metal wiring is suppressed as compared with the related art. The purpose is to provide.

[0009]

According to the present invention, there is provided a wiring forming apparatus for designing a metal wiring in a region corresponding to a semiconductor chip, wherein the region is divided into a plurality of blocks. Storage means for storing a plurality of types of dummy metal basic patterns having different metal densities corresponding to one block at the time, wiring creation means for designing metal wiring in the area, and a plurality of blocks in the area. In the block containing the metal wiring designed in the area when divided into, or the block near the metal wiring including the block including the metal wiring, a dummy metal basic pattern with a low metal density is arranged, A block excluding a block including the metal wiring, or a meta including a block including the metal wiring. A dummy metal basic pattern having a high metal density is arranged in blocks other than the block near the wiring, and the dummy metal in the arranged dummy metal basic pattern, which is in contact with or close to the metal wiring, or in the arranged dummy metal basic pattern. And a dummy metal arranging means for erasing a portion of the dummy metal in contact with or in proximity to the metal wiring.

The wiring creation apparatus of the present invention stores a plurality of types of dummy metal basic patterns having different metal densities, and lays down a dummy metal basic pattern having a low metal density in a block overlapping with a metal wiring or a nearby block. The dummy metal basic pattern with a high metal density is laid in blocks away from the metal wiring. By doing so, the parasitic capacitance of the metal wiring can be reduced while securing the metal density and ensuring the reliability of wiring formation. It can be kept low.

Here, the metal wiring and the dummy metal may be arranged in the same layer, but the present invention is also applied to the case where the metal wiring and the dummy metal are arranged in different layers. Can be. That is, for example, when arranging the dummy metal in the second layer, not only the metal wiring of the second layer but also the metal wiring of the first layer are taken into consideration, and the first metal wiring is considered.
A dummy metal basic pattern with a low metal density may be arranged near the metal wiring of the layer and the second layer, and a dummy metal with a high metal density may be arranged in a block apart from those metal wirings.

[0012]

Embodiments of the present invention will be described below.

FIG. 4 is a block diagram showing an embodiment of a wiring forming apparatus according to the present invention, and FIG. 5 is a diagram showing a wiring pattern (A) and dummy metal basic patterns (B) and (C).

The wiring creating apparatus 100 shown in FIG. 4 is specifically composed of, for example, a computer system and a wiring creating program.
0 (for example, a hard disk of a computer system)
5B, two types of dummy metal basic patterns P1 and P2 shown in FIGS. 5B and 5C are stored.

Although the two types of dummy metal basic patterns P1 and P2 shown in FIGS. 5B and 5C have the same overall dimensions, the area of the dummy metals 21a 'and 21b'
That is, the ratio (metal density) of the area of the dummy metal 21a ', 21b' to the area of each block B1, B2 is different from each other. FIG. 5B shows a dummy metal basic pattern having a low metal density, and FIG. 5C shows a dummy metal basic pattern having a high metal density.

The wiring creating means 110 of the wiring creating apparatus 100 shown in FIG. 4 is a means for designing a metal wiring in a region corresponding to a semiconductor chip, and is automatically designed according to an operation of an operator or according to a predetermined algorithm. Metal wiring is designed. For example, in FIG. 5, two metal wirings 11 and 12 are designed in a region D.

The dummy metal arranging means 120 of the wiring creating apparatus 100 shown in FIG. 4 arranges the dummy metals 21a and 21b as shown in FIG. That is, in this case, the dummy metal within the distance of one side of the dummy metal basic pattern from the wirings 11 and 12 is shown in FIG.
The dummy metal basic pattern P1 is arranged so as to become the dummy metal basic pattern P1 shown in FIG. 5, and the dummy metal basic pattern P2 having a high metal density shown in FIG. 5C is arranged in the other blocks. After that, FIG.
Similarly, when the width of the metal wirings 11 and 12 is increased, dummy metal portions included in the wide metal wirings are deleted. By doing so, the dummy metals 21a and 21b are arranged in the pattern shown in FIG.

According to the dummy metal pattern shown in FIG. 5A, the dummy metal is relatively small in the vicinity of the metal wiring, and the increase in the parasitic capacitance of the metal wiring can be suppressed. Further, a predetermined metal density is secured for the entire region D, and a highly reliable metal wiring is formed.

In the description with reference to FIG. 5, a dummy metal which falls within a distance of one side of the dummy metal basic pattern from the metal wirings 11 and 12 becomes a dummy metal basic pattern having a low metal density shown in FIG. 5B. As described above, the dummy metal basic pattern is arranged. For example, a block (for example, block B) through which metal wirings 11 and 12 pass is described.
3) Only a dummy metal basic pattern having a low metal density may be arranged, or a dummy metal basic pattern having a low metal density may be arranged in a wider range of blocks near the metal wirings 11 and 12.

Although two types of dummy metal basic patterns are spread here as shown in FIGS. 5B and 5C, three or more types of dummy metal basic patterns having different metal densities may be spread.

Further, FIG. 5A shows a metal wiring and a dummy metal arranged in the same layer, but the same may be applied between a metal wiring and a dummy metal in different layers. .

[0022]

As described above, according to the present invention, the parasitic capacitance of the metal wiring can be suppressed while ensuring the reliability of the wiring formation.

[Brief description of the drawings]

FIG. 1 is a diagram showing a region or a part thereof assuming a semiconductor chip.

FIG. 2 is a diagram showing a region or a part thereof assuming a semiconductor chip.

FIGS. 3A and 3B are a diagram showing a region or a part thereof assuming a semiconductor chip and a diagram showing a dummy metal basic pattern. FIGS.

FIG. 4 is a block diagram illustrating an embodiment of a wiring creation apparatus according to the present invention.

FIG. 5 is a diagram showing a wiring pattern (A) and dummy metal basic patterns (B) and (C).

[Explanation of symbols]

 11, 12 metal wiring 21, 21 'dummy metal P, P1, P2 dummy metal basic pattern D area B, B1, B2, B3, B4 block 100 wiring creating device 110 wiring creating means 120 dummy metal arranging means 130 storage means

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (reference) H05K 3/00

Claims (1)

[Claims] 1. A wiring creation apparatus for designing a metal wiring in a region corresponding to a semiconductor chip, wherein a plurality of types of dummy having different metal densities correspond to one block when the region is divided into a plurality of blocks. Storage means for storing a basic metal pattern; wiring creation means for designing a metal wiring in the area; and metal wiring designed in the area when the area is divided into a plurality of blocks. In a block or a block near the metal wiring including a block including the metal wiring, a dummy metal basic pattern having a low metal density is arranged, and a block excluding a block including the metal wiring or a block including the metal wiring Except for the block near the metal wiring including A basic pattern is arranged, and a part of the arranged dummy metal basic pattern which is in contact with or close to the metal wiring or a part of the dummy metal in the arranged dummy metal basic pattern which is in contact with or close to the metal wiring is erased. And a dummy metal arranging means.