JP2000269425A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device, capable of improving the breakdown strength of an electronic circuit utilizing a polysilicon resistor. SOLUTION: For this semiconductor device, a silicon region 4 insulated by an insulating layer 2 and a dielectric isolation region 3 is formed on an SOI substrate 1, a polysilicon resistor 6 is formed via an insulation protective film 5 at the upper part of the silicon region 4, the polysilicon resistor 6 and the silicon region 4 are electrically connected, and the polysilicon resistor 6 is used as a resistor.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a built-in resistor that can be used in a high-voltage circuit.

[0002]

2. Description of the Related Art In recent years, there has been an increasing demand for intelligent power devices in which a high voltage circuit and a large current driving circuit are integrated in an integrated circuit. In particular, power devices using SOI substrates, which take advantage of easy latch-up measures and low power consumption, are increasing. In a power device, a resistance element made of polysilicon is often used as a high resistance element.

[0003] A conventional example will be described below with reference to the drawings. FIG. 3 is a sectional structural view of a semiconductor device in which a polysilicon resistor is formed on an SOI substrate.

In FIG. 3, 1 is a silicon substrate, 2 is an insulating layer, and 3 is a dielectric isolation region. Two silicon substrates (one silicon substrate is 1 and the other silicon substrate is 4)
And the like are bonded together via an insulating layer 2 to form a silicon isolation region 3 on the other silicon substrate side of the SOI substrate to form a silicon region 4. This silicon region 4 is electrically isolated from the surroundings by the insulating layer 2 and the dielectric isolation region 3. Then, an insulating protective film 5 is formed on the silicon region 4, and a polysilicon resistor 6 is formed thereon. Metal wires 7 are provided at both ends of the polysilicon resistor 6, and are electrically connected to other devices. 8 is an insulating protective film.

Since an electrical signal is applied to the polysilicon resistor 6 configured as described above via the metal wiring 7, a potential difference occurs between the polysilicon resistor 6 and the silicon region 4. Therefore, it is necessary to appropriately set the thickness of the insulating protective film 5 to guarantee the withstand voltage.

[0006]

However, in the above-described conventional configuration, when the operating voltage is high, such as in a high breakdown voltage device, an electronic circuit utilizing the polysilicon resistor 6 must be used unless the insulating protective film 5 is thickened. Pressure cannot be secured. For example, if the insulating protective film 5 made of SiO ₂ is deposited to a thickness of about 1 μm, the withstand voltage (dielectric breakdown voltage) of the insulating protective film 5 itself is about 1000 V. However, when a high voltage is applied to the polysilicon resistor 6, Channels (not shown) are likely to be formed in the silicon region 4 immediately below the silicon region 6, and devices configured in the silicon region 4 are likely to malfunction. In order to eliminate such a problem, when a voltage of 500 V is applied, the thickness of the insulating protective film 5 needs to be at least 2 μm. However, when the thickness of the insulating protective film 5 is increased, the processing time for forming the insulating protective film 5 becomes longer, which is disadvantageous in terms of cost. Further, it is necessary to open the insulating protective film 5 in order to form a contact window and a diffusion window of the device. However, if the insulating protective film 5 is made thicker, the step on the wafer surface (base pattern) becomes larger. This may cause a problem of defocus in a subsequent exposure process, a problem of disconnection of a metal wiring at a step portion, and the like.

When SiO ₂ is formed as the insulating protective film 5, silicon (Si) on the surface of the silicon substrate 1, the silicon region 4, etc. is oxidized, and the thickness of the silicon region 4 in the finished state is reduced by diffusion. There is also a problem that it becomes thinner than the beginning, which causes a reduction in manufacturing accuracy in forming the thickness of the silicon region 4 and the silicon substrate 1.

The present invention solves the above-mentioned conventional problems and provides a semiconductor device capable of increasing the breakdown voltage of an electronic circuit utilizing a polysilicon resistor without forming a thick insulating protective film on a silicon region. Is what you do.

[0009]

In order to achieve this object, a semiconductor device according to the present invention comprises an SOI substrate having a silicon region electrically separated by an insulating layer, and an insulating protective film on the silicon region. And a polysilicon resistor formed therethrough, and has a structure in which one end of the polysilicon resistor is electrically connected to the silicon region.

According to this structure, one end of the polysilicon resistor is electrically connected to the silicon region, so that the polysilicon resistor and the silicon region have substantially the same potential. Since only the voltage between the terminals of the silicon resistor is applied, the voltage applied to the insulating protective film is reduced. On the other hand, the SOI substrate is bonded with a thick insulating layer, and it is almost impossible to impair the breakdown voltage at that portion. Therefore, a high voltage can be applied even if the insulating protective film immediately below the polysilicon resistor is thin.

According to another aspect of the invention, there is provided a semiconductor device having an SOI substrate having a plurality of silicon regions electrically separated by an insulating layer, and one SOI substrate formed on each of the plurality of silicon regions via an insulating protective film. , A polysilicon resistor having one end electrically connected to the silicon region, and a structure in which the plurality of polysilicon resistors are connected in series.

With this structure, the voltage drop per polysilicon resistor can be reduced, the voltage applied to the insulating protective film immediately below the polysilicon resistor can be reduced, and the electron using the polysilicon resistor can be reduced. In addition to increasing the withstand voltage of the circuit, the thickness of the insulating protective film can be reduced.

[0013]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows the first embodiment of the present invention.
FIG. 3 is a sectional structural view of a semiconductor device according to an embodiment.

In FIG. 1, 1 is a silicon substrate, 2 is an insulating layer, and 3 is a dielectric isolation region. Two silicon substrates (one silicon substrate corresponds to 1 and the other silicon substrate corresponds to 4 etc.) ) Are bonded together via an insulating layer 2 of 1 μm or more, and a dielectric isolation region 3 is formed on the other silicon substrate side of the SOI substrate to form a silicon region 4.

The silicon region 4 is electrically insulated from the silicon substrate 1 by the insulating layer 2, is electrically insulated from the silicon region surrounding in the lateral direction by the dielectric isolation region 3, and the surface of the silicon region 4 is insulated. The structure is insulated by the protective film 5, and is completely insulated from the surroundings. This silicon region 4 may or may not be doped with an impurity, but is doped with a low-concentration N-type impurity in the same manner as a transistor silicon region (not shown) formed in the periphery thereof. If it is built, the manufacturing process can be prevented from becoming complicated.

An insulating protective film 5 of an oxide film or a nitride film is formed on the silicon region 4, and a polysilicon resistor 6 doped with a P-type impurity is formed thereon. Metal wires 7 are provided at both ends of the polysilicon resistor 6 and are electrically connected to other devices, and the metal wires 7 at one end are electrically connected to the silicon region 4. In addition, 8 is an insulating protective film.

As the dielectric isolation region 3, an oxide film (not shown) may be buried in the entire region, or an oxide film (not shown) may be coated on the surface of a groove (not shown). The groove may be filled with a dielectric material such as polysilicon or silicate glass. If the silicon region 4 is formed so as to surround the silicon region 4 doubly, a higher breakdown voltage than that of the single region can be ensured. Although it is different from dielectric isolation in a narrow sense, a trench (not shown) is formed around the silicon region 4, and an isolation region (isolation trench) whose surface is covered only with an oxide film (not shown) is provided. The silicon region 4 may be surrounded and insulated.

The operation of the semiconductor device of the first embodiment configured as described above will be described below.

Since one end of the polysilicon resistor 6 is electrically connected to the silicon region 4, the potential of the polysilicon resistor 6 and the potential of the silicon region 4 become substantially the same, and the insulating protection film 5 immediately below the polysilicon resistor 6 is formed. Is the voltage between the terminals of the polysilicon resistor 6, and the insulating protection film 5
The applied voltage to is reduced. On the other hand, the SOI substrate is 1 μm
The above-mentioned thick insulating layer 2 is attached. For example, when the insulating layer 2 is made of SiO ₂ , a thickness of about 1 μm
With a withstand voltage of 000 V, it is almost impossible for a general high withstand voltage semiconductor device (semiconductor device with a specification of several hundred V) to lose the withstand voltage at that portion. On the other hand, since the dielectric isolation region 4 has a width of several μm, the breakdown voltage is generally higher than that of the insulating layer 2. Therefore, a high voltage can be applied to the polysilicon resistor 6 if the circuit is designed so that the voltage drop between the terminals does not increase even if the insulating protective film 5 immediately below the polysilicon resistor 6 is thin.

More specifically, when the insulating protective film 5 has a thickness of 0.2 μm, the polysilicon resistance is adopted as a load resistance of an electronic circuit having a power supply voltage of 100 V as an example of a high voltage circuit, and a full swing operation is performed. Even if this is done, the withstand voltage is not impaired, and when the film thickness is 1 μm, full swing operation can be performed at a power supply voltage of 500 V.

If a circuit is designed so that the maximum voltage between the terminals of the polysilicon resistor 6 is reduced to a fraction of the power supply voltage, a high voltage is applied to one end of the polysilicon resistor 6. It is also possible. For example, even if the thickness of the insulating protective film 5 is 0.2 μm, if a circuit is designed so that the maximum voltage between terminals is limited to 100 V, a high power supply of 500 V It is also possible to apply a voltage. And the insulating protective film 5
Can be set to 1 μm or less, the step of the underlying pattern generated when forming the diffusion window and the contact window does not matter much.

Since one end of the polysilicon resistor 6 is connected to the silicon region 4,
Is added equivalently.
A width of at least several μm is required to form the dielectric isolation region 3, and the area facing the silicon region adjacent in the horizontal direction is smaller than the area of the silicon substrate 1 adjacent in the vertical direction. Most of the parasitic capacitance component associated with the silicon region 4 is occupied by the value of the parasitic capacitance with the silicon substrate 1.

Next, a semiconductor device according to a second embodiment will be described with reference to the drawings. FIG. 2 is a sectional structural view of a semiconductor device according to the second embodiment.

In FIG. 2, 1 is a silicon substrate, 2 is an insulating layer, 3 is a dielectric isolation region, and two silicon substrates (one silicon substrate corresponds to 1, the other silicon substrate 4-1 and 4-1). 4-2, 4-3, etc.) are bonded together via an insulating layer 2 of 1 μm or more to form a dielectric isolation region 3 on the other silicon substrate side of the SOI substrate. -3. These silicon regions 4-1 to 4-3 are electrically insulated from each other. An insulating protective film 5 of an oxide film or a nitride film is formed on these silicon regions (4-1 to 4-3), and polysilicon resistors 6-1 to 6-3 are formed thereon. Metal wires 7 are provided at both ends of the polysilicon resistors 6-1 to 6-3 into which the P-type impurities are introduced.
One end of the polysilicon resistor (6-1 to 6-3) is electrically connected to the corresponding silicon region (4-1 to 4-3) and the metal wiring 7 while being electrically connected to another device. It is connected.

As the dielectric isolation region 3, an oxide film (not shown) may be buried in the entire region, or an oxide film may be coated on the surface of a groove (not shown), and polysilicon, A material filled with a dielectric material such as silicate glass may be used. Further, if the silicon region 4 is double-enclosed, a higher withstand voltage can be ensured than that of the single region.

The first embodiment described above is an invention of a polysilicon resistor alone, while the second embodiment is a first embodiment of a polysilicon resistor.
In that a plurality of polysilicon resistors according to the embodiment are connected in series.

With the structure of the second embodiment, the voltage drop per polysilicon resistor (6-1, 6-2, 6-3) can be reduced, and the polysilicon resistor (6 -1, 6-2, 6-3) Insulating protective film 5 immediately below
Can be reduced. Therefore,
A plurality of polysilicon resistors connected in series (6-1, 6-
If 2,6-3) is handled as one resistor, it can be used as a load resistor for a high-voltage circuit operating at a high power supply voltage, and the withstand voltage of an electronic circuit using a polysilicon resistor can be increased. . Further, when the plurality of polysilicon resistors (6-1, 6-2, 6-3) connected in series are made to have the same resistance value, the magnitudes of the respective voltage drops become equal, and the specific polysilicon resistor (6-1, 6-2, 6-3) becomes There is no problem that the silicon resistor is easily damaged. Also, if the number of polysilicon resistors connected in series is increased, the voltage drop per one can be further reduced, and the film thickness of the insulating protective film 5 can be reduced, so that the step of the underlying pattern is small. It is also possible to finish a semiconductor device.

In the first and second embodiments, an example has been described in which the silicon region 4 is surrounded by the single dielectric isolation region 3 for insulation isolation. However, one silicon region 4 is separated by a plurality of dielectric isolation regions. The region 3 may be multiplexed and insulated and separated. Further, the metal wiring 7 for electrically connecting the polysilicon resistor 6 and the lower silicon region 4 may be shared with the metal wiring for connecting other circuits, or may be different. In the second embodiment, the polysilicon resistors (6-1, 6-2, 6-
Although the resistance value in 3) is assumed to be equal, polysilicon resistors having different resistance values may be connected in series. Also,
Although a high potential is applied to the metal wiring 7 connecting one end of the polysilicon resistor 6 and the silicon region 4, it goes without saying that any portion of the polysilicon resistor 6 may be connected to the silicon region 4.

[0029]

As described above, according to the present invention, by electrically connecting the polysilicon resistor and the silicon region, the both can be set to substantially the same potential, and the insulating protective film immediately below the polysilicon resistor is thin. Also, a high voltage can be applied. In addition, by connecting the same polysilicon resistors in series, a voltage drop per one can be reduced, and a remarkable effect that the breakdown voltage of an electronic circuit utilizing the polysilicon resistors can be increased.

[Brief description of the drawings]

FIG. 1 is a sectional structural view of a semiconductor device according to a first embodiment of the present invention;

FIG. 2 is a sectional structural view of a semiconductor device according to a second embodiment;

FIG. 3 is a sectional structural view of a conventional semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Insulating layer 3 Dielectric isolation area 4,4-1,4-2,4-3 Silicon area 5,8 Insulating protective film 6,6-1,6-2,6-3 Polysilicon resistor 7 Metal wiring

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5F032 AA03 AA06 AA09 AA44 AA47 AA49 AA63 5F038 AR09 AR16 AR21 AR22 EZ06 EZ20

Claims (3)

[Claims] 1. An SOI substrate having a silicon region electrically separated by an insulating layer, and a polysilicon resistor formed on the silicon region via an insulating protective film, wherein one end of the polysilicon resistor is provided. And a silicon device electrically connected to the silicon region. 2. An SOI substrate in which first and second silicon substrates are bonded to each other via an insulating layer of 1 μm or more;
A silicon region formed by dielectrically isolating the silicon substrate of the above, and a polysilicon resistor formed on the silicon region via an insulating protective film. One end of the polysilicon resistor and the silicon region are electrically connected to each other. Semiconductor devices connected together. 3. An SOI substrate having a plurality of silicon regions electrically separated by an insulating layer, and one SOI substrate formed on each of the plurality of silicon regions via an insulating protective film,
And a polysilicon resistor having one end electrically connected to the silicon region, wherein the plurality of polysilicon resistors are connected in series.