JP2000260709A5 - - Google Patents

Description

0016.
[Means for solving problems]
FIG. 1 is an explanatory diagram of a principle configuration of the present invention, and a means for solving a problem in the present invention will be described with reference to FIG. 1.
See Figure 1
(1) In the method for crystallizing a semiconductor thin film, the present invention forms a non-single crystal semiconductor thin film 2 containing silicon as a main component on an insulating substrate 1 and then forms the non-single crystal semiconductor thin film 2 into an island pattern. After processing , the insulating film pattern 3 is selectively formed on the non-single crystal semiconductor thin film 2, and then the laser beam 4 is irradiated to form the non-single crystal semiconductor thin film 2 from the end to the center of the insulating film pattern 3. It is characterized by having a step of crystallizing toward a portion.

In this way, after the insulating film pattern 3 is selectively formed on the non-single crystal semiconductor thin film 2, the laser beam 4 is irradiated to form the non-single crystal semiconductor thin film 2 in the insulating film pattern 3 as shown by the arrows in the figure. By crystallizing from the end to the center, a crystallized region 6 having a large crystal grain size can be formed at an arbitrary position only by laser irradiation, thereby reducing the variation in element characteristics. it can.
Further, by forming the island-shaped pattern for forming the device before the insulating film pattern 3 is provided, heat escape is reduced, so that crystallization with lower energy becomes possible, and each island-shaped pattern can be crystallized. The temperature difference becomes smaller, more uniform crystals can be easily obtained, and the beam profile of the laser beam 4 is less affected.
Even in the region where the insulating film pattern 3 is not provided, crystallization proceeds and the polycrystalline region 5 is formed, but the crystal grain size thereof is smaller than that of the crystallized region 6.
Further, "mainly composed of silicon" means silicon itself or a semiconductor obtained by adding an element such as germanium to silicon, and "non-single crystal" means amorphous, microcrystal, and polycrystal. Means.
Further, the wavelength of the laser beam in this case is a wavelength that becomes an absorption wavelength according to the forbidden bandwidth of the non-single crystal semiconductor thin film, and ultraviolet rays are usually used.

( 3 ) Further, the present invention is characterized in that, in the above (1), the line width of the insulating film pattern 3 is larger than the channel length of the thin film transistor by a maximum of 4 μm.

( 4 ) Further, in the present invention, in the semiconductor device using the crystallized semiconductor thin film by the crystallization method according to the above (1) or (2) , the crystallization region 6 immediately below the insulating film pattern 3 is used as an active region. It is characterized by being used.

( 5 ) Further, the present invention is characterized in that, in the above ( 4 ), at least a part of the crystallization region 6 immediately below the insulating film pattern 3 is used as the channel region of the thin film transistor.

( 6 ) Further, the present invention is characterized in that, in the above ( 5 ), only two or less crystal grains are present in the channel length direction of the channel region.

( 7 ) Further, according to the present invention, in the semiconductor device using the crystallized semiconductor thin film by the crystallization method described in (3 ) above, the present invention is adjacent to the channel region in the central portion of the crystallization region 6 immediately below the insulating film pattern 3. A region in which the crystal grain size of the region to be formed is larger than the crystal particle size of the channel region is defined as an electric field relaxation region.

[0032]
BEST MODE FOR CARRYING OUT THE INVENTION
Here, the reference example as a premise of the present invention Before describing the embodiments of the present invention will be described with reference FIGS. 2 to 4, first, with reference to FIGS. 2 and 3, reference example The manufacturing process of the above will be described. In FIGS. 2 (a) to 3 (c), the left side view is a top view of the main part, and the right side view is a cross-sectional view of the main part along the channel length direction. d) is an enlarged view in the circle shown by the broken line in FIG. 3 (c).

As described above, in the reference example which is the premise of the present invention, since the SiO ₂ film pattern 15 is selectively provided and then the laser annealing is performed, crystallization having a crystal particle size of about 0.8 to 1.0 μm is performed. The silicon region 19 can be formed at an arbitrary position with good reproducibility only by laser annealing _{, and since laser irradiation is performed with the SiO 2} film pattern 15 provided, the effect of surface flattening can be expected. Thereby, a TFT substrate made of a TFT having uniform characteristics can be manufactured.

Next, the manufacturing process of the first embodiment of the present invention will be described with reference to FIGS. 5 and 6, and in FIGS. 5 (a) to 6 (c), the figure on the left side is the upper surface of the main part. The figure on the right side is a cross-sectional view of a main part along the channel length direction, and FIG. 6 (d) shows the SiO ₂ film pattern 15 in the circle shown by the broken line in FIG. 6 (c). It is an enlarged view which showed the part see-through.
See FIG. 5 (a)
First, on a transparent glass substrate 11 to be a TFT substrate, a base SiO ₂ film 12 having a thickness of 150 nm and an amorphous silicon film having a thickness of 10 to 200 nm, for example, 50 nm, for example, are used by a plasma CVD method. Amorphous silicon island pattern 21 is formed by _{performing dry etching on an amorphous silicon film using Cl 2} + BCl ₃ as an etching gas using a resist pattern (not shown) having a predetermined shape as a mask. ..

As described above, in the first embodiment of the present invention, in addition to obtaining the same effects as those in the above reference example , the amorphous silicon film is patterned to form the amorphous silicon island-shaped pattern 21, and then SiO. _{Since the two-} film pattern 15 is selectively provided and laser annealing is performed, heat escape is reduced, so that crystallization with lower energy is possible, and the temperature difference between the amorphous silicon island-shaped patterns 21 is large. It becomes smaller and more uniform crystals can be easily obtained, and further, it is less affected by the beam profile of the excimer laser beam 16.

Next, the second embodiment of the present invention will be described with reference to FIGS. 7 to 9, but first, the manufacturing process of the second embodiment of the present invention will be described with reference to FIGS. 7 and 8. Will be explained.
In FIGS. 7 (a) to 8 (c), the left side view is a top view of the main part, and the right side view is a cross-sectional view of the main part along the channel length direction. d) is an enlarged view showing a part _{of the gate electrode and the SiO 2} film pattern in the circle shown by the broken line in FIG. 8 (c).
See FIG. 7 (a)
First, as in the first embodiment described above, a transparent glass substrate 11 to be a TFT substrate is used by a plasma CVD method, for example, a base SiO ₂ film 12 having a thickness of 150 nm and a thickness. After sequentially depositing an amorphous silicon film having a diameter of 10 to 200 nm, for example, 50 nm, dry etching is performed on the _{amorphous silicon film using Cl 2} + BCl _{3 as an etching gas using a resist pattern (not shown) having a predetermined shape as a mask.} By applying, an amorphous silicon island pattern 21 is formed.

As described above, in the second embodiment of the present invention, the _{line width w of the SiO 2} film pattern 22 is set to w ≦ the channel length, in addition to obtaining the same effects as those of the first embodiment described above. Since it is +2 × 2 μm, both sides of the channel region can be offset regions with low resistance, which eliminates the need for an ion implantation process for forming the LDD region, which causes instability of the characteristics. Along with the simplification of the above, it is possible to stabilize the element characteristics.

Further, in the above description of the first embodiment, the crystal grain boundary exists in the center of the channel region, but by setting the gate electrode to 1 μm or less and selecting the region where the gate electrode is provided, the channel in the channel region The grain boundaries may not be present in the long direction, whereby the characteristics of the TFT can be further enhanced.

Further, in the second embodiment described above, the amorphous silicon island pattern is formed and then the SiO ₂ film pattern is formed. However, as in the above reference example , the SiO ₂ film pattern is formed. After irradiating with a laser, it may be patterned into an island pattern.

Further, in the second embodiment _{described above, the SiO 2} film pattern 22 is used as it is as the gate insulating film, _{but after removing the SiO 2} film pattern 22, a new SiO ₂ film or SiN film is deposited. It may be used as a gate insulating film.

Further, in the second embodiment described above, the offset portion is provided without ion implantation, but ion implantation for forming the LDD region may be performed, and the crystallinity of the implanted portion is uniform. And because of the high quality, the resistance value after implantation is stable.

FIG. 2
It is explanatory drawing of the manufacturing process to the middle of the reference example which is the premise of this invention.

FIG. 3
It is explanatory drawing of the manufacturing process after FIG. 2 of the reference example which is the premise of this invention.

FIG. 4
It is explanatory drawing of the Raman shift of the silicon thin film by the reference example which is the premise of this invention.

FIG. 5
It is explanatory drawing of the manufacturing process to the middle of the 1st Embodiment of this invention.

FIG. 6
It is explanatory drawing of the manufacturing process after FIG. 5 of the 1st Embodiment of this invention.

FIG. 7
It is explanatory drawing of the manufacturing process to the middle of the 2nd Embodiment of this invention.

FIG. 8
It is explanatory drawing of the manufacturing process after FIG. 7 of the 2nd Embodiment of this invention.

FIG. 9
It is explanatory drawing of Raman shift of the silicon thin film by 2nd Embodiment of this invention.

Claims (7)

After depositing a non-single-crystal semiconductor thin film mainly composed of silicon on an insulating substrate, the non-single-crystal semiconductor thin film is processed into an island pattern, and then an insulating film pattern is formed on the non-single-crystal semiconductor thin film A crystal of a semiconductor thin film having a step of selectively forming, and then irradiating a laser beam to crystallize the non-single crystal semiconductor thin film from an end portion of the insulating film pattern toward a central portion Method.   2. The method according to claim 1, wherein the line width of the insulating film pattern is 5 [mu] m or less. 2. The method according to claim 1, wherein the line width of the insulating film pattern is a size expanded by at most 4 [mu] m from the channel length of the thin film transistor. A semiconductor device using a crystallized semiconductor thin film according to the method for crystallizing a semiconductor thin film according to claim 1 or 2, wherein the crystallized region directly below the insulating film pattern is used as an active region. . 5. The semiconductor device according to claim 4, wherein at least a part of the crystallization region immediately below the insulating film pattern is used as a channel region of the thin film transistor. 6. The semiconductor device according to claim 5, wherein two or less crystal grains exist in the channel length direction of the channel region. 4. A semiconductor device using a semiconductor thin film crystallized according to the method for crystallizing a semiconductor thin film according to claim 3, wherein a crystal grain diameter adjacent to a channel region at a central portion of a crystallization region directly below the insulating film pattern is the channel region. A semiconductor device characterized in that a region larger than a crystal grain size is an electric field relaxation region.

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