JP2000259677A - Method and device for data processing and information storage medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To automatically generate drawing data for a block diagram from RTL data for an integrated circuit device. SOLUTION: In a state that the graphic data of various circuit blocks are registered in a data storage means 11, RTL data inputted to a data input means 12 are analyzed by a syntax analysis means 13 and a context analysis means 14 and logical structure data connecting nodes by edges are generated. Since a drawing generation means 15 generates the drawing data of each block diagram by substituting the graphic data for the nodes of the logical structure data and substituting connection wires for the edges, the block diagram can be automatically generated from the RTL data of the integrated circuit device.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data processing method and apparatus used for supporting design of an integrated circuit device, and the like.
The present invention relates to an information storage medium storing a program for causing a computer to execute the data processing method of the data processing device.

[0002]

2. Description of the Related Art At present, integrated circuit devices such as ICs (Integrated Circuits) are used in various electronic devices, but recent integrated circuit devices are ULSI (Ultra Large Scale Integ).
(Ration) and the like, the degree of integration is improving and the structure is becoming more complicated. For this reason, it is now essential to support the design of an integrated circuit device by a computer system, and such a computer system is a CA system.
It is called D (Computer Aided Design) system.

[0003] Some of these CAD systems have been constructed so as to particularly support the upstream process of circuit design. Such a CAD system for supporting the upstream design is disclosed in, for example, Japanese Patent Application Laid-Open Nos. 8-235109 and 8-235109. 7-217571
JP, JP-A-6-56952, JP-A-4-22
159, JP-A-5-216947 and JP-A-2-41572.

[0004] Such a CAD system for supporting an upstream design includes: (1) an ES that describes an integrated circuit device to be designed in a block diagram;
Editor function such as DA (Electric System Design Automation) tool. (2) Function to automatically generate RTL data for simulation and logic synthesis. (3) Linkability with floor plan and layout accommodation and signal transmission even in the initial stage of design. This function generally has a function of estimating the delay time, and such a function can favorably support an upstream process of circuit design.

[0005]

SUMMARY OF THE INVENTION CAD for Upstream Design Support
The use of the system makes it easy to create a block diagram of the integrated circuit device to be designed. However, in the conventional method disclosed in the above publications,
Although there is a function for automatically generating RTL data, a block diagram cannot be automatically generated.

That is, even when a block diagram is created corresponding to RTL data, the block diagram is created manually by an operator, and the CAD system can only support the operator's manual operation. Therefore, even if RTL data exists as a past design asset,
It is difficult to create a block diagram using this effectively.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and has a data processing method and apparatus capable of automatically generating a block diagram from RTL data, and a method for causing a computer to execute the data processing method of the data processing apparatus. It is an object to provide an information storage medium in which a program is stored.

[0008]

A data processing device according to the present invention comprises: a data storage means in which a plurality of graphic data individually corresponding to various circuit blocks are registered in advance;
A data input means for inputting RTL data of the integrated circuit device, and an RT input to the data input means;
Syntactic analysis means for synthesizing L data to generate logical structure data in which nodes corresponding to operators and operands are connected by edges, and contextual analysis of RTL data input to the data input means, and a sequential circuit And context analysis means for generating logical structure data in which nodes corresponding to the function circuit and the functional circuit are connected by an edge, and replacing the node of the logical structure data with the graphic data and replacing the edge with connection wiring to block Drawing generating means for generating drawing data of the drawing.

Therefore, according to the data processing method of the data processing device of the present invention, the RTL of the integrated circuit device is stored in a state where a plurality of graphic data individually corresponding to various circuit blocks are registered in the data storage means in advance. The data is input to the data input means. Then, the syntax analysis means parses the input RTL data to generate logical structure data in which nodes corresponding to operators and operands are connected by edges, and converts the input RTL data to context analysis means. Performs context analysis to generate logical structure data in which nodes corresponding to the sequential circuit and the functional circuit are connected by edges. Then, the nodes of the logical structure data generated in this way are replaced with graphic data and the edges are replaced with connection wirings, and the drawing generation means generates the drawing data of the block diagram. The drawing data of the block diagram is automatically generated.

[0010] In the above-described data processing apparatus, it is possible to further include a graphic editor for editing the drawing data generated by the drawing generator. In this case, since the drawing data generated by the drawing generating means is edited by the graphic editor means, for example, the drawing data of the automatically generated block diagram is modified as desired by the operator.

[0011] In the data processing apparatus as described above, it is possible to further include data output means for outputting the drawing data generated by the drawing generating means in a predetermined file format. In this case, since the drawing data generated by the drawing generating means is output in a predetermined file format by the data output means, for example, the drawing data of the automatically generated block diagram can be edited with an existing editor tool. Become.

In the data processing apparatus as described above, the syntactic analysis means and the context analysis means analyze the RTL data for each sentence to generate logical structure data, and the drawing generating means generates a logical When the structure data is completed, the drawing data can be generated.

In this case, since the RTL data is analyzed for each sentence by the syntax analysis means and the context analysis means to generate logical structure data, appropriate logical structure data is generated from the RTL data, and the logical structure data of the entire text is converted. When completed, the drawing data is generated by the drawing generating means, so that the drawing data of the block diagram is appropriately generated.

The various means referred to in the present invention only need to be formed so as to realize their functions. For example, dedicated hardware, a computer provided with appropriate functions by a program, a computer provided by an appropriate program , The functions realized inside, and the combination thereof are allowed.

For example, the data storage means may be any as long as the graphic data is registered in advance as necessary, such as a RAM (Random Access Memory) and a ROM (Read Only).
Memory), FD (Floppy Disc), CD (Compact Disc)
A storage area of an information storage medium such as a ROM is allowed.

The data input means may be any means that accepts input of various data, such as a keyboard for accepting data input by manual operation, a communication I / F (Interface) for accepting data input by signal reception, and FD and C.
A drive device for reading out recorded data from an information storage medium such as a D-ROM is permitted.

An information storage medium according to the present invention is an information storage medium in which computer-readable software is stored. The information storage medium accepts data input of RTL data of an integrated circuit device, and converts the input RTL data into data. Parsing is performed to generate logical structure data in which nodes corresponding to operators and operands are connected by edges, and the RTL data input as data is subjected to context analysis to determine nodes corresponding to sequential circuits and functional circuits as edges. Generating logical structure data connected by, reading graphic data of various circuit blocks such as registers stored in advance, replacing nodes of the logical structure data with the graphic data, and executing the edge processing. Is replaced with connection wiring to generate the drawing data of the block diagram. Program for executing are stored in the computer.

Therefore, when the computer reads the program stored in the information storage medium of the present invention and causes the computer to execute a corresponding processing operation, the computer receives the data input of the RTL data of the integrated circuit device, and The input RTL data is parsed to generate logical structure data in which nodes corresponding to operators and operands are connected by edges, and the input RTL data is context-analyzed into sequential circuits and functional circuits. Generate logical structure data in which corresponding nodes are connected by edges. Then, the graphic data of various circuit blocks stored in advance are read out as necessary, and the nodes of the logical structure data are replaced with the graphic data, and the edges are replaced with the connection wirings to generate the drawing data of the block diagram. Therefore, the drawing data of the block diagram is automatically generated from the RTL data of the integrated circuit device.

The information storage medium referred to in the present invention is not particularly limited as long as a program for causing a computer to execute various processes is stored in advance as software. ROM-ROM, Hard Disk Drive (CD), and CD-RO that is removably loaded into a computer
M, FD, etc. are allowed.

The computer referred to in the present invention may be any device that can read a program made of software and execute a corresponding processing operation.
(Central Processing Unit)
Devices to which various devices such as M, RAM and I / F are connected as necessary are allowed. Note that causing the computer to execute various operations corresponding to software in the present invention also allows the computer to control operations of various devices.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic diagram showing a functional structure of a client server system which is an embodiment of the data processing device of the present invention. FIG. 2 is a block diagram showing a physical structure of a workstation which is a lower device of the client server system. FIG. 3 is a schematic block diagram showing the overall structure of the client server system, FIG. 4 is a schematic diagram showing graphic data of various circuit blocks, and FIG. 5 is a schematic diagram showing RTL data description contents of the integrated circuit device. 6 is a schematic diagram showing a storage structure of the logical structure data by the syntax analysis, FIG. 7 is a schematic block diagram showing a data relationship of the logical structure data by the syntax analysis, and FIG. 8 is storage of the logical structure data complemented by the context analysis. FIG. 9 is a schematic diagram showing the structure, FIG. 9 is a block diagram showing drawing data generated, and FIG.
Is a flowchart showing a main routine of a data processing method by a workstation, FIG. 11 is a flowchart showing a subroutine for syntax analysis, FIG. 12 is a flowchart showing a subroutine for context analysis, FIG. 13 is a flowchart showing a subroutine for generating drawing data, It is.

As shown in FIG. 3, a client server system 1 which is a first embodiment of the data processing apparatus of the present invention has a database server 2 which is a single higher-level device.
And a plurality of workstations 3 as lower-level devices, which are connected by a communication network 4.

As shown in FIG. 2, the workstation 3 has a CP as hardware that is a main component of the computer.
The CPU 101 includes a ROM 103, a RAM 104, an H
FDD (FD Drive) loaded with DD105 and FD106
107, a CD drive 109 in which a CD-ROM 108 is loaded, a keyboard 110, a mouse 111, a display 112, a communication I / F 113, and the like are connected.

The communication network 4 is connected to the communication I / F 113, and the database server 2 is connected to the communication network 4. Since the hardware configuration of the database server 2 is the same as that of the workstation 3 except that the information storage medium such as the HDD 105 has a large capacity, detailed description is given here using the same names and reference numerals. Omit.

In the database server 2 and the workstation 3 of the present embodiment, the ROM 103, the RAM 1
04, HDD 105, FD 106, CD-ROM 108
And the like correspond to information storage media, in which programs and data necessary for various operations are stored as software. For example, a control program that causes the CPU 101 to execute various processing operations includes the FD 106 and the CD-ROM 108.
Is stored in advance.

Such software is installed in the HDD 105 in advance, and the database server 2
When the workstation 3 is started, the data is copied to the RAM 104 and read by the CPU 101. Thus C
When the PU 101 reads an appropriate program and executes various processing operations, various means are logically realized by various functions in the client server system 1 of the present embodiment.

That is, as shown in FIG. 1, various means such as a data storage means 11 are logically realized as various functions in the database server 2 of the present embodiment.
In the workstation 3 of the present embodiment, various units such as a data input unit 12, a syntax analysis unit 13, a context analysis unit 14, a drawing generation unit 15, a data output unit 16, a graphic editor unit 17, and the like are implemented as various functions. It has been realized.

The data storage means 11 corresponds to a predetermined database or a plurality of data files built in advance in the large-capacity HDD 105 of the database server 2, and stores graphic data of a large number of circuit blocks and at least one integrated circuit device. RTL data is registered in advance.

As shown in FIG. 4, a large number of graphic data
It corresponds individually to various circuit blocks such as selectors and registers, but since it is set for the block diagram instead of the circuit diagram, each shape is a block, and the input edge and the output edge are connected to each Possible areas are set.

More specifically, the graphic data has logical information and graphic information, respectively, and the logical information is a circuit such as "AND gate, OR gate, selection circuit, flip-flop circuit,...". The graphic information is composed of various kinds of information necessary for the notation of the block diagram, such as "full length, full width, input edge coordinates, output edge coordinates, ...".

As shown in FIG. 5, the RTL data is an algorithmic program list in which various operations at the register transfer level of the integrated circuit device to be developed are described in advance by using array variables and the like, and are manually executed by an operator. It is described in C language or the like that can be edited by the CPU 101 without considering hardware.

In the client-server system 1 of the present embodiment, the RTL data preliminarily designed as described above is also registered in the data storage means 11 of the database server 2 in advance, and the workstation 3 is provided as required by the operator. Data is read out until.

The above-mentioned data storage means 11 is realized in the database server 2, but the following various means 12 to
17 are all realized in the workstation 3,
This corresponds to a predetermined process of the CPU 101 corresponding to the control program installed in the RAM 104 or the like.

The data input means 12 corresponds to, for example, reading of desired registration data from the large-capacity HDD 105 of the database server 2 via the communication I / F 113 by the CPU 101 of the work station 3. Enter the data.

The parsing means 13 is, as shown in FIG.
The RTL data input to the data input unit 12 is parsed to generate logical structure data in which nodes corresponding to operators and operands are connected by edges, and the context analysis unit 14, as shown in FIG. RTL data is subjected to context analysis to generate similar logical structure data.

The syntactic analysis means 13 and the context analysis means 1
4 is set so as to read the RTL data one sentence at a time and execute the analysis processing.
And the context analysis means 14 execute the analysis process for each sentence of the RTL data sequentially in relation to each other to generate one logical structure data. That is, the logical structure data obtained by the syntax analysis and the logical structure data obtained by the context analysis are essentially the same, and the logical structure data obtained by the context analysis is added to the logical structure data shown in FIG. Data is generated.

The drawing generating means 15 replaces the nodes of the logical structure data with the graphic data and replaces the edges with the connection wiring, and generates drawing data of the block diagram.
More specifically, since the syntax analysis unit 13 and the context analysis unit 14 analyze the RTL data one sentence at a time to generate logical structure data, when the logical structure data is generated from all the sentences of the RTL data, the drawing generating unit 15 Is the data storage means 1
1 is read as appropriate to generate one drawing data.

The data output means 16 is provided with the drawing generating means 15
The file format of the drawing data generated by the above is converted into a predetermined format and the data is output to the graphic editor means 17.
The editing processing is performed on the drawing data input from the corresponding to the input data of the keyboard 110 or the like.

It should be noted that the graphic editor means 17 is provided in the RAM 1
C compatible with existing editor software such as ESDA, which is pre-installed as application software in 04, etc.
This corresponds to the processing operation of the PU 101, and the data output unit 16 converts the file format of the drawing data into a predetermined format suitable for the editor software.

The various means as described above are realized by using hardware such as a keyboard 110 and a display 112 as necessary. The main means corresponds to software stored in an information storage medium such as a RAM 104. This is realized by the operation of the CPU 101 which is a computer including hardware.

For example, the software of the workstation 3 reads RTL data from the database server 2 via the communication I / F 113, and generates logical structure data by parsing and context-analyzing the read RTL data. Reading the graphic data from the database server 2 appropriately, replacing the nodes of the logical structure data, and replacing the edges with the connection wiring to generate the drawing data of the block diagram, and the file format of the generated drawing data To a predetermined format,
It is stored in an information storage medium such as the RAM 104 as a control program for causing the CPU 101 or the like to execute processing operations such as editing processing of the drawing data in which the file format has been converted.

The data processing method by the client server system 1 of the present embodiment in the above configuration will be described below. First, the client server system 1 according to the present embodiment is constructed so as to be used for the development of an integrated circuit device. As shown in FIG. Graphic data of a large number of circuit blocks commonly used in the development of the device are registered in advance.

As shown in FIG. 5, the RTL data of the preliminarily designed integrated circuit device is also registered in the large-capacity HDD 105 of the database server 2. The block diagram can be created by reading the RTL data of the device.

In this case, the worker is required to
When a predetermined operation is performed, the workstation 3 accesses the database server 2 and inputs desired RTL data as shown in FIG.
1), the input RTL data is stored in the HDD 105
Etc. (Step S2).

Next, the temporarily stored RTL data is read out one sentence at a time, analyzed for syntax, and analyzed for context (steps S4 and S5). As shown in FIG. 6 and FIG. The logical structure data in which nodes corresponding to the sequential circuit and the functional circuit are connected by an edge are generated together with the logical structure data in which the connected nodes are connected by an edge.

In this case, as shown in FIG. 11, in the syntax analysis, a node corresponding to an operator or an operand is detected from one sentence of the RTL data and registered as data (steps T1 and T2), and an edge connecting the node is generated. The data is registered (steps T3 and T4).

More specifically, in the case of the RTL data illustrated in FIG. 5, "input, output, re
g, wire ”, etc., from the declaration of the signal“ CLK, RST,…, L
Eight signal nodes “D, EN” are detected and registered in a node table as illustrated in FIG.

The ninth sentence node "setence1" is generated from the assignment statement on the tenth line, and data is registered in the node table. This is connected to the first and second nodes "CLK, RST". An edge of No. 2 is generated and registered in an edge table as illustrated in FIG.

Similarly, from the 13th line of the RTL data to 26th
From the "always" sentence on the line, the 11th sentence node "setence"
3 ”and the signal nodes“ CLK, RST, LD, INDATA, EN, UP, RE
SULT ”is generated and registered in the node table, and the fifth to eleventh edges connecting these signal nodes“ CLK,..., RESULT ”and the statement node“ setence3 ”are generated, and the data is stored in the edge table. be registered.

The “attribute” of the node data indicates the type of the node. For example, the input signal is “input”, the output signal is “output”, and the register is “re”.
g, selector is "sel", adder is "add", subtractor is "sub", signal declared "wire" is "wire", statement is "m"
odul ", etc.

The "number of input / output pins" of the node data is the number of input / output pins provided in the circuit block of the node. For example, the 11th sentence node "setence3" is If the input pin is “CLK, RST, LD, INDAT
A, EN, UP ”and six output pins are“ RESULT ”.

The "level" of the node data is a numerical value indicating the number of stages from the last node on the output side. For example, the level of the last-stage node “RESULT” is “0”, and the level of the previous-stage node by “n” stages is “n”.

On the other hand, the "start point / end point pin number" of the edge data is the pin number of the start point / end point node to which the edge is connected. For example, the 10th edge in the edge table of FIG. 6B corresponds to the 1st pin on the output side of the 3rd node “up” and the 6th pin of the 11th node “setence3” in the node table of FIG. Connecting.

FIG. 7 shows the relationship between nodes and edges generated by the syntax analysis described above in a two-dimensional manner as shown in a block diagram. Note that this drawing is an example for clarifying the relationship between nodes and edges in logical structure data generated by parsing RTL data, and the workstation 3 generates such drawing data. is not.

As described above, when one sentence of the RTL data is parsed and logical structure data is generated (step S)
4) The sentence is subjected to context analysis to generate logical structure data (step S5). Although the syntax analysis and the context analysis are described here as being sequentially performed for convenience, these analysis processes are actually performed simultaneously while being related to each other.

When one sentence of the RTL data is subjected to context analysis, as shown in FIG.
(Step E1), node data of the searched sequential circuit is generated. By adding this node data to the node table of FIG. 6A, a node table as shown in FIG. 8A is generated (steps E2 and E3). In addition,
The sequential circuit corresponds to a register. For example, in the RTL data illustrated in FIG. 5, the "always" statement on the thirteenth line is searched for a pattern as a register.

Similarly, the function circuit is also searched for a pattern (step E4), and node data of the searched circuit is generated and registered in the node table (steps E5 and E6). The functional circuit is equivalent to a selector or an arithmetic unit. For example, in the RTL data illustrated in FIG. 5, an “if” statement on lines 14, 17, 20, and 21 is pattern-searched as a selector, and a “22” line “if” statement is searched. "+1" is searched for a pattern as an adder, and "-1" on the 24th line is searched for a pattern as a subtractor.

Looking at the "if" statement on the 14th line of the RTL data, when the signal "RST" under the condition is true (= 1), "0" is set to "RESULT" on the 15th line, and the signal "RST" is set. RS
When “T” is false ($ 1), the operations after “else...” On line 17 are executed, so the “if” statement from line 14 to line 17 of the RTL data includes the signal “RST”. Is registered in the node table of FIG. 8A as node data of the eighth selector.

As described above, when nodes corresponding to sequential circuits and functional circuits are generated (steps E1 to E6), edges corresponding to these nodes are generated and registered in the edge table (steps E1 to E6). E7, E8), RT
The generation of the logical structure data by the context analysis of the L data is completed.

For example, when the RTL data illustrated in FIG. 5 is subjected to context analysis, nodes and edges are added to the tables illustrated in FIGS. 6A and 6B, and the tables illustrated in FIGS. 8A and 8B are added. Is generated. More specifically, from the “always” statement on line 13 of the RTL data in FIG. 5 to the seventh register node of the node table in FIG. 8A, the “if” statement on lines 14, 17, 20, and 21 , 8, 10, 10 and 11 selector nodes, “+1” to 12th adder nodes in the 22nd row, 23
The 13th subtractor node is generated from "-1" in the row.

Further, in the context analysis as in the case of the syntax analysis, various signal nodes "CLK, RST, LD, INDATA, EN, U"
P, RESULT "and the like are generated, so that an edge connecting these various nodes is also generated and registered in the edge table of FIG.

When the syntactic analysis and the context analysis are completed for one sentence of the RTL data (steps S4 and S5), as shown in FIG.
As shown in 0, the presence or absence of the next sentence is determined (step S6), and logical structure data is generated from all the sentences of the RTL data (steps S3 to S6).

When the logical structure data is generated from the entire text of the RTL data in this manner, the nodes of the logical structure data are replaced with the corresponding graphic data, the edges are replaced with the connection wirings, and the blocks of the integrated circuit device are replaced. Drawing data for the figure is generated (step S7).

More specifically, since the integrated circuit device generally has a structure having many inputs and one output, as shown in FIG. 13, here, the last node is first selected from the node table (step P1). ), The graphic data corresponding to the node data is read from the database server 2 (step P2).

For example, in the case of the logical structure data illustrated in FIG. 8, the 14th “RESULT” is selected as the last node, and as shown in FIG. "Other modules" with one output edge are read.

Next, the position coordinates of the figure data in the drawing data are determined by an existing algorithm in consideration of the outline and the positions of input / output edges (step P3), and the position coordinates of the determined drawing data are determined. Is placed (step S4). For example, in the case of the graphic data of "RESULT" which is expected to be the only output of the above-described integrated circuit device, as shown in FIG. 9, the origin (0,0) which is substantially the center in the X direction and the lowest layer in the Y direction. It is arranged at the position.

Next, a node connected before the node arranged in this way is detected by referring to the edge table (step P5), and the detected node is read from the node table (step P6). ), And the above processing is repeated at this node (steps P2 to P5).

For example, since the 13th edge is connected to the input of the above-mentioned "RESULT" node, the 7th "reg_RESULT" connected to the output is detected as the preceding node. As shown in FIG. 4B, a “register” is read out as graphic data corresponding to this,
As shown in FIG. 9, the X direction is the same as “RESULT” and the Y direction is “+”.

That is, when one node exists before one node, this new node is arranged at the Y coordinate corresponding to the level. However, when there are a plurality of nodes before one node, their X coordinates are distributed in the X direction according to the number of nodes at the same level.

When all the nodes are replaced with graphic data and arranged by the above-described processing (steps P1 to P6), the edge data is sequentially read from the edge table (steps P7 and P9), and the edge data is read. Are replaced with connection wirings respectively (step P8).

Since the graphic data of the arranged circuit blocks is connected by the connection wiring, the drawing data of the block diagram is generated as shown in FIG. When the generation of the drawing data is completed (step S7), the file format of the drawing data is converted into a predetermined format corresponding to the existing editor tool (step S8), as shown in FIG. Data is output to the work area (step S9).

In the client server system 1 of the present embodiment, when the RTL data of a desired integrated circuit device is input in a state where the graphic data of the circuit block is registered as described above, as shown in FIG. The drawing data of the block diagram corresponding to the RTL data can be automatically generated. Therefore, it is not necessary for the operator to manually analyze the RTL data and generate the drawing data of the block diagram, and the burden of the operation of creating the block diagram of the integrated circuit device can be reduced.

However, with such automatic mechanical generation, the block diagram may not be generated in the best mode. However, in the client-server system 1 of the present embodiment, an existing editor tool is also mounted in advance, and the block diagram is automatically converted into a file format that can be edited by the editor tool. Corrections can be made quickly and easily as desired.

The present invention is not limited to the above embodiment, but allows various modifications without departing from the gist of the present invention. For example, in the above embodiment, all nodes are replaced with graphic data of a circuit block and arranged, and then all edge data are replaced with connection wiring. However, each time the graphic data of a pair of circuit blocks is arranged, It is also possible to connect with connection wiring.

In the above embodiment, the client server system 1 including one database server 2 and a plurality of workstations 3 is exemplified as the data processing device of the present invention. However, such a data processing device is a stand-alone single computer device. It is also possible to use

Further, in the above embodiment, it is exemplified that various means are logically realized as various functions of the database server 2 and the workstation 3 by operating the CPU 101 in accordance with a control program stored as software in the RAM 104 or the like. did. However, it is also possible to form each of these various means as unique hardware, and a part of the means is implemented as software.
It is also possible to store it in M104 or the like and form a part as hardware.

In the above embodiment, the software installed in advance in the HDD 105 from the CD-ROM 108 or the like is stored in the RAM 10 when the database server 2 is started.
4 is assumed to be read by the CPU 101, and the software stored in the RAM 104 is assumed to be read. It is also possible to keep.

Further, software is stored in the FD 106 or the CD-ROM 108 which is an information storage medium which can be handled alone, and the FD 106 and the HDD 105
Although it is possible to install software in the AM 104, it is also possible for the CPU 101 to directly read the software from the FD 106 or the like and execute the processing operation without performing such installation.

That is, when various means such as the workstation 3 of the present invention are realized by software, the software only needs to be in a state where the CPU 101 can read and execute a corresponding operation. Further, it is also possible to form a control program for realizing the various means as described above by combining a plurality of software, in which case,
The information storage medium which is a single product only needs to store only the minimum necessary software for realizing the workstation 3 and the like of the present invention.

For example, a CD-R is installed on a workstation 3 or the like on which an existing operating system is mounted.
In the case where application software is provided by an information storage medium such as the OM 108, software for implementing various means such as the workstation 3 of the present invention is realized by a combination of the application software and the operating system, and thus depends on the operating system. The software of the part to be performed can be omitted from the application software of the information storage medium.

[0081]

Since the present invention is configured as described above, it has the following effects.

In the data processing method by the data processing device of the present invention, the RTL data of the integrated circuit device is stored in a state where a plurality of graphic data individually corresponding to various circuit blocks are registered in the data storage means in advance. When data is input to the data input means, the RT
The syntax analysis means parses the L data to generate logical structure data in which nodes corresponding to operators and operands are connected by edges, and the data input R
The TL data is context-analyzed by the context analysis means to generate logical structure data in which nodes corresponding to the sequential circuit and the functional circuit are connected by edges, and the nodes of the logical structure data thus generated are converted into graphic data. The drawing generation means generates the drawing data of the block diagram by replacing and replacing the edge with the connection wiring.
The drawing data of the block diagram can be automatically generated from the TL data, and the burden on the operator who creates the block diagram from the RTL data can be reduced.

In the data processing apparatus as described above, the drawing data generated by the drawing generating means is edited by the graphic editor means, so that the form of the drawing data of the automatically generated block diagram is the best. If not, this can be corrected simply and quickly as desired by the operator.

The drawing data generated by the drawing generating means is output in a predetermined file format by the data output means. For example, the drawing data of the automatically generated block diagram can be easily converted by an existing editor tool. And you can edit quickly.

The RTL data is analyzed for each sentence by the syntax analysis means and the context analysis means to generate logical structure data. When the logical structure data of all the sentences is completed, the drawing data is generated by the drawing generating means. R
The logical structure data can be generated in an appropriate form from the TL data, and the drawing data of the block diagram can be generated in an appropriate form from the logical structure data.

When the computer reads the program stored in the information storage medium of the present invention and executes the corresponding processing operation, the computer accepts the data input of the RTL data of the integrated circuit device and receives the data input. The generated RTL data is parsed to generate logical structure data in which nodes corresponding to operators and operands are connected by edges, and the RT input data is input.
The L data is context analyzed to generate logical structure data in which nodes corresponding to the sequential circuit and the functional circuit are connected by edges, and graphic data of various circuit blocks stored in advance is read as necessary, By automatically generating the block diagram drawing data from the RTL data of the integrated circuit device, it is possible to generate the block diagram drawing data by replacing the nodes of the logical structure data with the graphic data and replacing the edges with the connection wiring. It is possible to reduce the burden on the operator who creates the block diagram from the RTL data.

[Brief description of the drawings]

FIG. 1 is a schematic diagram showing a functional structure of a client server system which is an embodiment of a data processing device of the present invention.

FIG. 2 is a block diagram showing a physical structure of a workstation which is a part of a client server system.

FIG. 3 is a schematic block diagram showing the overall structure of a client server system.

FIG. 4 is a schematic diagram showing graphic data of various circuit blocks.

FIG. 5 is a schematic diagram showing a description content of RTL data of the integrated circuit device.

FIG. 6 is a schematic diagram showing a storage structure of logical structure data by syntax analysis.

FIG. 7 is a schematic block diagram showing a data relationship of logical structure data by a syntax analysis.

FIG. 8 is a schematic diagram showing a storage structure of logical structure data by context analysis.

FIG. 9 is a block diagram showing generated drawing data.

FIG. 10 is a flowchart showing a main routine of a data processing method by a workstation.

FIG. 11 is a flowchart showing a syntax analysis subroutine.

FIG. 12 is a flowchart showing a subroutine of context analysis.

FIG. 13 is a flowchart showing a subroutine of drawing data generation processing.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Client server system which is a data processing apparatus 2 Database server 3 Workstation 11 Data storage means 12 Data input means 13 Syntax analysis means 14 Context analysis means 15 Drawing generation means 16 Data output means 17 Graphic editor means 101 CPU which is a main body of a computer 103 ROM as an information storage medium 104 RAM as an information storage medium 105 HDD as an information storage medium FD 108 as an information storage medium CD-ROM as an information storage medium

Claims (6)

[Claims] 1. Registering graphic data of various circuit blocks such as a register in advance, receiving data input of RTL (Register Transfer Level) data of an integrated circuit device, and synthesizing the input RTL data Analyze to generate logical structure data in which nodes corresponding to operators and operands are connected by edges, and perform context analysis to generate logical structure data in which nodes corresponding to sequential circuits and functional circuits are connected by edges. A data processing method comprising: generating a drawing data of a block diagram by replacing a node of the logical structure data with the graphic data and replacing the edge with a connection wiring. 2. A data storage unit in which a plurality of graphic data individually corresponding to various circuit blocks are registered in advance, a data input unit to which RTL data of an integrated circuit device is input, and the data input unit Syntactic analysis means for analyzing the RTL data input to the means to generate logical structure data in which nodes corresponding to operators and operands are connected by edges; and RTL data input to the data input means. Context analysis means for generating logical structure data in which nodes corresponding to the sequential circuit and the functional circuit are connected by edges by context analysis, and replacing the nodes of the logical structure data with the graphic data and connecting the edges Drawing generation means for generating drawing data of a block diagram by replacing with wirings Location. 3. The data processing apparatus according to claim 2, further comprising a graphic editor for editing the drawing data generated by said drawing generator. 4. The data processing apparatus according to claim 2, further comprising data output means for outputting the drawing data generated by said drawing generating means in a predetermined file format. 5. The syntactic analysis means and the context analysis means analyze the RTL data for each sentence to generate logical structure data. The drawing generating means, when the logical structure data of the whole sentence is completed, the drawing data The data processing device according to claim 2, wherein the data is generated. 6. An information storage medium storing software which can be read by a computer, wherein the information storage medium receives data input of RTL data of an integrated circuit device, and analyzes the input RTL data to analyze an RTL data. Generating logical structure data in which nodes corresponding to the operands are connected by edges; and performing logic analysis on the input RTL data to execute logic in which nodes corresponding to sequential circuits and functional circuits are connected by edges. Generating structural data, reading graphic data of various circuit blocks such as registers stored in advance, replacing the nodes of the logical structure data with the graphic data, and replacing the edges with connection wiring. Generating the drawing data of the block diagram by the computer. Information storage medium characterized by a program for are stored.