JP2000243881A - Flat power semiconductor module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent minute foreign substances such as dirts which come into an assembly process for a semiconductor module, etc., from sticking to the side of a withstand-voltage insulating layer of a power semiconductor chip, which lowers a dielectric strength. SOLUTION: A plurality of IGBT chips 1 (power semiconductor chips) are housed in a package. Here, a semiconductor chip 1 and emitter/collector terminal plates 2 and 3 are held with a chip fixing frame 7 of heat-resistant insulator for each chip pair, which is incorporated in a package, with the chip fixing frame 7 having a soft structure comprising an elastic or heat-shrinkage material. With the IGBT chip 1 held, the side of a withstand-voltage insulating layer 1b formed in the edge region of the chip is covered in tight-contact state with a part of the chip fixing frame 7, so that foreign substances such as dirts are prevented from sticking to the side of the insulating layer 1b in an assembly process, for improved insulation performance.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-voltage, large-current flat power semiconductor module, and more particularly to an assembly structure thereof.

[0002]

2. Description of the Related Art First, taking a power IGBT module as an example, FIGS. 4 (a) and 4 (b) show a conventional assembly structure of a flat power semiconductor module to which the present invention is applied.

In FIG. 1, reference numeral 1 denotes an IGBT having a planar structure.
Chip (power semiconductor chip), 2 is IGBT chip 1
Terminal plate (M
o), 3 is a collector terminal plate superimposed on the surface electrode of the collector and soldered, 4 is an outer case 4a made of ceramic, an emitter electrode plate (Cu electrode) 4b covering the upper and lower end surfaces of the case 4a, and 4 Electrode plate (Cu electrode) 4c
In the package 4, a plurality (four in the illustrated example) of IGBT chips 1 are incorporated in a side-by-side arrangement.

Here, in the illustrated IGBT module,
Heat-resistant insulator (polyimide resin) for module assembly
The IGBT chips 1 are positioned and arranged in the package 5 by using the chip fixing frame 5 with a lid and the chip arrangement fixing frame 6 made of the above.

In other words, for each IGBT chip, the IGBT chip 1 soldered to the collector terminal plate 3 is attached to the case portion 5a of the chip fixing frame 5 (a rectangular dish body, and the bottom wall has an insertion hole for the terminal plate. ), And a rectangular plate-like lid 5b inserted and coupled to the emitter terminal plate 2 is fitted into the case 5a from above and temporarily assembled. Next, the temporary assembly is inserted and set in an alignment fixing frame 6 for positioning, in which insertion holes of the collector terminal plate 3 are opened in a grid pattern in accordance with the arrangement of the chips, and assembled into the package 4 in this state. It is sandwiched between the upper and lower electrode plates 4b and 4c and brought into pressure contact. The package 4 is filled with an inert gas.

On the other hand, as shown in FIG. 3, an emitter surface electrode 1 is provided on the emitter-side main surface of the planar type IGBT chip 1.
a insulating layer 1b around the edge of the chip so as to surround
Is formed to ensure a predetermined withstand voltage with respect to the outer region 1c (having the same potential as the collector). The insulating layer 1b is made of, for example, a laminate of PSG (glass layer), amorphous silicon, and polyimide, and uses a guard ring together to achieve a uniform distribution of the surface electric field along the surface of the insulating layer 1b. It is well known that the electric field is not concentrated on

The insulation layer 1b can secure a high withstand voltage if its creepage length d is increased. On the other hand, if the creepage length d is increased more than necessary, the effective energization area of the emitter surface electrode 1b is restricted accordingly. Conversely, if the creepage width d is reduced, the withstand voltage is reduced and the reliability is reduced. Therefore, on the design side, the creepage length d of the insulating layer 1b is set to the minimum length necessary for securing a predetermined withstand voltage. .

[0008]

By the way, the assembly structure of the semiconductor module shown in FIG.
The following problems remain in the structure of the conventional chip fixing frame 5 used when the terminal boards 2 and 3 are temporarily assembled.

More specifically, the case 5a of the chip fixing frame 5 employed in the assembly structure of FIG. 4 is dish-shaped and the upper part thereof is open, and the surface of the insulating layer 1b of the IGBT chip 1 shown in FIG. Exposed. For this reason, minute floating foreign matter such as dust that has entered the inside of the chip fixing frame 5 during the assembly process of the semiconductor module may adhere to the upper surface (emitter side) of the IGBT chip 1. In addition, even after the module is assembled, foreign matter generated in the package, for example, fine chips of the chip may adhere to the surface of the insulating layer of the IGBT chip 1 in the same manner as described above. In this case, if foreign matter adheres to the above-described surface of the insulating layer 1b, the surface electric field on the surface of the insulating layer around the foreign matter is greatly deformed, and the dielectric breakdown voltage is sharply reduced. In this regard, the present inventors have verified this point by experiments. As a result, only a minute foreign matter having a particle size on the order of 1/10 of the creepage width d adheres to the surface of the insulating layer 1b. About 65%
Has been confirmed to decrease.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to solve the above-mentioned problems. It is an object of the present invention to provide a flat type power semiconductor module in which a chip fixing frame is improved so as to reliably prevent a decrease in dielectric strength due to adhesion to a semiconductor chip.

[0011]

According to the present invention, there is provided a flat power semiconductor module in which a plurality of power semiconductor chips are juxtaposed and housed in a single package. After holding the semiconductor chip for each chip set and the terminal plate superimposed on the upper and lower surface electrodes of the semiconductor chip on a chip fixing frame made of a heat-resistant insulator,
In an assembly structure sandwiched between upper and lower electrode plates of a package, a surface of a withstand voltage insulating layer formed around an edge portion of a chip in a state where a semiconductor chip is held in the chip fixing frame is attached to the chip fixing frame. It is to be covered in close contact with the part (claim 1), and is specifically configured in the following manner.

(1) The chip fixing frame is made of a rubber-like elastic material such as silicone rubber. (2) The chip fixing frame is made of a heat-shrinkable resin, and the fixing frame is thermally shrunk in a state where the semiconductor chip is held in the fixing frame so that the fixing frame is closely covered on the surface of the withstand voltage insulating layer. (Claim 3).

(3) In the above (1) and (2), the chip fixing frame is provided with a body surrounding the periphery of the power semiconductor chip and the upper and lower surfaces, and a terminal board inserted and held in the upper and lower openings. (Fourth aspect).

(4) Adhesiveness is provided in the gap between the surface of the withstand voltage insulating layer of the semiconductor chip and the chip fixing frame covering the portion.
Alternatively, the surface of the insulating layer is sealed by filling an adhesive sealing filler (claim 5).

As described above, the surface of the withstand voltage insulating layer formed around the edge of the power semiconductor chip at the time of assembling the module is tightly covered with the fixed frame while the chip is held by the chip fixed frame. By doing so, the surface of the withstand voltage insulating layer is not exposed as it is. This allows
In the module assembling process, minute foreign matter such as dust is prevented from adhering to the surface of the insulating layer, and the reliability with respect to the dielectric strength is improved.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to the embodiments shown in FIGS. In the drawings of the embodiment, the same members corresponding to FIGS. 3 and 4 are denoted by the same reference numerals, and the description thereof will be omitted.

FIG. 1 shows a first embodiment of the present invention.
FIG. 9 is a view showing a temporary assembly in which a chip fixing frame 7 according to the present invention is mounted on an IGBT chip 1 and an emitter terminal plate 2 and a collector terminal plate 3 are assembled to the embodiment corresponding to FIG.

Here, the chip fixing frame 7 is formed at the body 7a surrounding the peripheral edge of the IGBT chip 1 and the outer peripheral area of the upper and lower main surfaces as shown in the figure, and at the upper and lower end openings of the body 7a. It is a deformed (lantern-shaped) cylindrical body having flange portions 7b and 7c for holding the terminal plate, and is made of a material having high heat resistance and rubber-like elasticity such as silicone rubber.
It is made one size smaller than the external dimensions of the GBT chip 1. And in the assembly process, for each IGBT chip,
The body 7a of the chip fixing frame 7 is put on the IGBT chip 1 in an expanded state, and the emitter terminal plate 2 and the collector terminal plate 3 are elastically held at fixed positions by flange portions 7b and 7c.

In this assembled state, as can be seen from the drawing, the chip fixing frame 7 closely adheres to the peripheral surface of the IGBT chip 1 with almost no gap, and the withstand voltage insulation formed on the emitter side of the IGBT chip 1 around the chip edge. The trunk of the fixed frame 5 covers the surface of the layer 1b. Therefore, as described with reference to FIG. 4, there is no risk that minute foreign matter such as dust entering from the surroundings in the assembling process of incorporating the temporary assembly of FIG. 1 into the module package 4 adheres to the surface of the insulating layer 1b. It is possible to reliably prevent a decrease in dielectric strength caused by the attachment of foreign matter. Further, in the conventional example of FIG. 4, the chip fixing frame 5 is composed of two parts 5a and 5b, whereas in this embodiment, the chip fixing frame 7 is one part, and this one part is an IGBT. The emitter and collector terminal plates 2 and 3 can be positioned and held at predetermined positions with respect to the chip 1, and the assembly process can be simplified.

Further, as the material of the chip fixing frame 7, a heat-shrinkable silicone resin excellent in heat resistance or a modified product thereof can be used. Then, by applying heat while the chip fixing frame 7 made of this heat-shrinkable resin is placed on the IGBT chip 1, the chip fixing frame 7 is thermally contracted and firmly adheres to the peripheral surface of the IGBT chip 1. To cover the surface of the withstand voltage insulating layer 1b. In addition, there are various types of heat-shrinkable materials having different heating temperatures and shrinkage rates of heat shrinkage.
An appropriate one is used in consideration of the thermal influence on the IGBT chip 1.

[Embodiment 2] FIG. 2 shows an application embodiment corresponding to claim 5 of the present invention. In this example,
An adhesive or sticky sealing filler 8 is filled between the surface (surface) of the withstand voltage insulating layer 1b formed on the emitter side of the IGBT chip 1 and the chip fixing frame 7 described in the first embodiment. Thus, the surface of the insulating layer 1b is more securely sealed. Here, the sealing filler 8 is used for the chip fixing frame 7.
May be applied to the surface of the insulating layer 1b of the IGBT chip 1 before being covered, or may be applied to the inner surface of the chip fixing frame 7 in advance to cover the IGBT chip 1.

As in this embodiment, by using the sealing filler 8 in combination with the chip fixing frame 7 described in the first embodiment, it is possible to expect an improvement in reliability for preventing adhesion of foreign matter and an improvement in dielectric strength.

[0023]

As described above, according to the structure of the present invention, the chip fixing frame used for assembling the flat power semiconductor module has a flexible structure using an elastic body, a heat-shrinkable material, etc. The surface of the withstand voltage insulating layer formed on the substrate is covered with the chip fixing frame in a close contact state, so that fine foreign substances such as dust entering in the module assembly process adhere to the surface of the insulating layer. Prevents a decrease in the withstand voltage of the chip, improves the reliability of the insulation performance, and positions the semiconductor chip and the terminal board superimposed on the upper and lower main surfaces at the same time with one fixed frame part. The number of parts and assembly man-hours can be reduced by holding the parts.

In addition, by using the sealing filler according to the fifth aspect in combination, it is possible to expect improvement in reliability for preventing adhesion of foreign matters and improvement in dielectric strength.

[Brief description of the drawings]

FIG. 1 is an assembly structure diagram of a semiconductor chip set using a chip fixing frame according to a first embodiment of the present invention.

FIG. 2 is a structural diagram of an embodiment corresponding to a second embodiment of the present invention.

FIG. 3 is an external perspective view of a power semiconductor chip illustrating an IGBT chip;

FIG. 4 is an assembly structure diagram of a conventional flat power semiconductor module, in which (a) is a longitudinal side view, and (b) is a plan view schematically showing an internal structure.

[Explanation of symbols]

 Reference Signs List 1 IGBT chip (power semiconductor chip) 1a Emitter surface electrode 1b Withstand voltage insulating layer 2 Emitter terminal plate 3 Collector terminal plate 4 Package 4a Surrounding case 4b Emitter electrode plate 4c Collector electrode plate 7 Chip fixing frame 7a Body 7b, 7c Flange Part 8 Sealing filler

Claims (5)

[Claims] 1. A flat power semiconductor module in which a plurality of power semiconductor chips are juxtaposed and housed in a single package, and each chip set is superimposed on a semiconductor chip and upper and lower surface electrodes of the semiconductor chip. The terminal plate is held in a chip fixing frame made of a heat-resistant insulator, and then the assembled structure is sandwiched between upper and lower electrode plates of a package. A flat power semiconductor module, wherein a surface of a withstand voltage insulating layer formed in a peripheral region is closely covered with a part of a chip fixing frame. 2. The flat power semiconductor module according to claim 1, wherein the chip fixing frame is made of a rubber-like elastic body. 3. The semiconductor module according to claim 1, wherein the chip fixing frame is made of a heat-shrinkable resin, and the fixing frame is thermally shrunk in a state where the semiconductor chip is held in the fixing frame. A flat power semiconductor module characterized in that a fixed frame is closely adhered to the power semiconductor module. 4. The semiconductor module according to claim 2, wherein the chip fixing frame has a body surrounding the periphery of the power semiconductor chip and the upper and lower surfaces, and a terminal plate inserted into the upper and lower openings. A flat power semiconductor module characterized by being a deformed cylindrical body having a flange portion for holding. 5. The semiconductor module according to claim 1, wherein an adhesive or adhesive sealing filler is provided in a gap between the surface of the withstand voltage insulating layer of the semiconductor chip and the chip fixing frame covering the portion. A flat power semiconductor module, characterized in that the surface of the insulating layer is sealed by filling the surface.