JP2000216365A - Semiconductor board laminating method and its device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor laminating method and a lamination device which can suppress the occurrence of crystal distortions and of voids. SOLUTION: In this method and a device for laminating two sheets of semiconductor boards 3 and 4, a first semiconductor substrate 4 is arranged under and a second semiconductor substrate 3 is arranged above by spacer jigs 5 arranged at plural places between two sheets of boards in a depressurized atmosphere thereby being placed in such conditions that both boards are out of contact, and when laminating two sheets of boards, the spacer jig 5 is pulled out outwardly under depressurization to release the retention of the upper semiconductor board 3 so as to let it fall, whereby it is brought into full contact with the semiconductor substrate 4 arranged under by its own weight, thus the fellow boards are laminated with each other. Hereby, the reduction of crystal distortion is materialized, and also air trapping ceases to occur at an interface between two boards, and the occurrence of voids is eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate processing technique for forming a semiconductor element, and more particularly to a semiconductor substrate bonding method and apparatus for bonding two semiconductor substrates.

[0002]

2. Description of the Related Art An SOI (Silicon On Insulator) having a silicon single crystal layer disposed on an insulating film.
Substrates are attracting attention as substrates for forming various devices such as high withstand voltage devices, high-speed and low power consumption devices, and semiconductor sensors, and more reliable substrates are being developed.

[0003] As a processing method of an SOI substrate, a SIMOX method (separation by im- um) for forming a buried oxide film by implanting oxygen ions into a bulk silicon substrate and reacting the implanted oxygen with the substrate silicon by heat treatment.
planted Oxygen) and 2
A bonding method is used in which two silicon substrates are bonded to each other and one of the substrates is thinned to form an SOI structure. In particular, the bonding method has the advantage that the surface silicon film thickness and the buried oxide film thickness can be arbitrarily controlled, and the crystallinity is better than that of a SIMOX substrate having the problem of defects due to oxygen ion implantation. ing.

[0004] In forming an SOI substrate by a bonding method, it is an important issue to reduce voids due to particles or air taken into a contact interface when two substrates are bonded to each other.

For this reason, various bonding methods have been proposed for the purpose of reducing voids.

In Japanese Unexamined Patent Publication No. Hei 5-152549, as shown in FIG. 17, one substrate 4 is arranged on a flat surface, and another substrate 3 separately prepared is fixed with vacuum tweezers 13. In this state, the OF (orientation
The two substrates 3, 3
4 and then the vacuum tweezers 13
A method has been proposed in which the fixing by releasing is performed to extrude air from the OF side to perform bonding.

In Japanese Patent Application Laid-Open No. Hei 5-275300, as shown in FIG. 18, one of the substrates 4 is bent, and the peripheral portions of the substrates are brought into contact with each other, so that the substrates are successively bonded in the radial direction. Accordingly, a bonding method capable of reducing voids by extruding air at the bonding interface and bonding the substrates has been proposed.

Also, in Japanese Patent Application Laid-Open No. 9-97755, air is extruded from the bonding boundary in the same manner so as to be bonded from the periphery of the substrate by utilizing a device for positioning the substrate with high precision, thereby reducing voids. There has been proposed a technique for achieving this.

[0009]

However, the method disclosed in these publications in which a part of the substrate is brought into contact with the substrate and then the whole substrate is gradually attached to the substrate is temporarily contacted as shown in FIG. Since there is a non-contact portion, there is a problem that crystal distortion occurs. The crystal strain is shown in FIG.
As shown in the photo of the magic mirror image in (b), it can be seen that it spreads from the contact position at the time of the start of bonding to the non-contact position. In addition, although there is a void reduction effect by pushing out air, there is a possibility that voids may still be generated.

Also, as shown in FIG. 20 (a), in the case of using a method in which the center portion is brought into contact with the substrate and then the entire surface of the substrate is bonded, distortion occurs near the initial contact position. The photograph of the magic mirror image shown in FIG. 20 (b) shows that the crystal strain partially increases the internal stress of the silicon substrate. Of course, voids may be generated.

For this reason, even if an SOI substrate is formed by thinning after bonding, device characteristics are partially deteriorated on the substrate, which is likely to cause a reduction in yield. Further, even if the grinding / polishing method is used in the thinning process, the unevenness of the surface due to the influence of the strain increases the variation in the substrate thickness as shown in FIGS. 19 (c) and 20 (c). It is likely to cause variation, which may lead to deterioration in yield.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method and apparatus for bonding a semiconductor substrate in which crystal distortion is reduced and voids due to trapping of air are eliminated.

[0013]

In order to achieve the above object, in the method of bonding a semiconductor substrate according to the first aspect, the first semiconductor substrate is placed on the lower side so that the bonding surfaces face each other in a reduced-pressure atmosphere. The second semiconductor substrate is disposed on the upper side and held in a state of not contacting with each other, the holding of the second semiconductor substrate is released by depressurization, and the second semiconductor substrate disposed on the upper side is dropped to reduce its own weight. The method employs a method in which a semiconductor substrate is bonded by bringing the entire surface into contact with a first semiconductor substrate disposed on the lower side so that the entire surface of the substrate comes into contact with one substrate almost simultaneously when two substrates are bonded. Therefore, a contact portion and a non-contact portion do not need to be formed, and crystal distortion can be suppressed. In particular, since no pressurization higher than its own weight is required, no crystal distortion occurs in the pressurized portion. In addition, since the bonding is performed in a reduced pressure atmosphere, voids due to trapped air between the two substrates do not occur in principle. That is, the problem of voids due to air confinement, which is a concern when bonding in the atmosphere, is eliminated, and a decrease in yield in the substrate surface due to the voids is suppressed.

In the method of bonding a semiconductor substrate according to a second aspect of the present invention, two opposing semiconductor substrates are separated by a spacer, and the spacer is drawn out of the substrate. The placed second substrate comes into contact with the first substrate by its own weight, and the entire surface of the substrate is bonded.

In the method of bonding a semiconductor substrate according to a third aspect of the present invention, the back surface of the second semiconductor substrate disposed above is held by a jig so as not to contact the first semiconductor substrate. By adopting the method of releasing the fixing of the second semiconductor substrate, the second substrate is brought into contact with the first substrate by its own weight and the whole surface of the substrates is bonded by a simple operation.

According to a fourth aspect of the present invention, there is provided a method of bonding a semiconductor substrate, wherein a natural oxide film is formed by washing with an acidic solution such as a mixed solution of sulfuric acid and hydrogen peroxide before bonding. The surface is made hydrophilic. By making this surface hydrophilic, OH groups adhere to the surface, so that a hydrogen bonding can be formed in a subsequent bonding step, and strong substrate bonding can be realized.

In the semiconductor substrate bonding method according to the fifth aspect, by adopting a method of performing positioning so that the OF portions coincide with each other, the positioning accuracy of the entire substrate is improved, and the bonding area is maximized. Since it can be maintained, the bonding strength is enhanced. In addition, not only the bonding strength is enhanced, but also when the substrates with the structures are bonded to each other to form a device, a decrease in the yield due to the misalignment of the structures formed on each other is suppressed.

In the method of bonding a semiconductor substrate according to the present invention, a method of inclining a substrate arrangement surface for receiving a first semiconductor substrate so that an OF portion becomes lower with respect to a horizontal direction is adopted. The two substrates can be positioned at the OF section by their own weight,
By pulling out and attaching the spacer jig,
Higher precision alignment is realized.

In the method of bonding a semiconductor substrate according to the present invention, the bonding strength is enhanced by performing a heat treatment after bonding the two semiconductor substrates, so that an SOI substrate can be formed. Thinning process and SOI
The problem of peeling at the bonding surface, which is likely to occur in a device process after forming the substrate, is suppressed.

In the semiconductor substrate bonding apparatus according to the present invention, the first substrate is disposed with the bonding surface which can be loaded in the chamber shielded from the outside facing upward, and the first substrate is placed on the support table. A holding mechanism for holding the second semiconductor substrate facing the first semiconductor substrate with the bonding surface facing down so as not to contact the first semiconductor substrate disposed on the first semiconductor substrate; By adopting a configuration with a vacuum pump that exhausts the inside of the chamber,
The semiconductor substrate bonding method according to the first aspect, that is, the bonding method over the entire surface by its own weight is possible.

According to the semiconductor substrate bonding apparatus of the ninth aspect, the upper semiconductor substrate is held or released by using a spacer which can be loaded between the two semiconductor substrates. Accordingly, the semiconductor substrate bonding method according to the second aspect can be performed while preventing contact between the two semiconductor substrates during holding.

In the semiconductor substrate bonding apparatus according to the tenth aspect, the back surface of the second substrate disposed above is held by using a jig, for example, an electrostatic chuck or a vacuum chuck. In addition, the semiconductor substrate bonding method according to the third aspect can be performed while preventing contact between the two semiconductor substrates during holding.

[0023] In the semiconductor substrate bonding apparatus according to the eleventh aspect, the jig for aligning the two semiconductor substrates is provided on the support base, so that the position of the two opposing semiconductor substrates is adjusted. The alignment accuracy is improved, and a highly reliable bonded substrate can be formed.

In the semiconductor substrate bonding apparatus according to the twelfth aspect, a groove is formed on the upper surface of the support table so that two opposing semiconductor substrates conforming to the substrate shape can be fitted into the groove. By adopting a configuration as a jig for the purpose of substrate alignment, a simple structure can be obtained.
The alignment accuracy of one semiconductor substrate can be improved.

In the semiconductor bonding apparatus according to the thirteenth aspect, a plurality of columnar structures are installed at surrounding positions on a support that surrounds the periphery of the substrate so as to align the substrate on the support. By adopting the configuration of the jig described above, the alignment accuracy of the two semiconductor substrates can be similarly improved with a simple structure.

In the semiconductor bonding apparatus according to the present invention, the support on which the first semiconductor substrate and the second semiconductor substrate to be bonded are arranged is inclined with respect to the horizontal plane so that the OF portion becomes lower. Is adopted, the two opposing substrates are positioned in the OF section by their own weights, so that the positioning accuracy of the two semiconductor substrates can be improved.

In the semiconductor substrate bonding apparatus according to the present invention, the bonded first semiconductor substrate and the second
With a configuration having a heat treatment apparatus for heat-treating the semiconductor substrate with the semiconductor substrate under a high temperature condition of room temperature or higher, high-temperature heat treatment after bonding can be performed in the semiconductor substrate bonding apparatus,
It is not necessary to separately prepare a high-temperature heat treatment device, and the cost can be reduced. In addition, by performing high-temperature heat treatment under reduced pressure, the bonding can be taken out into the air after the bonding is strengthened, so that there is no fear of generation of voids due to air mixing into the bonding interface.

[0028]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment A first embodiment of the present invention will be described below with reference to FIGS.

FIGS. 1 to 4 are explanatory views showing an example of a semiconductor substrate bonding apparatus according to the present invention. FIGS. 5 to 7 show two silicon substrates 3 and 4 using this semiconductor substrate bonding apparatus. 4 schematically illustrates a procedure of a semiconductor substrate bonding method of bonding (corresponding to a semiconductor substrate).

As a procedure of the bonding method, first, as shown in FIGS. 5A and 6A, two silicon substrates 3 and 4 to be bonded are prepared. Thermal oxidation or P
An oxide film 7 is formed by VD, CVD, or the like, and is used as a buried oxide film of an SOI substrate to be finally formed. Of course, the oxide film 7 may be formed on any of the silicon substrates 3 and 4, or may be formed on both of the silicon substrates 3 and 4.

Thereafter, the surface is cleaned in order to realize good bonding of the two silicon substrates 3 and 4.

Here, in order to realize good bonding, it is desirable to make the bonding surface hydrophilic.

As an example of this method of hydrophilization, two silicon substrates 3 and 4 are placed in an acidic solution, for example, “H 2 SO 4: H 2
O2 = 4: 1 "(solution for mixing sulfuric acid and hydrogen peroxide), and kept at about 120 ° C. for about 20 minutes to obtain FIG.
As shown in FIG. 6B, natural oxide films 8 and 9 are formed on the surfaces, and OH groups (silanol groups) are attached to the surfaces by washing with running water and spin drying. This makes it possible to form a hydrogen bond in a substrate bonding step performed later, thereby realizing a strong substrate bonding.

Then, as shown in FIG. 7A, the two silicon substrates 3 and 4 are brought into close contact with each other and the mirror surfaces are adhered to each other using a semiconductor substrate bonding apparatus described later.

Before the bonding, a cleaning step of spraying pure water on the bonding surfaces of the two silicon substrates 3 and 4 removes particles, thereby generating voids due to the bonded particles. Is reduced.

Next, the semiconductor substrate bonding apparatus will be described. As shown in FIG. 1, the apparatus has a decompression chamber 1 which is isolated from the outside. The decompression chamber 1 is connected to an exhaust system, for example, a vacuum pump 6, and the inside of the decompression chamber 1 is depressurized by the operation of the vacuum pump 6. A support table 2 is loaded in the decompression chamber 1 in the decompression atmosphere. On the upper surface of the support 2, grooves 2a are formed in advance in accordance with the shape of the substrate. OF (orientation) of the silicon substrates 3 and 4 is provided on the side surfaces of the grooves 2a.
Flat portions 3a and 4a are formed, for example, overhang portions 2b are formed to fill the slits in the slit type. In the groove 2a, one of the silicon substrates 3 and 4, for example, the mirror surface serving as the bonding surface of the silicon substrate 4 is arranged facing upward, or the other silicon substrate 3 is bonded on the upper side of the silicon substrate 4. It has a structure in which the mirror surface serving as the mating surface can be arranged facing downward. The groove 2 a has a groove depth for accommodating the two opposing silicon substrates 3 and 4, and the two opposing silicon substrates 3 and 4 can be fitted together. , 4 are formed.

As a holding mechanism for preventing the two silicon substrates 3 and 4 to be bonded from coming into contact with each other before being brought into the decompression chamber 1, they are fitted into the groove 2a, for example, in the groove 2a. It has a spacer jig 5 (corresponding to a spacer) inserted at the interface between the two silicon substrates 3 and 4. These spacer jigs 5 are assembled so as to be able to move in and out of the groove 2a. Then, as shown in FIG. 2, the spacer jigs 5 are arranged at a plurality of positions at positions where they can be inserted into the substrate interface, and the tip of the spacer jigs 5 is placed above the silicon substrate 4 arranged on the bottom of the groove. By projecting, a system for supporting the silicon substrate 3 arranged on the upper side from below is formed. As a result, the upper silicon substrate 3 is held substantially parallel to each other on the upper side of the silicon substrate 4 so as not to contact the silicon substrate 4 arranged on the bottom surface of the support base 2. ing. In other words, this is a structure in which the two silicon substrates 3 and 4 are held in a simple structure so that contact positions do not occur between them. Then, as shown in FIG. 3 and FIG. 4, by performing a simple operation of simultaneously pulling out all the spacer jigs 5 to the outside of the substrate, the holding of the silicon substrate 2 is released, the silicon substrate 2 is dropped by its own weight, and falls down. The silicon substrate 4 is in contact with the entire surface of the placed silicon substrate 4 so that the silicon substrates can be bonded to each other. The width of the spacer jig 5 inserted into the two opposed silicon substrates 3 and 4 is not particularly limited, but is preferably as shallow as possible. This is because an increase in the number of contact portions with the substrate causes generation of scratches and particles, which causes voids. However, since no device pattern is generally formed in the peripheral portion of the substrate, the generation of voids within that range does not lead to a decrease in yield. Therefore, for example, the depth of the spacer jig 5 to be inserted is desirably about 3 mm (or less). The thickness of the spacer jig 5 must be equal to or greater than the sum of the warpage amounts of the two silicon substrates 3 and 4 in order to avoid contact due to wafer warpage. In the case of a generally used silicon substrate (6 inches), since the amount of warpage is 100 μm or less, the thickness of the spacer jig 5 is desirably 200 μm or more.
Further, the spacer jig 5 is provided with, for example, silicon substrates 3 and 4 in order to minimize scratches in contact with the silicon substrate 3.
It is not preferable to use a material having a hardness higher than that of silicon when applying to silicon. Specifically, it is desirable to use a Teflon (registered trademark) material or a Teflon coat material. Further, the spacer jigs 5 need to be arranged at symmetrical positions for the purpose of supporting the upper silicon substrate 3, and when supporting at three points as shown in FIG.
It is preferable that the position is point-symmetrical at every 0 °, and that the position is every 90 ° when supported at four points. Needless to say, the spacer jig 5 needs to be simultaneously pulled out in order to bring the silicon substrates 3 and 4 into contact with the entire surface at the same time.

The reference numeral 6a is, for example, loaded in the vacuum chamber 1 and heat-treated under high-temperature conditions of room temperature or higher in a gas atmosphere with the two silicon substrates 3 and 4 bonded together under reduced pressure or in a gas atmosphere. 2 shows a heater device (corresponding to a heat treatment device) for the purpose of strengthening the bonding by performing the heat treatment.

Using this semiconductor substrate bonding apparatus,
To describe the semiconductor substrate bonding method of the present invention, first, for example, the silicon substrate 4 is arranged in the groove 2a of the support 2 with the bonding surface facing upward. Then, after each space jig 5 is drawn out into the groove to support it,
The silicon substrate 3 with the attachment surface facing down is arranged above the silicon substrate 4. Then, the silicon substrate 3 disposed inside the groove is positioned with high accuracy by the jig (guide) function of the groove while being positioned with high accuracy.
It is supported from below by the space jig 5. As a result, the silicon substrate 3 is held above the silicon substrate 4 at a predetermined minute distance and opposed to the silicon substrate 4 so as not to come into contact with the silicon substrate 4 disposed on the support table 2. Placed in the atmosphere.

Then, the vacuum pump 6 is operated to exhaust air in the decompression chamber 1, that is, air that causes voids. After the exhaust, all the spacer jigs 5 are simultaneously pulled out.

Then, as shown in FIGS. 3 and 4, the silicon substrate 3 drops due to the release of the holding, and
As shown in FIG. 3B, the entire surface is brought into contact with the lower silicon substrate 4 by its own weight, and the substrates are bonded to each other.

In the substrate bonding performed in this manner, since the entire surfaces of the two silicon substrates 3 and 4 are almost in contact with each other, a contact portion and a non-contact portion are not formed. There is no generation of crystal distortion as in the case where the central portion and the like are brought into contact in advance. In particular, since no pressurization higher than its own weight is required, no crystal distortion occurs in the pressurized portion. In addition, since the bonding is performed in a reduced pressure atmosphere, voids are not generated in principle due to the confinement of air between the two silicon substrates 3 and 4, so that there is a concern about air confinement when bonding in the air. The problem of voids is eliminated, and no voids are generated even when falling due to its own weight, thereby suppressing a decrease in yield in the substrate surface due to the voids.

Bonded silicon substrates 3 and 4
In order to further strengthen the bonding, the heater device 6a
Above 1000 ° C, preferably 1150 ° C
The heat treatment is performed for about 1 to 2 hours under the above high temperature conditions.

When the high-temperature heat treatment after bonding is performed in the semiconductor substrate bonding apparatus as described above, it is not necessary to separately prepare a high-temperature heat treatment apparatus, so that the cost can be reduced. In addition, since the bonding is strengthened and taken out into the air because of the high-temperature heat treatment under reduced pressure, there is no concern about the generation of voids due to air mixing into the bonding interface.

The heat treatment atmosphere may be a reduced pressure atmosphere in which the bonding is performed, or a heat treatment furnace in which heat treatment is performed in a gas atmosphere after being taken out into the atmosphere. Of course, it may be performed by a lamp heating device. Alternatively, a temporary heat treatment at a room temperature or higher may be performed in a reduced-pressure atmosphere, and the heat treatment may be performed at 1000 ° C. or higher, preferably 1150 ° C. or higher after being taken out into the air.

Thereafter, one of the substrates, for example, the silicon substrate 3 is thinned by a method such as grinding and polishing, and as shown in FIG.
Form a substrate.

When the bonded substrate formed by the semiconductor substrate bonding apparatus of the present invention was evaluated, the following became clear.

The evaluation was performed by using a magic mirror image of the bonded substrate as shown in the photograph of FIG. 8A to evaluate the crystal distortion, and by using a sound wave flaw as shown in the photograph of FIG. The evaluation result of the substrate thickness after the grinding and polishing as shown in FIG. 8C was used.

From the evaluation results, it was clear that the crystal strain was reduced by performing bonding by its own weight, and the thickness variation after the grinding / polishing step was also reduced. It was also found that bonding in a reduced-pressure atmosphere eliminates voids caused by air, and enables voidless bonding.

As can be seen from the results of the ultrasonic flaw detection evaluation shown in FIG. 8B, a non-contact area occurs around the substrate due to chamfering of each substrate, but this area is about 3 mm from the end of the substrate. By setting the spacer jig 5 to be inserted between the two silicon substrates 3 and 4 before bonding to a region of about 3 mm or less from the end of each of the silicon substrates 3 and 4, the spacer jig 5 It has been found that the generation of voids due to scratches and the like can be ignored.

(Second Embodiment) Hereinafter, a second embodiment of the present invention will be described with reference to FIGS.

FIGS. 9 and 10 show a modification of the semiconductor substrate bonding apparatus shown in the first embodiment of the present invention, in which the support table 2 on which two silicon substrates 3 and 4 are arranged is mounted.
The OF sections 3a, 4a are installed so as to be inclined with respect to the horizontal direction, and the bottom surface of the support base 2, which is a substrate arrangement surface, is inclined to position the silicon substrates 3, 4 so that the OF sections 3a, 4a coincide. It is intended to be adjusted.

When the positions of the substrates 3 and 4 are aligned with the OF portions 3a and 4a in this manner, the positioning accuracy of the entire substrate is improved, the bonding area can be kept maximum, and the bonding strength is enhanced. You. In addition, when the substrates with the structures are bonded to each other to form a device, the silicon substrates 3 and 4 can be connected to each other.
Yield reduction due to misalignment of the structure formed thereon is suppressed.

Also, since the substrate placement surface of the support base 2 is inclined so that the OF portions 3a and 4a are lowered, the two silicon substrates 3a and 4a are aligned by the OF portions 3a and 4a by their own weights. Therefore, more accurate alignment is realized.

Needless to say, even in such a case, the spacer jigs 5 are arranged at a plurality of locations around the substrate, and the spacer jigs 5 are pulled out after decompression, so that high-precision bonding can be performed in a state where voids due to crystal distortion and air are reduced. Matching can be done.

In FIGS. 9 and 10, the same parts as those in the first embodiment are denoted by the same reference numerals, and the description is omitted.

(Third Embodiment) As a modified example of the groove 2a for aligning the substrates 3 and 4, the silicon substrates 3 and 4 arranged on the support 2 as shown in FIGS. On the upper surface of the support 2 in accordance with the external shape of
A positioning structure in which columnar jigs 10 (corresponding to a structure) for positioning are installed at a plurality of locations so as to surround the periphery of the portion where the substrates 3 and 4 are arranged is adopted. Two silicon substrates in an area surrounded by
By arranging the silicon substrates 4, the silicon substrates 3 and 4 may be aligned on the support base 2.

In this case, the columnar jig 10 is arranged at a position surrounding the substrate. However, in order to recognize the OF sections 3a, 4a, the jig 10 is required at one or more places in the OF sections 3a, 4a. It is necessary to arrange at two or more places around the substrate other than 3a and 4a. At this time, it is sufficient that the jig 10 makes point contact with the periphery of the substrate, and the size is not particularly limited. In addition, since the jig 10 may damage the substrate surface when coming into contact with the substrate, it is not preferable to use a material having a hardness higher than that of silicon when the jig 10 is applied to the silicon substrates 3 and 4, for example. Specifically, it is desirable to use a Teflon material or a Teflon coat material.

Of course, also in this modification, the support 2 is
By inclining to the F side, more accurate positioning can be performed.

In FIGS. 11 and 12, the same parts as those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted.

(Fourth Embodiment) FIGS. 13 and 1
In the case where the OF section is a notch type as shown in FIG. 4, a columnar jig 11 for positioning is arranged at a position corresponding to the notch portions 3b and 4b of the substrates 3 and 4 as shown in FIG. Then, the two silicon substrates 3 and 4 may be aligned. Needless to say, even with such a positioning structure, the positioning can be performed with higher accuracy by inclining the support base 2 toward the OF section.

In FIGS. 13 and 14, the same parts as those in the first embodiment are denoted by the same reference numerals, and their description is omitted.

(Fifth Embodiment) Hereinafter, a fifth embodiment of the present invention will be described with reference to FIGS.

FIGS. 15 and 16 show a modification of the semiconductor substrate bonding apparatus shown in the first embodiment of the present invention. The different point from the first embodiment is that it is arranged on the upper side. The point is that the silicon substrate 3 is held by a holdable jig 12 such as an electrostatic chuck or a vacuum chuck so as not to contact the lower silicon substrate 4.

In the case of bonding, by releasing the holding of the silicon substrate 3 by the jig 12, the silicon substrate 4 is brought into contact with the entire surface of the silicon substrate 4 by its own weight, and the substrates 3 and 4 are bonded. Needless to say, by tilting the support 2 in the same manner as in the previous embodiment, more accurate substrate alignment can be performed. In FIGS. 15 and 16, the same reference numerals are used for the same parts as those in the first embodiment. The description is omitted here.

[0066]

As described above, the first and eighth aspects of the present invention are described below.
According to the invention described in (1), the whole surface of the substrate comes into contact with one of the substrates almost simultaneously when the two substrates are bonded to each other, so that a contact portion and a non-contact portion are not formed and crystal distortion can be suppressed. . In addition, since it is not necessary to apply pressure equal to or more than its own weight, no crystal distortion occurs in the pressurized portion, and the crystal distortion can be reduced. In addition, since the bonding is performed in a reduced-pressure atmosphere, voids due to trapped air between the two substrates do not occur in principle, and a reduction in yield due to voids can be suppressed.

Claims 2, 3, 9, 9 and 1
According to the invention described in Item No. 0, in addition to the above-described effects, the second substrate disposed on the upper side can be brought into contact with the first substrate by its own weight to perform bonding on the entire surface of the substrate by a simple operation. It works.

According to the fourth aspect of the present invention, in addition to the above effects, OH groups adhere to the surface by making the surface of the substrate hydrophilic, so that a hydrogen bond can be formed in the bonding step. This has the effect of realizing proper substrate bonding.

According to the fifth, eleventh, twelfth, and thirteenth aspects of the present invention, in addition to the above-described effects, two semiconductor substrates can be aligned with high accuracy, and the position of the entire substrate can be improved. The alignment accuracy can be improved. As a result, the bonding area can be kept at a maximum, so that the bonding strength can be enhanced. In addition, since a bonded substrate with high reliability can be obtained, it is possible to suppress a decrease in yield due to a positional shift between structures formed on each other even when a device with a structure is bonded to form a device.

According to the sixth and fourteenth aspects of the present invention, the two opposing substrates can be positioned at the OF section by their own weights, thereby achieving an effect of achieving more accurate positioning. Play.

According to the seventh and fifteenth aspects of the present invention, the bonding strength is enhanced, and there is a concern that the bonding strength may be generated in a thinning process for forming an SOI substrate or a device process after forming the SOI substrate. The problem of peeling at the bonding surface can be suppressed. Further, by performing the high-temperature heat treatment after the bonding in the semiconductor substrate bonding apparatus, it is not necessary to separately prepare a high-temperature heat processing apparatus, and the cost can be reduced. Further, since the bonding can be taken out into the air after the bonding is strengthened, there is an effect that there is no fear of generation of voids due to mixing of air into the bonding interface.

[Brief description of the drawings]

FIG. 1 is a side sectional view schematically showing a configuration of a semiconductor substrate bonding apparatus according to a first embodiment of the present invention, together with a state in which two substrates are held so as not to contact with each other.

FIG. 2 is a plan view of the semiconductor substrate bonding apparatus taken along line AA in FIG.

FIG. 3 is a side sectional view showing a state where two substrates are brought into contact with each other on the entire surface.

FIG. 4 is a plan view of the semiconductor substrate bonding apparatus taken along line BB in FIG. 3;

FIG. 5 is a diagram illustrating a pre-process performed on one of the prepared two substrates.

FIG. 6 is a view for explaining pre-processing similarly performed on the other substrate.

FIG. 7 is a diagram illustrating a process from bonding of two substrates to thin film processing.

FIG. 8 (a) is a microscope photograph showing a metal structure of a substrate bonded according to the present invention. (B) is a microscope photograph showing the metallographic structure of the substrate based on the ultrasonic inspection. (C) is a diagram showing a variation in substrate thickness after the grinding / polishing step.

FIG. 9 is a side sectional view schematically showing a configuration of a semiconductor substrate bonding apparatus according to a second embodiment of the present invention.

FIG. 10 is a plan view of the semiconductor substrate bonding apparatus taken along line CC in FIG. 9;

FIG. 11 is a side sectional view schematically showing a configuration of a semiconductor substrate bonding apparatus according to a third embodiment of the present invention.

FIG. 12 is a plan view of the semiconductor substrate bonding apparatus taken along line DD in FIG. 9;

FIG. 13 is a side sectional view schematically showing a configuration of a semiconductor substrate bonding apparatus according to a fourth embodiment of the present invention.

14 is a plan view of the semiconductor substrate bonding apparatus taken along line EE in FIG. 9;

FIG. 15 is a side sectional view schematically showing a configuration of a semiconductor substrate bonding apparatus according to a fifth embodiment of the present invention.

FIG. 16 is a plan view of the semiconductor substrate bonding apparatus taken along line FF in FIG. 9;

FIG. 17 is a view schematically showing a conventional bonding method.

FIG. 18 is a diagram schematically showing a different conventional bonding method.

FIG. 19A is a view schematically showing that a conventional bonding method makes contact with a peripheral portion of a substrate while applying a pressing force. (B) is a microscope photograph showing the metal structure of the bonded substrate. (C) is a diagram showing a variation in substrate thickness after the grinding / polishing step.

FIG. 20A is a diagram schematically showing that a conventional bonding method comes into contact with a central portion of a substrate while applying a pressing force. (B) is a microscope photograph showing the metal structure of the bonded substrate. (C) is a diagram showing a variation in substrate thickness after the grinding / polishing step.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Decompression chamber 2 ... Support 2a ... Groove 3 ... Silicon substrate (2nd bonded substrate) 4 ... Silicon substrate (1st bonded substrate) 3a, 4a ... OF part 5 ... Spacer jig (holding mechanism) 6 Vacuum pump 6a Heater device (heat treatment device) 7 Oxide film 8, 9 Natural oxide film 10 Positioning jig (columnar structure) 11 Positioning jig 12 Substrate holding Jig (holding mechanism).

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Takehiro Matsumura 1-1-1, Showa-cho, Kariya-shi, Aichi Prefecture Inside DENSO Corporation (72) Inventor Hiromi Ohba 1-1-1, Showa-cho, Kariya-shi, Aichi Co., Ltd. Inside DENSO (72) Inventor Hisumi Oshima 1-1-1, Showa-cho, Kariya-shi, Aichi Prefecture Inside DENSO Corporation

Claims (15)

[Claims] 1. A semiconductor substrate bonding method for bonding two semiconductor substrates, wherein a first semiconductor substrate is disposed on a lower side so that bonding surfaces face each other in a reduced-pressure atmosphere, and a second semiconductor substrate is bonded. Arranged on the upper side to keep them in contact with each other, release of the second semiconductor substrate by pressure reduction, drop the second semiconductor substrate arranged on the upper side, and drop the first semiconductor substrate arranged on the lower side by its own weight. A semiconductor substrate bonding method, wherein semiconductor substrates are bonded to each other by bringing the entire surface into contact with the semiconductor substrate. 2. The first semiconductor substrate and the second semiconductor substrate are kept out of contact with each other by arranging spacers at a plurality of positions between the first semiconductor substrate and the first semiconductor substrate. When bonding the second semiconductor substrate and the second semiconductor substrate, the upper second semiconductor substrate is dropped by pulling out the spacer to the outside of both substrates, and the first semiconductor substrate disposed on the lower side by its own weight The semiconductor substrate bonding method according to claim 1, wherein the semiconductor substrates are bonded to each other by being brought into contact with the entire surface. 3. The method according to claim 2, wherein the second semiconductor substrate is provided by a jig.
The back surface is held so that the bonding surface faces downward, and is kept out of contact with the first semiconductor substrate. When the first semiconductor substrate and the second semiconductor substrate are bonded to each other, a second jig is used. Releasing the holding of the semiconductor substrate, thereby dropping the upper second semiconductor substrate, and bringing the whole of the semiconductor substrate into contact with the lower first semiconductor substrate by its own weight to bond the semiconductor substrates together. Item 2. The semiconductor substrate bonding method according to Item 1. 4. The first semiconductor substrate and the second semiconductor substrate are cleaned with an acidic solution before bonding to form a natural oxide film on the surface, thereby making the surface hydrophilic. 4. The method for bonding a semiconductor substrate according to claim 1, wherein: 5. The semiconductor device according to claim 1, wherein the first semiconductor substrate and the second semiconductor substrate are positioned and bonded so that an OF (orientation flat) portion coincides. A method for bonding a semiconductor substrate according to claim 4. 6. A substrate placement surface for receiving a first semiconductor substrate is inclined such that an OF section is lower with respect to a horizontal direction,
6. The semiconductor substrate bonding method according to claim 5, wherein the two first semiconductor substrates and the second semiconductor substrate are aligned at the OF section. 7. The method according to claim 1, wherein the first semiconductor substrate and the second semiconductor substrate are bonded to each other, and heat treatment is performed under reduced pressure or in a gas atmosphere. The method for bonding a semiconductor substrate according to any one of the above. 8. A semiconductor substrate bonding apparatus for bonding two semiconductor substrates, comprising: a support table on which a first substrate is placed with a bonding surface that can be loaded in a chamber shielded from the outside facing upward; The second semiconductor substrate is placed on the first semiconductor substrate on the first support base with the attachment surface facing downward so as not to come into contact with the first semiconductor substrate.
A holding mechanism for holding the semiconductor substrate in opposition to the semiconductor substrate, and a vacuum pump for exhausting the inside of the chamber, by releasing the holding mechanism in a reduced-pressure atmosphere in the chamber exhausted by the vacuum pump. A semiconductor substrate bonding apparatus, wherein the upper second semiconductor substrate is dropped and comes into contact with the lower first semiconductor substrate over the entire surface. 9. The holding mechanism is disposed between a first semiconductor substrate on a support table and a second semiconductor substrate disposed above the first semiconductor substrate, and holds the upper second semiconductor substrate to a lower first semiconductor substrate. A spacer for holding the semiconductor substrate in opposition so as not to contact the first semiconductor substrate and releasing the holding of the second semiconductor substrate when pulled out from between the two substrates, and pulling the spacer from between the two substrates 9. The semiconductor substrate bonding apparatus according to claim 8, wherein the upper second semiconductor substrate is dropped so as to contact the lower first semiconductor substrate over the entire surface. 10. The holding mechanism has a jig for holding a back surface of the second semiconductor substrate and keeping the second semiconductor substrate in an opposed state not in contact with the first semiconductor substrate, and holding the second semiconductor substrate by the jig. 9. The semiconductor substrate bonding apparatus according to claim 8, wherein when the step is released, the second semiconductor substrate is dropped to come into contact with the lower first substrate over the entire surface. 11. The semiconductor device according to claim 8, wherein said support base includes a jig for performing alignment between the first semiconductor substrate and the second semiconductor substrate opposed to each other. The semiconductor substrate bonding apparatus according to any one of the above. 12. A jig for aligning a substrate on the support table has a jig on the upper surface of the support table.
A plurality of opposing semiconductor substrates are formed with a groove that can be fitted therein, and a plurality of spacers that can enter and exit the groove are arranged on the groove measurement surface, and a first and a second opposing surface are sandwiched between the spacers. The semiconductor substrate bonding apparatus according to claim 11, wherein the semiconductor substrate and the second semiconductor substrate can be arranged. 13. A jig for positioning a substrate on the support base, wherein a plurality of columnar structures are provided at positions surrounding the periphery of the substrate when the substrate is arranged on the support base. 12. The semiconductor device according to claim 11, wherein two opposing semiconductor substrates can be arranged in a region surrounded by the structure.
5. The apparatus for bonding and bonding a semiconductor substrate according to item 5. 14. A first semiconductor substrate and a second semiconductor substrate to be bonded to each other.
The support base on which the semiconductor substrate is disposed is inclined so that the OF section is lower with respect to a horizontal plane, and the inclination allows the first semiconductor substrate and the second semiconductor substrate to be aligned at the OF section. Claims 8 to 1 characterized by the following:
3. The semiconductor substrate bonding apparatus according to any one of 3. 15. A bonded first semiconductor substrate and a second semiconductor substrate.
The semiconductor substrate bonding apparatus according to any one of claims 8 to 14, further comprising a heat treatment apparatus for thermally embedding the semiconductor substrate with the semiconductor substrate under a high temperature condition of room temperature or higher.