JP2000216179A - Apparatus and method of manufacturing semiconductor integrated circuit device, and mold for use therein - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent improper electrical connection caused by a stress generated in a semiconductor integrated circuit device when actually mounted by relaxing the stress. SOLUTION: A plurality of first solder balls 10 to be used as a material of projections for external connection are placed predetermined positions on an IC chip 2, and a mold 16 having a plurality of counter sinks 15 conforming to a tip end shape of the first solder balls 10 is placed on the balls 10 so that the sinks 15 cover the tip ends of the first solder balls 10. Under this condition, a gap 17 between the IC chip 2 and mold 16 is sealed with an insulating material.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a built-in semiconductor integrated circuit device, a method of manufacturing the same, and a mold used in the method.

[0002]

2. Description of the Related Art A semiconductor integrated circuit device including a semiconductor integrated circuit chip (hereinafter, referred to as an "IC chip") has an IC
Various structures have been proposed from the viewpoint of the function of the chip, the purpose of use, mounting on a printed circuit board, and the like.

In recent years, particularly in the field of small portable devices, electronic components mounted therein have been required to be even smaller because of the necessity of high-density mounting. Almost equal semiconductor integrated circuit devices have been proposed. These small-sized semiconductor integrated circuit devices are provided by a CSP (Chip Size Package or Chip Scale Pac).
kage).

The external connection projections (external connection terminals) provided on the small semiconductor integrated circuit device are generally solder balls arranged in a matrix.

FIG. 10 is a sectional view showing an example of the configuration of a conventional small semiconductor integrated circuit device 51. This semiconductor integrated circuit device 51 is laminated on an IC chip 52 having a plurality of first electrode pads 53 formed on the surface, and on the IC chip 52 such that at least a part of each first electrode pad 53 is exposed. A first insulating film 54, a plurality of wirings 55 arranged to electrically connect the first electrode pads 53 to the corresponding second electrode pads 56, respectively, A second insulating film 57 laminated on the IC chip 52 so as to expose at least a part thereof, and a plurality of external connection protrusions 58 provided on each second electrode pad 56
The external connection projections 58 are formed by solder balls.

When the semiconductor integrated circuit device 51 is connected to the printed circuit board 59, as shown in FIG. 11, after the semiconductor integrated circuit device 51 is mounted on the printed circuit board 59, the semiconductor integrated circuit device 51 is formed of solder balls by infrared reflow. The external connection projections 58 are melted and solidified. Thus, the semiconductor integrated circuit device 51 is connected to the printed circuit board 59.

The external connection projections 58 are melted during the reflow on the lands of the printed circuit board 59, and the temperature drops in the reflow furnace, and starts to solidify when the temperature falls below the melting point.
Since the semiconductor integrated circuit device 51 and the printed circuit board 59 have different thermal contractions (there is a difference in thermal expansion coefficient), stress is generated in the external connection projection 58 from when solidification occurs.

The stress is largely generated in the external connection projections 58 located on the peripheral edge of the semiconductor integrated circuit device 51 distant from the center, particularly, in the case where the external connection projections 58 are arranged in a matrix.

Therefore, when the number of the external connection projections 58 increases, it is necessary to provide the external connection projections 58 made of solder balls at positions farther from the center of the semiconductor integrated circuit device 51. The external connection projection 58 has a large stress.

Therefore, it is conceivable to shorten the distance between the external connection projections 58. In order to avoid bridging between the external connection projections 58, the size of the solder poles constituting the external connection projections 58 is reduced. On the contrary, it becomes a factor that easily receives the stress.

When the external connection projections 58 cannot withstand the stress, the printed circuit board 59 or the IC chip 52
, Cracks occur in the vicinity of, causing mounting defects that are electrically open.

FIG. 11 shows the directions and magnitudes of forces A and B generated due to a thermal change immediately after mounting,
The shrinkage of the printed circuit board 59 is greater than the shrinkage of the silicon material, which is the main constituent material of the chip 52, and as a result, cracks 60 occur in the solder balls constituting the external connection projections 58. The crack 60 is generated near the external connection projection 58 near the IC chip 52, or
It occurs near the printed circuit board 59.

Even if the external connection projections 58 do not crack immediately after mounting, or if the cracks do not completely advance, the external connection projections 58 still have residual stress. There is a possibility that the joint itself will be opened due to mechanical shock after entering the market, stress due to temperature change, etc., and the equipment itself will not be able to be used functionally.

Therefore, conventionally, a configuration of a small semiconductor integrated circuit device as described below and a manufacturing method thereof have been proposed.

A semiconductor integrated circuit device 61 shown in FIG.
Is disclosed in JP-A-10-79362, and Nikkei B
Nikkei Micro Device No. 158 issued by Company P (1998
It is also introduced on pages 42-59.

In the above configuration, a solder ball 64 is formed on the head of a straight bump (post) 63 whose side is sealed with a resin 62. That is, the solder ball is
Instead of being directly mounted on the electrode pads 56 of
A post 63 having a height of about μm is formed of a copper material, molded with a mold resin so that the head of the post 63 is exposed, and a solder ball 64 is mounted on an exposed portion of the post 63, so that the external connection is achieved. Protrusions are provided. In this configuration, the post 63 reduces the stress applied to the solder ball 64 immediately after mounting on the printed circuit board.

The semiconductor integrated circuit device 66 shown in FIG.
Is disclosed in JP-A-9-213830.

In the above configuration, the solder balls 67
68 are formed in two layers to form projections for external connection,
By adopting a structure in which the lower solder ball 67 is embedded in the insulating layer 69, the stress inside the external connection projection immediately after mounting is reduced without increasing the size of the upper solder ball 68.

In manufacturing the device 66, first, a flux 70 is formed at a position where the solder ball 67 is to be arranged, and the solder ball 67 is formed thereon (FIG. 13).
(See FIG. 13A), a part of the head of the solder ball 67 is flattened by pulling a blade (see FIG. 13B).
Next, after a side portion of the solder ball 67 is sealed with a resin 69 (see FIG. 13C), a flux 71 is applied to an exposed portion of the solder ball 67, and a solder ball 68 is formed thereon (FIG. 13C). 13 (d)).

[0020]

However, in the apparatus 61 shown in FIG. 12, when forming the tall post 63, it is difficult to make the height uniform by plating, and it takes time to form the plating. There is a problem that it takes a long time.

When the device 61 shown in FIG. 12 is manufactured, as shown in FIG.
A resin 73 is filled in the substrate 72 on which the straight bumps 63 are buried, and a film 75 is inserted under the upper mold 74 for sealing. In this method, FIG.
As shown in FIG.
When the film 75 is peeled off as shown in FIG. 14C after sealing, the head of the straight bump 63 can be formed.

However, in the above manufacturing method, when a spherical bump is used instead of a straight bump, a part of the bump must be cut into the film 75. Also,
A film material that can withstand the heat of the sealing step is required, and a step of peeling the film material after sealing is required. If the film material is an organic material, the resin is also an organic material, so that the resin adheres to the resin due to heat at the time of sealing, which may make the peeling process difficult. In addition, when sealing, it is necessary to carefully seal the film 75 so as not to be loosened, which is inconvenient in operation.

On the other hand, in the manufacturing method shown in FIG. 13, since the upper solder ball 68 is connected to the lower solder ball 67, it is necessary to expose not a point but a certain area at the head of the lower solder ball 67. There is. Therefore, after cutting a part of the head of the solder ball 67, the side portion of the solder ball 67 is sealed with the resin 69. However, a cutting step and a step of removing cutting debris from the cut surface and cleaning the surface are performed. Required.

After the formation of the solder balls 67, the resin 69
A step of exposing the solder ball 67 by sealing and cutting a part of the resin 69 and the solder ball 67 may be considered, but in any case, the cutting step and the removal of cutting debris from the cut surface to clean the surface. Is required.

Further, in Japanese Patent Application Laid-Open No. 9-260540, as shown in FIG. 15, a photosensitive polyimide is applied to a ceramic substrate 77 having an electrode pad 76, and is exposed and developed to have a tapered concave portion. A thick polyimide resin layer 78 is formed, and the low melting point solder paste 7 is
9, a manufacturing method of joining the solder balls 80 is disclosed.

However, in the above-described manufacturing method, if the amount of the low melting point solder paste 79 used for bonding is small, the adhesive is formed only near the bottom of the concave portion. Therefore, an amount of the low melting point solder paste 79 that is protruded from the recess after the joining is used.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to reduce a stress generated at the time of mounting and prevent an electrical connection failure due to the stress, and to manufacture the same. Another object of the present invention is to provide a method and a mold used in the manufacturing method.

[0028]

According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor integrated circuit device, comprising the steps of: After placing the body in a predetermined position on the substrate, the first
The tip of each of the first spherical conductors is covered with a mold having a plurality of concave portions conforming to the tip shape of the spherical conductor, and an insulating material is sealed between the substrate and the mold in this state. The method is characterized by including the step of causing

According to the above-described method, after the tip of each first spherical conductor is covered with the concave portion of the mold, the insulating material is sealed between the substrate and the mold. This makes it possible to form an insulating film over the entire substrate by a simple method, and
The tip of each first spherical conductor can be exposed while protruding from the surface of the insulating film. Further, by adjusting the depth of the concave portion of the mold, the exposed portion of the first spherical conductor can be easily adjusted.

An external connection terminal is formed using at least a part of the first spherical conductor as a constituent material. Therefore, the portion of the insulating film and the terminal for external connection covered by the insulating film relaxes the stress generated at the time of mounting, so that the occurrence of cracks in the terminal for external connection can be suppressed.

Further, if low-cost solder balls are used as the first spherical conductor, a semiconductor integrated circuit device can be manufactured at low cost.

It is preferable that the insulating film has elasticity so that the stress can be sufficiently absorbed. Therefore, as the insulating material, use is made of a resin material or the like that allows the insulating film after film formation to have a desired elasticity. Is preferred.

According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor integrated circuit device.
The method according to the above, further comprising a step of removing the mold after exposing the insulating material, exposing a tip of the first spherical conductor, and connecting a second spherical conductor to the exposed portion. .

According to the above-described method, the second spherical conductor is connected to the tip of the first spherical conductor, and the external connection terminal which is resistant to stress can be formed by the two spherical conductors.

According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor integrated circuit device.
Or the method of (2), wherein the concave portion of the mold is provided with the first mold.
It is characterized in that it is formed at a depth of not less than ５ and not more than ４ of the height of the spherical conductor.

According to the above method, since the depth of the concave portion of the mold is adjusted to a certain range, the exposed area of the tip of the first spherical conductor can be secured and the stress can be sufficiently reduced. The periphery of the first spherical conductor can be covered with an insulating film.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor integrated circuit device.
Or in the method of 2, after performing the above step on a single substrate before being divided into a plurality of semiconductor integrated circuit devices,
It is characterized by being divided into respective semiconductor integrated circuit devices.

According to the above method, an insulating film and an external connection terminal can be efficiently formed on a plurality of semiconductor integrated circuit devices at the same time.

According to a fifth aspect of the present invention, there is provided a mold for use in a method of manufacturing a semiconductor integrated circuit device, wherein the plurality of spherical conductors are disposed on a substrate. And a plurality of concave portions each conforming to the shape of the tip.

According to the above configuration, the tip of each spherical conductor is covered with the concave portion of the mold, and the insulating material can be sealed between the substrate and the mold. Thus, the insulating film can be formed on the entire substrate by a simple method, and the tip of each spherical conductor can be exposed in a state protruding from the surface of the insulating film. Further, by adjusting the depth of the concave portion of the mold, the exposed portion of the spherical conductor can be easily adjusted.

If the external connection terminals of the semiconductor integrated circuit device are formed using at least a part of the spherical conductor as a constituent material, a semiconductor integrated circuit device capable of satisfactorily relieving the stress generated during mounting is manufactured. it can.

According to a sixth aspect of the present invention, there is provided a semiconductor integrated circuit device having a plurality of electrode terminals disposed on a circuit-formed substrate and a plurality of electrode terminals disposed on each of the electrode terminals. A plurality of external connection terminals electrically connected to each electrode terminal, and an insulating film covering the substrate except for a tip of each of the external connection terminals, wherein each of the external connection terminals has a side surface. The spherical portion includes a truncated cone-shaped portion that is covered by the insulating film and has a cross section that becomes wider from the connection side to the electrode terminal toward the tip, and a spherical portion that protrudes from the surface of the insulating film. Is characterized in that a side surface of the truncated cone is formed inside an extended curved surface extending to a surface side of the insulating film.

According to the above arrangement, the portion of the insulating film and the external connection terminal covered with the insulating film relaxes the stress generated during mounting, so that the occurrence of cracks in the external connection terminal can be suppressed. Can be. In addition, since each external connection terminal includes a truncated cone-shaped portion and a spherical portion and is formed in a shape without constriction, the occurrence of cracks in the external connection terminal can be more reliably suppressed.

According to a seventh aspect of the present invention, there is provided a method of manufacturing a semiconductor integrated circuit device having a plurality of external connection terminals. Forming an insulating film on the disposed substrate, forming a plurality of tapered holes in the insulating film to expose the electrode terminals, and forming a mask having a plurality of holes corresponding to the tapered holes. Aligning and placing on the insulating film, filling each hole and each tapered hole of the mask with a conductive material, and solidifying the conductive material after melting by heat treatment, thereby protruding from the surface of the insulating film. And spheroidizing the portion of the conductive material described above.

According to the above method, the external connection terminals are formed in a shape without constriction by using the mask. In the semiconductor integrated circuit device manufactured by the above method, the portions of the insulating film and the external connection terminals covered with the insulating film reduce the stress generated at the time of mounting, and each external connection terminal has no constriction. Since it is formed in a shape, the occurrence of cracks in the external connection terminal can be reliably suppressed.

According to an eighth aspect of the present invention, there is provided a method of manufacturing a semiconductor integrated circuit device having a plurality of external connection terminals. Forming an insulating film on the disposed substrate, forming a plurality of tapered holes in the insulating film, exposing each of the electrode terminals, and placing a first spherical conductor in each of the tapered holes; Solidifying the first spherical conductor by melting after heat treatment, filling the tapered holes with a conductive material, and placing a second spherical conductor on the conductive material filled in the tapered holes, Solidifying the second spherical conductor after melting by heat treatment to spheroidize a portion of the conductive material protruding from the surface of the insulating film.

According to the above method, the external connection terminal is formed in a shape without constriction by using the two spherical conductors, the first spherical conductor and the second spherical conductor. In the semiconductor integrated circuit device manufactured by the above method, the portions of the insulating film and the external connection terminals covered with the insulating film reduce the stress generated at the time of mounting, and each external connection terminal has no constriction. Since it is formed in a shape, the occurrence of cracks in the external connection terminal can be reliably suppressed.

According to a ninth aspect of the present invention, there is provided a method of manufacturing a semiconductor integrated circuit device having a plurality of external connection terminals. Forming an insulating film on the disposed substrate, forming a plurality of tapered holes in the insulating film, exposing each of the electrode terminals, and forming each tapered hole with a volume larger than the volume of the tapered hole. A step of filling a large spherical conductor, solidifying the spherical conductor after melting by heat treatment, and filling each tapered hole with a conductive material and spheroidizing the portion of the conductive material protruding from the surface of the insulating film. And is characterized by including.

According to the above-described method, the external connection terminal is formed in a shape having no constriction by using one spherical conductor. The semiconductor integrated circuit device manufactured by the above method is
The portions of the insulating film and the external connection terminals that are covered with the insulating film alleviate the stress generated during mounting. Each external connection terminal is formed in a shape without constriction. Can reliably suppress the occurrence of cracks.

According to a tenth aspect of the present invention, there is provided a method of manufacturing a semiconductor integrated circuit device according to any one of the seventh to ninth aspects, wherein the method is divided into a plurality of semiconductor integrated circuit devices. After performing the above-described steps on the previous single substrate, the substrate is divided into respective semiconductor integrated circuit devices.

According to the above method, an insulating film and an external connection terminal having no constriction can be efficiently formed on a plurality of semiconductor integrated circuit devices at the same time.

[0052]

[Embodiment 1] An embodiment of the present invention will be described below with reference to FIGS.

As shown in FIG. 1A, a semiconductor integrated circuit device 1 according to the present embodiment includes an IC chip (substrate) 2 having a plurality of first electrode pads 3 formed on a surface thereof, and a first electrode pad 3. IC chip 2 so that at least a part of pad 3 is exposed.
A first insulating film 4 laminated thereon and a first electrode pad 3
A plurality of wirings 5 arranged to electrically connect to the corresponding second electrode pads (electrode terminals) 6 respectively;
A second insulating film laminated on the IC chip so as to expose at least a part of each second electrode pad, and a plurality of external connection protrusions provided on each second electrode pad (External connection terminal) 8 and a third insulating film (insulating film) 9 laminated on the IC chip 2 so as to expose at least a part of each external connection projection 8. .

As shown in FIG. 1B, the first electrode pads 3 are arranged in rows on both sides of the element forming surface of the IC chip 2. The first electrode pad 3 is usually used as an electrode pad for wire bonding, but in the present embodiment, a connection terminal electrically connected to the second electrode pad 6 via the wiring 5 is used. It has become.

Each wiring 5 is formed on the first insulating film 4 at the same time as the second electrode pad 6 as described later. As will be described later, each external connection projection 8 includes a base formed using a first solder ball (first spherical conductor) 10,
And a tip portion formed by using a second solder ball (second spherical conductor) 11. The third insulating film 9 is formed at a height that covers the base side surface of the external connection projection 8.

Next, with reference to FIG. 2, the manufacturing process of the semiconductor integrated circuit device 1 will be described.

First, the I electrode on which the first electrode pad 3 is formed
On the C chip 2, a first insulating film 4 is formed. At this time, at least a part of each first electrode pad 3 is not covered and the first electrode pad 3 is placed on the element surface of the IC chip 2.
Is formed.

Next, the corresponding first insulating film 4 is formed on the first insulating film 4.
The wiring 5 for electrically connecting the electrode pad 3 and the second electrode pad 6 is formed in a predetermined pattern. In particular,
After a metal film is formed on the first insulating film 4 by sputtering or the like, each wiring 5 is formed in a predetermined pattern using a photolithography technique and an etching technique. Each wiring 5 is formed so as to cover an exposed portion of the first electrode pad 3.

The second electrode pad 6 is formed simultaneously with the wiring 5 by the above-described wiring 5 forming process. The second electrode pads 6 are formed so as to have a larger surface area than the first electrode pads 3, and are formed on the IC chip 2 so as to be arranged vertically and horizontally in a matrix. As a result, the external connection projections 8 formed on the second electrode pads 6
As shown in FIG. 1B, they are arranged in a matrix on the IC chip 2 vertically and horizontally.

Next, a second insulating film 7 is formed so that at least a part of the second electrode pad 6 is exposed. The state at this time is shown in FIG.

Thereafter, as shown in FIG. 2B, the first solder balls 10 are mounted on the exposed portions of the second electrode pads 6.

Next, a third insulating film 9 is formed so that the first solder ball 10 is exposed in the height direction by one fourth to one fifth (see FIG. 2C). This third insulating film 9
Will be described later in detail.

Next, as shown in FIG. 2D, a flux 12 is applied to the exposed portion of the first solder ball 10 which has been exposed in the height direction by one fourth to one fifth. further,
As shown in FIG. 2 (e), the second
Is mounted. Thereafter, the first solder ball 10 and the second solder ball 11 are melted and solidified by raising the temperature to a temperature higher than the melting point of the solder and performing a heat treatment. Through such a manufacturing process, the semiconductor integrated circuit device 1 is manufactured.

The manufacture of the semiconductor integrated circuit device 1 described above is performed before the wafer is cut out from a wafer (single substrate) by dicing. That is, the above-described manufacturing process is performed in the state of the wafer 13 as shown in FIG. 4, and after the process is completed, each semiconductor integrated circuit device 1 is completed by being divided into individual chips by dicing. become.

In the above manufacturing process, the first solder ball 1
By making the constituent elements of the zero and second solder balls 11 and their contents the same, the first solder balls 10 and the second solder balls 11 are mixed after the heat treatment, so that bonding with little residual distortion can be performed. Become.

Next, a step of forming the third insulating film 9 will be described with reference to FIG.

First, a mold 16 having a counterbore (recess) 15 as shown in FIG. Counterbore 15
Is a concave portion provided on the surface of the mold 16 and has a curved bottom at the bottom. In detail, the counterbore 15 of the mold 16
Is adapted to the spherical shape of the first solder ball 10 and is formed at a depth corresponding to one fifth to one fourth of the height of the first solder ball 10.

As described above, the step of forming the third insulating film 9 is performed in the state of the wafer 13. Therefore, the mold 16 corresponds to all the chips 14 before cutting out of the wafer 13, and the counterbore 15 is formed so as to correspond to all the chips 14 before cutting out. FIG. 3A shows a spot facing 15 corresponding to the two IC chips 2 on the wafer 13.

Next, as shown in FIG. 3B, all the IC chips 2 on the wafer 13 are covered from above.
The mold 16 is covered from above. As a result, a portion corresponding to a height of one-fifth to one-fourth of the tip of the first solder ball 10 is covered with the counterbore 15 of the mold 16 and sandwiched between the IC chip 2 and the mold 16. Gap 17
Is formed.

As described above, while the mold 16 is held at a constant distance from the IC chip 2, the gap 17 between the IC chip 2 and the mold 16 is filled with an insulating material called an underfill material. Pour the material (resin material). After the injected insulating material is cured by heat treatment and molded, the mold 16 is removed. Thus, the third insulating film 9 can be formed as shown in FIG.

The reason why the depth of the counterbore 15 of the mold 16 is set to about 1/5 to 1/4 of the height (diameter) of the first solder ball 10 is as follows. That is, counterbore 15
Is smaller than the height 1/5 of the first solder ball 10, the contact area between the mold 16 and the first solder ball 10 is reduced. On the other hand, if the depth of the counterbore 15 is longer than 1/4 of the height of the first solder ball 10, it is inconvenient to relieve stress.

The material of the mold 16 is not particularly limited, and a material other than metal may be used.

As described above, according to the manufacturing method using the mold 16, the third IC can be simply applied to all the IC chips 2 on the wafer 13 without increasing the number of steps or requiring special materials. The insulating film 9 can be formed.
In addition, by adjusting the depth of the counterbore 15, the exposed portion of the first solder ball 10 can be easily adjusted.

As shown in FIG. 5, the semiconductor integrated circuit device 1 according to the present embodiment manufactured by the above-described manufacturing method is connected to the printed circuit board 18 due to the difference in the thermal expansion coefficients of the constituent materials. It has a structure that reduces the generated stress. That is, immediately after the semiconductor integrated circuit device 1 is mounted on the printed circuit board 18, as shown in FIG. 5, the stress is relaxed by the third insulating film 9 and the base of the external connection projection 8. The occurrence of cracks in the connection projections 8 can be suppressed.

Further, even after the semiconductor integrated circuit device 1 is incorporated in a device and put on the market, the mounting joint is not easily broken by mechanical shock, stress due to temperature change, etc., and the reliability of the device itself is reduced. Can be improved.

In the above manufacturing method, when a conductor such as a column is used instead of the first solder ball 10,
It is necessary that the shape of the spot facing 15 be cylindrical or the like in conformity with the shape of the conductor. In this case, when the mold 16 is covered from above and the tip of the conductor (conductive bump) is covered with the spot facing 15, care must be taken so that a slight displacement does not occur. This is because even if there is a slight shift, the conductive bump may be deformed. As mentioned above, the spherical first
When the solder ball 10 is used, even if there is a slight deviation when the tip is covered, it is forcibly corrected, so that the tip can be covered well and the first solder ball 10 is not deformed.

As described above, the present semiconductor integrated circuit device 1 has the configuration including the first electrode pad 3 and the second electrode pad 6, but is not limited thereto. 3 and the first electrode pad 3
A configuration in which the external connection projections 8 are provided on the top is also possible. However, in this case, it is desirable to form the first electrode pads 3 in a matrix on the IC chip 2 in order to increase the surface area of the electrode pads.

Although the semiconductor integrated circuit device 1 has the second insulating film 7 and the third insulating film 9, it may have no second insulating film 7. . With such a configuration, the step of forming the second insulating film 7 can be omitted.

[Embodiment 2] Another embodiment of the present invention will be described below with reference to FIGS. For convenience of explanation, members having the same functions as the members described in the above embodiment are denoted by the same reference numerals, and description thereof will be omitted.

The semiconductor integrated circuit device 20 according to the present embodiment
The third embodiment is different from the first embodiment in that an external connection projection 21 having a shape different from that of the external connection projection 8 is provided. Except for this point, the configuration of the semiconductor integrated circuit device 20 is the same as that of the first embodiment.
Is the same as the configuration of the semiconductor integrated circuit device 1 of FIG.

That is, the semiconductor integrated circuit device 2 of the present embodiment
0 denotes an IC chip 2 having a plurality of first electrode pads 3 formed on its surface as shown in FIG. 6A and an IC chip 2 having at least a part of each first electrode pad 3 exposed.
A first insulating film 4 laminated thereon and a first electrode pad 3
A plurality of wirings 5 arranged to electrically connect to the corresponding second electrode pads (electrode terminals) 6 respectively;
A second insulating film laminated on the IC chip so as to expose at least a part of each second electrode pad, and a plurality of external connection protrusions provided on each second electrode pad (External connection terminal) 21 and a third insulating film (insulating film) 9 laminated on the IC chip 2 so as to expose at least a part of each external connection projection 21. .

The external connection projection 21 has a frusto-conical portion 22 whose side surface is covered with the third insulating film 9 and a spherical portion 23 protruding from the surface of the third insulating film 9. It has a configuration.

The truncated conical portion 22 has a smaller area on the side connected to the second electrode pad 6 and has a larger area on the surface side of the third insulating film 9. That is, the truncated cone portion 22
Is narrower on the connection side with the second electrode pad 6 and gradually widens toward the surface side of the third insulating film 9.

The spherical portion 23 is formed in a spherical shape obtained by surface tension when the constituent material is melted and solidified, and is formed in a hemisphere or a shape close to a hemisphere. Further, the spherical portion 23 is formed inside an extended curved surface 24 that extends the side surface of the truncated cone portion 22 toward the surface side. That is, the spherical portion 23 is formed so as not to protrude outside the extended curved surface 24.

In the semiconductor integrated circuit device 20 described above, since the external connection projections 21 are formed in a shape having no constriction, the occurrence of cracks at the time of connection can be further effectively prevented. That is, immediately after mounting the semiconductor integrated circuit device 20 on the printed circuit board 18, as shown in FIG.
The structure of the third insulating film 9 having a sufficient thickness and the constriction-free external connection projections 21 disperses stress due to thermal stress and relieves the stress, so that the occurrence of cracks in the external connection projections 21 can be suppressed. .

Next, with reference to FIG. 7, a description will be given of a manufacturing process of the semiconductor integrated circuit device 20.

As in the first embodiment, the manufacturing process of the semiconductor integrated circuit device 20 described below is performed before the wafer is cut from a wafer (single substrate) by dicing. That is, the following manufacturing process is performed in the state of the wafer 13 as shown in FIG. 4, and after the process is completed, each semiconductor integrated circuit device 20 is completed by being divided into chips by dicing into chips. become.

First, the I electrode on which the first electrode pad 3 is formed
On the C chip 2, a first insulating film 4 is formed. At this time, at least a part of each first electrode pad 3 is not covered and the first electrode pad 3 is placed on the element surface of the IC chip 2.
Is formed.

Next, the corresponding first insulating film 4 is formed on the first insulating film 4.
The wiring 5 for electrically connecting the electrode pad 3 and the second electrode pad 6 is formed in a predetermined pattern. In particular,
After a metal film is formed on the first insulating film 4 by sputtering or the like, each wiring 5 is formed in a predetermined pattern using a photolithography technique and an etching technique. Each wiring 5 is formed so as to cover an exposed portion of the first electrode pad 3.

By the above-described wiring 5 forming process, the second electrode pad 6 is formed simultaneously with the wiring 5. The second electrode pads 6 are formed so as to have a larger surface area than the first electrode pads 3, and are formed on the IC chip 2 so as to be arranged vertically and horizontally in a matrix. Thereby, the external connection projections 21 formed on the second electrode pads 6 are formed.
Are arranged vertically and horizontally in a matrix on the IC chip 2 as shown in FIG. 6B.

Next, a second insulating film 7 is formed so that at least a part of the second electrode pad 6 is exposed. The state at this time is shown in FIG.

Next, as shown in FIG. 7B, the IC chip 2 including the portion where the second electrode pad 6 is formed is formed.
An insulating material 25 such as photosensitive polyimide is coated on the second insulating film 7 so as to cover the entire surface. Insulating material 25
Is coated to a final film thickness of approximately 100 μm.

Thereafter, as shown in FIG. 7C, the insulating material 25 located on the second electrode pad 6 is removed by using a photolithography technique including an exposure step and a development step. By removing the insulating material 25 by using the photolithography technique in this manner, a concave portion (tapered hole) 26 having a truncated cone shape can be formed on the second electrode pad 6. The formation of the concave portion 26 exposes the second electrode pad 6, and the insulating material 25 such as polyimide is formed on the third insulating film 9 having the concave portion 26.
Becomes

Next, as shown in FIG. 7D, each of the recesses 26 is patterned to a thickness of about 1 so as not to be covered.
A mask 27 having a diameter of 25 μm and a hole diameter of about 350 μm is brought into close contact with the surface of the third insulating film 9. In this state, a conductive paste (conductive material) 28 such as a solder paste is screen-printed from above, and the third insulating film 9 and the opening of the mask 27 are filled with the conductive paste 28.

The amount of the conductive paste 28 to be filled is adjusted so that the shape of the tip of the final external connection projection 21 does not protrude outside the extended surface 24 of the truncated cone.

Next, as shown in FIG. 7E, the mask 27 is removed upward. After that, as shown in FIG. 7 (f), the conductive paste 28 is melted by passing through a reflow furnace, returned to normal temperature, and solidified. As a result, an external connection projection 21 having a spherical portion at the tip having a diameter of about 350 μm is formed.

The semiconductor integrated circuit device 20 is manufactured through the above manufacturing steps, but the semiconductor integrated circuit device 20 can be manufactured by other manufacturing methods. Hereinafter, another manufacturing process of the semiconductor integrated circuit device 20 will be described with reference to FIG.

In the above-described manufacturing process, the projections 21 for external connection are formed by using screen printing. However, in the manufacturing process described below, the projections 21 for external connection are formed using solder balls.

First, the steps up to forming the third insulating film 9 having the concave portion 26 on the IC chip 2 are the same as the above manufacturing steps. In this manufacturing process, after the third insulating film 9 is formed, as shown in FIG. 8A, the first solder balls (the first spherical balls) are formed in the concave portions 26 which are the openings of the third insulating film 9. The conductor 29 is dropped. Thereafter, as shown in FIG. 8 (b), the first solder balls 29 are melted by passing through a reflow furnace, returned to room temperature, and solidified. As a result, each concave portion 26 as an opening of the third insulating film 9 is
Will be filled.

Next, as shown in FIG. 8C, a flux 32 is applied to a portion where the solder 31 is exposed, and a second solder ball (second spherical conductor) 30 is mounted on the flux 32. I do. After that, the solder 31 and the second solder ball 30 are again melted by passing through a reflow furnace, and are returned to room temperature and solidified. As a result, FIG.
An external connection projection 21 having a shape as shown in FIG.

The size of the first solder ball 29 and the second solder ball 30 used in the above manufacturing process is such that the shape of the tip of the final external connection projection 21 is outside the extended surface 24 of the truncated cone. The size is adjusted so that it does not protrude.

In the above manufacturing process, the first solder ball 2
Although the two solder balls 9 and the second solder ball 30 are used, the present invention is not limited to this, and the external connection protrusion 21 may be formed using one solder ball. For example, the external connection protrusion 2
In the case where they are not arranged side by side, one solder ball (spherical conductor) having a volume larger than the volume of the concave portion 26 is used, and the external connection projection 21 is formed by melting and solidifying through a reflow furnace. be able to.

However, since the diameter of the solder ball tends to vary, the height of the external connection projections 21 formed using the solder ball may be uneven. On the other hand, when screen printing is used, the conductive paste 28
Can be uniformly applied, so that the uniform external connection projections 21 can be formed without variation.

[0104]

According to the method for manufacturing a semiconductor integrated circuit device according to the first aspect of the present invention, as described above, a plurality of first spherical conductors, each of which is a constituent material of an external connection terminal, are placed at predetermined positions on a substrate. After the arrangement, the tip of each of the first spherical conductors is covered with a mold having a plurality of recesses that match the shape of the tip of the first spherical conductor, and the gap between the substrate and the mold in this state. This method includes a step of sealing the insulating material.

Thus, the insulating film can be formed on the entire substrate by a simple method, and the tip of each first spherical conductor can be exposed while protruding from the surface of the insulating film. Further, by adjusting the depth of the concave portion of the mold, the exposed portion of the first spherical conductor can be easily adjusted.

Therefore, the portion of the insulating film and the terminal for external connection covered by the insulating film relaxes the stress generated at the time of mounting, so that the occurrence of cracks in the terminal for external connection can be suppressed.

In the method of manufacturing a semiconductor integrated circuit device according to the second aspect of the present invention, as described above, in the method of the first aspect, after sealing the insulating material, removing the mold and removing the first spherical conductive material. This is a method including a step of exposing a tip of a body and connecting a second spherical conductor to the exposed portion.

Therefore, the second spherical conductor is connected to the tip of the first spherical conductor, and an external connection terminal resistant to stress can be formed by these two spherical conductors.

According to the method of manufacturing a semiconductor integrated circuit device according to the third aspect of the present invention, as described above, in the method of the first or second aspect, the concave portion of the mold has a height of the first spherical conductor. This is a method formed at a depth of not less than 分 の and not more than ４.

Therefore, the exposed area of the tip of the first spherical conductor can be ensured, and the periphery of the first spherical conductor can be covered with the insulating film to the extent that the stress can be sufficiently reduced.

According to the method of manufacturing a semiconductor integrated circuit device according to the invention of claim 4, as described above, in the method of claim 1 or 2, the single substrate before being divided into a plurality of semiconductor integrated circuit devices is After performing the above steps, the semiconductor device is divided into respective semiconductor integrated circuit devices.

Therefore, an insulating film and an external connection terminal can be efficiently formed simultaneously for a plurality of semiconductor integrated circuit devices.

As described above, the mold according to the fifth aspect of the present invention is a mold used in a method of manufacturing a semiconductor integrated circuit device, wherein the shape of the tip of a plurality of spherical conductors arranged on a substrate is different from that of the mold. It is a configuration having a plurality of concave portions that are respectively adapted.

Thus, the insulating film can be formed on the entire substrate by a simple method, and the tip of each spherical conductor can be exposed in a state protruding from the surface of the insulating film. Further, by adjusting the depth of the concave portion of the mold, the exposed portion of the spherical conductor can be easily adjusted.

Therefore, if the external connection terminals of the semiconductor integrated circuit device are formed using at least a part of the spherical conductor as a constituent material, the semiconductor integrated circuit capable of satisfactorily relieving the stress generated during mounting. Equipment can be manufactured.

As described above, the semiconductor integrated circuit device according to the sixth aspect of the present invention includes a plurality of electrode terminals disposed on a circuit-formed substrate and a plurality of electrode terminals disposed on the respective electrode terminals. A plurality of externally connected terminals that are electrically connected, and an insulating film that covers the substrate except for the tip of each of the externally connected terminals, wherein each of the externally connected terminals has a side surface on the insulating film. A truncated cone-shaped portion that is covered and has a cross section that becomes wider from the connection side to the electrode terminal toward the tip end, and a spherical portion that protrudes from the surface of the insulating film, wherein the spherical portion is the truncated cone Is formed inside an extended curved surface extending the side surface of the insulating film toward the front surface side of the insulating film.

Therefore, the portion of the insulating film and the terminal for external connection covered by the insulating film relaxes the stress generated at the time of mounting, so that the occurrence of cracks in the terminal for external connection can be suppressed. In addition, since each external connection terminal includes a truncated cone-shaped portion and a spherical portion and is formed in a shape without constriction, the occurrence of cracks in the external connection terminal can be more reliably suppressed.

According to a seventh aspect of the present invention, there is provided a method of manufacturing a semiconductor integrated circuit device having a plurality of external connection terminals as described above. Forming an insulating film thereon, forming a plurality of tapered holes in the insulating film, exposing the respective electrode terminals, and aligning a mask having a plurality of holes corresponding to the tapered holes. Placing the conductive material on the insulating film and filling each hole and each tapered hole of the mask with a conductive material, and solidifying the conductive material by melting after heat treatment, thereby solidifying the conductive material protruding from the surface of the insulating film. And spheroidizing the portion of

Therefore, the external connection terminal can be formed in a shape without constriction by using the mask. Further, in the semiconductor integrated circuit device manufactured by the above method, the portions of the insulating film and the external connection terminals covered with the insulating film relieve the stress generated during mounting, and each external connection terminal is constricted. Since it is formed in a shape without cracks, the occurrence of cracks in the external connection terminal can be reliably suppressed.

According to a method of manufacturing a semiconductor integrated circuit device according to the present invention, as described above, in the method of manufacturing a semiconductor integrated circuit device having a plurality of external connection terminals, a substrate on which a plurality of electrode terminals are arranged is provided. Forming an insulating film thereon, forming a plurality of tapered holes in the insulating film to expose the electrode terminals, placing a first spherical conductor in each of the tapered holes, (1) solidifying the spherical conductor after being melted and filling the tapered holes with a conductive material; placing a second spherical conductor on the conductive material filled in the tapered holes; (2) a step of solidifying the portion of the conductive material that protrudes from the surface of the insulating film by solidifying the spherical conductor after melting.

Therefore, the external connection terminal can be formed in a shape without constriction by using the two spherical conductors, the first spherical conductor and the second spherical conductor. Further, in the semiconductor integrated circuit device manufactured by the above method, the portions of the insulating film and the external connection terminals covered with the insulating film relieve the stress generated during mounting, and each external connection terminal is constricted. Since it is formed in a shape without cracks, the occurrence of cracks in the external connection terminal can be reliably suppressed.

According to a ninth aspect of the present invention, there is provided a method of manufacturing a semiconductor integrated circuit device having a plurality of external connection terminals as described above. Forming an insulating film thereon, forming a plurality of tapered holes in the insulating film to expose the respective electrode terminals, and forming a spherical conductor having a larger volume than the tapered hole in each of the tapered holes. Filling the tapered holes with a conductive material by melting and solidifying the spherical conductor by heat treatment, and spheroidizing a portion of the conductive material protruding from the surface of the insulating film. It is.

Therefore, the external connection terminal can be formed in a shape without constriction by using one spherical conductor. Further, in the semiconductor integrated circuit device manufactured by the above method, the portions of the insulating film and the external connection terminals covered with the insulating film relieve the stress generated during mounting, and each external connection terminal is constricted. Since it is formed in a shape without cracks, the occurrence of cracks in the external connection terminal can be reliably suppressed.

According to a tenth aspect of the present invention, a method of manufacturing a semiconductor integrated circuit device according to any one of the seventh to ninth aspects, wherein a single semiconductor integrated circuit device is not divided into a plurality of semiconductor integrated circuit devices. After performing each of the above steps on the substrate,
This is a method of dividing into respective semiconductor integrated circuit devices.

Therefore, an insulating film and an external connection terminal having no constriction can be efficiently formed on a plurality of semiconductor integrated circuit devices at the same time.

[Brief description of the drawings]

FIG. 1A is a cross-sectional view illustrating a configuration of a semiconductor integrated circuit device according to an embodiment of the present invention, and FIG. 1B is a plan view thereof.

FIGS. 2A to 2E are cross-sectional views illustrating a manufacturing process of the semiconductor integrated circuit device.

FIGS. 3A and 3B are cross-sectional views illustrating a manufacturing process of the semiconductor integrated circuit device using a mold. FIGS.

FIG. 4 is a plan view showing a wafer on which a manufacturing process of the semiconductor integrated circuit device is performed.

FIG. 5 is a cross-sectional view illustrating how stress is reduced in the semiconductor integrated circuit device during mounting.

FIG. 6A is a cross-sectional view illustrating a configuration of a semiconductor integrated circuit device according to another embodiment of the present invention, and FIG. 6B is a plan view thereof.

FIGS. 7A to 7F are cross-sectional views illustrating a process of manufacturing the semiconductor integrated circuit device.

FIGS. 8A to 8C are cross-sectional views showing another manufacturing process of the semiconductor integrated circuit device.

FIG. 9 is a cross-sectional view illustrating how stress is reduced in the semiconductor integrated circuit device during mounting.

FIG. 10 is a sectional view showing a conventional semiconductor integrated circuit device.

FIG. 11 is a cross-sectional view illustrating how stress is generated in a conventional semiconductor integrated circuit device during mounting.

FIG. 12 is a sectional view showing another conventional semiconductor integrated circuit device.

13 (a) to 13 (d) are cross-sectional views showing the steps of manufacturing another conventional semiconductor integrated circuit device.

FIGS. 14A to 14C are cross-sectional views illustrating a process of manufacturing the semiconductor integrated circuit device of FIG. 12;

FIG. 15 is a sectional view showing still another conventional semiconductor integrated circuit device.

[Description of Signs] 1 semiconductor integrated circuit device 2 IC chip (substrate) 6 second electrode pad (electrode terminal) 8 external connection projection (external connection terminal) 9 third insulating film (insulating film) 10 first Solder ball (first spherical conductor) 11 second solder ball (second spherical conductor) 13 wafer (single substrate) 15 counterbore (recess) 16 mold 20 semiconductor integrated circuit device 21 external connection projection ( External connection terminal) 26 Recess (tapered hole) 27 Mask 29 First solder ball (first spherical conductor) 30 Second solder ball (second spherical conductor)

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yoshihide Iwasaki 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka Inside Sharp Corporation (72) Inventor Shinji Suminoe 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka (72) Inventor Katsunobu Mori 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka F-term (reference) 5F061 AA02 BA03 CA21 CB13 DA01 DA06

Claims (10)

[Claims] 1. A gold metal having a plurality of recesses which are arranged at predetermined positions on a substrate, each of which is a constituent material of a terminal for external connection, and which is adapted to a shape of a tip of the first spherical conductor. Covering the tip of each of the first spherical conductors with a mold,
A method of manufacturing a semiconductor integrated circuit device, comprising a step of sealing an insulating material between the substrate and the mold in this state. 2. The method according to claim 2, further comprising the step of removing the mold after exposing the insulating material, exposing a tip of the first spherical conductor, and connecting a second spherical conductor to the exposed portion. The method for manufacturing a semiconductor integrated circuit device according to claim 1. 3. The method according to claim 1, wherein the concave portion of the mold is formed at a depth of not less than ５ and not more than の of the height of the first spherical conductor. A manufacturing method of the semiconductor integrated circuit device according to the above. 4. The method according to claim 1, wherein said step is performed on a single substrate before being divided into a plurality of semiconductor integrated circuit devices, and then divided into respective semiconductor integrated circuit devices.
Or the method for manufacturing a semiconductor integrated circuit device according to 2. 5. A mold for use in a method of manufacturing a semiconductor integrated circuit device, the mold having a plurality of concave portions each conforming to a tip shape of a plurality of spherical conductors arranged on a substrate. Type. 6. A plurality of electrode terminals disposed on a circuit-formed substrate, a plurality of external connection terminals respectively disposed on the respective electrode terminals and electrically connected to the respective electrode terminals, and An insulating film that covers the substrate except for the tip of the connection terminal, wherein each of the external connection terminals has a side surface covered with the insulating film, and is directed toward the tip from the connection side with the electrode terminal. It has a truncated cone-shaped portion with a wider cross section and a spherical portion protruding from the surface of the insulating film, and the spherical portion is larger than an extended curved surface extending the side surface of the truncated cone toward the surface of the insulating film. A semiconductor integrated circuit device formed inside. 7. A method for manufacturing a semiconductor integrated circuit device having a plurality of external connection terminals, comprising: forming an insulating film on a substrate on which a plurality of electrode terminals are disposed; and forming a plurality of tapered holes in the insulating film. Forming, exposing each of the electrode terminals, positioning a mask having a plurality of holes corresponding to the tapered holes, placing the mask on the insulating film, and conducting conductive to each of the holes and each of the tapered holes of the mask. A semiconductor integrated circuit device, comprising: a step of filling a material; and a step of solidifying a portion of the conductive material protruding from the surface of the insulating film by melting and solidifying the conductive material by heat treatment. Manufacturing method. 8. A method of manufacturing a semiconductor integrated circuit device having a plurality of external connection terminals, comprising: forming an insulating film on a substrate on which a plurality of electrode terminals are arranged; Forming and exposing each of the electrode terminals;
A step of filling a spherical conductive material, solidifying the first spherical conductive material by melting after heat treatment, and filling each of the tapered holes with a conductive material, and forming a second conductive material on the conductive material filled in each of the tapered holes. Mounting the spherical conductor and solidifying the second spherical conductor after melting by heat treatment, thereby spheroidizing a portion of the conductive material protruding from the surface of the insulating film. Device manufacturing method. 9. A method of manufacturing a semiconductor integrated circuit device having a plurality of external connection terminals, comprising: forming an insulating film on a substrate on which a plurality of electrode terminals are arranged; Forming, exposing each of the electrode terminals, and putting a spherical conductor having a volume larger than the volume of the tapered hole into each of the tapered holes, and solidifying the spherical conductor after melting by heat treatment, whereby Filling the tapered hole with a conductive material and spheroidizing a portion of the conductive material protruding from the surface of the insulating film. 10. The semiconductor integrated circuit device according to claim 7, wherein after performing each of the steps on a single substrate before being divided into a plurality of semiconductor integrated circuit devices, the substrate is divided into respective semiconductor integrated circuit devices. 13. The method of manufacturing a semiconductor integrated circuit device according to claim 1.