JP2000206175A - Apparatus for measuring lsi current - Google Patents

Apparatus for measuring lsi current

Info

Publication number
JP2000206175A
JP2000206175A JP11003075A JP307599A JP2000206175A JP 2000206175 A JP2000206175 A JP 2000206175A JP 11003075 A JP11003075 A JP 11003075A JP 307599 A JP307599 A JP 307599A JP 2000206175 A JP2000206175 A JP 2000206175A
Authority
JP
Japan
Prior art keywords
terminal
current
comparator
lsi
measuring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11003075A
Other languages
Japanese (ja)
Inventor
Hiroshi Nomura
宏志 野村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP11003075A priority Critical patent/JP2000206175A/en
Publication of JP2000206175A publication Critical patent/JP2000206175A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To restrict the cost increase of LSIs by measuring a consumed current at a high speed without depending on a performance of an LSI tester. SOLUTION: A board 10 exclusive for measuring current is set to the LSI current-measuring apparatus. The current-measuring board 10 is constituted of a current detect resistor 12, a differential amplifier 14 and a window comparator 16. The window comparator 16 is constituted of an upper limit detect comparator 22, a lower limit detect comparator 24 and an OR circuit 26. Input/output terminals of the current-measuring board 10 comprise a current feed terminal 30, a terminal 36 where the current is to be measured, an upper limit input terminal 32, a lower limit input terminal 34 and a judgment result output terminal 38.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】 本発明は消費電流を簡単か
つ高速に測定し判定可能なLSI電流測定装置に関す
る。
[0001] 1. Field of the Invention [0002] The present invention relates to an LSI current measuring apparatus capable of measuring current consumption simply and at high speed and determining the current consumption.

【0002】[0002]

【従来の技術】 LSI測定装置の一般の構成を図4に
示す。被測定デバイスはDUT(Device Und
er Test)ボード48上に置かれ、テストボード
46、テストヘッド44及びケーブル42を介してLS
Iテスター40により測定される。
2. Description of the Related Art FIG. 4 shows a general configuration of an LSI measuring apparatus. The device under test is a DUT (Device Und
er Test) is placed on a board 48 and connected to the LS via a test board 46, a test head 44 and a cable 42.
It is measured by the I tester 40.

【0003】従来においては、LSIの消費電流の測定
はLSIテスター40の電流測定機能を使って行ってお
り、測定時間はLSIテスター40の性能に依存してい
た。例えば、LSIテスター40内部で電流値を電圧値
に変換した後、アナログ/デジタル変換し、上限値また
は下限値とデジタル値での判定を行うものも有る。この
場合、消費電流の測定は非常に長時間を要す。また、L
SIテスター40は電流測定の汎用性を担保しているた
め、一般に測定に長時間を要す。
Conventionally, the current consumption of an LSI is measured using the current measurement function of the LSI tester 40, and the measurement time depends on the performance of the LSI tester 40. For example, there is an LSI tester in which a current value is converted into a voltage value inside the LSI tester 40 and then subjected to analog / digital conversion to make a determination based on an upper limit value or a lower limit value and a digital value. In this case, the measurement of the current consumption requires a very long time. Also, L
Since the SI tester 40 ensures the versatility of current measurement, it generally takes a long time to measure.

【0004】[0004]

【発明が解決しようとする課題】消費電流の測定をLS
Iテスター内の機能に任せておくと、測定に長時間を要
し、LSIのコスト増加となっていた。更に、近年、I
DDQ測定と称する方法が適用されるようになってき
た。IDDQ測定とは、テストパターンを実行させた
後、LSI内部のロジックの状態を所定の状態にし、そ
の消費電流を測定することにより、LSI内部のロジッ
クの不良箇所を発見する方法である。この為、消費電流
の測定を多数回行わなければならず、LSIのコスト増
加は深刻なものとなった。
The measurement of the current consumption is performed by using LS.
If left to the functions in the I tester, the measurement takes a long time, and the cost of the LSI increases. Furthermore, in recent years, I
A method called DDQ measurement has been applied. The IDDQ measurement is a method in which after a test pattern is executed, the state of the logic inside the LSI is set to a predetermined state, and current consumption is measured to find a defective portion of the logic inside the LSI. For this reason, the consumption current must be measured many times, and the cost of the LSI has increased significantly.

【0005】そこで、本発明の目的は高速に消費電流の
測定を行い、LSIのコスト増加を抑制することにあ
る。
Accordingly, an object of the present invention is to measure current consumption at high speed and suppress an increase in cost of an LSI.

【0006】[0006]

【課題を解決するための手段】上記の問題を解決するた
めに、本発明のLSI電流測定装置は、電流供給端子と
電流被測定端子と上限入力端子と下限入力端子と判定結
果出力端子のみの端子を有し、前記電流供給端子に一端
が接続され前記電流被測定端子に異なる一端が接続され
た抵抗と、該抵抗の両端が入力の二端子に接続された差
動増幅器と、該差動増幅器の出力端子が入力の一端子に
接続され、前記上限入力端子が異なる入力の一端子に接
続された第一のコンパレータと、前記差動増幅器の出力
端子が入力の一端子に接続され、前記下限入力端子が異
なる入力の一端子に接続された第二のコンパレータと、
前記第一のコンパレータの出力と第二のコンパレータの
出力とを組み合わせる論理回路と、から成り、該論理回
路の出力が前記判定結果出力端子に接続される電流測定
ボードを備えていることを特徴とする。
In order to solve the above problem, an LSI current measuring apparatus according to the present invention comprises a current supply terminal, a current measurement terminal, an upper limit input terminal, a lower limit input terminal, and a judgment result output terminal. A resistor having one end connected to the current supply terminal and one end connected to the current-measured terminal, and a differential amplifier having both ends of the resistor connected to two input terminals; An output terminal of the amplifier is connected to one terminal of an input, and the upper limit input terminal is a first comparator connected to one terminal of a different input, and an output terminal of the differential amplifier is connected to one terminal of an input. A second comparator whose lower input terminal is connected to one terminal of a different input;
A logic circuit that combines the output of the first comparator and the output of the second comparator, the output of the logic circuit being provided with a current measurement board connected to the determination result output terminal. I do.

【0007】[0007]

【作用および効果】本発明のLSI電流測定装置におけ
る電流測定ボードは、電流供給端子と電流被測定端子と
上限入力端子と下限入力端子と判定結果出力端子のみの
端子を有しているので、テストボードに簡単に搭載でき
る。また、電流測定ボード上の部品が少ないので、高速
に不良品の判定ができ、また、電流測定ボードの物理的
面積を小さくすることができる。
Function and Effect Since the current measuring board in the LSI current measuring apparatus of the present invention has only a current supply terminal, a current measurement terminal, an upper limit input terminal, a lower limit input terminal and a judgment result output terminal, the test is performed. Easy to mount on board. In addition, since there are few components on the current measurement board, defective products can be determined at high speed, and the physical area of the current measurement board can be reduced.

【0008】また、本発明のLSI電流測定装置を使用
すれば、LSIテスターの電流測定機能を使用していな
いので、LSI内部のロジックのファンクションチェッ
クと同時に電流測定ができ、トータルの測定時間の短縮
が図れる。
Further, when the LSI current measuring apparatus of the present invention is used, since the current measuring function of the LSI tester is not used, the current can be measured simultaneously with the function check of the logic inside the LSI, and the total measuring time can be shortened. Can be achieved.

【0009】[0009]

【発明の実施の形態】以下、本発明の実施例を図面を参
照しながら詳細に説明する。図1は本発明の実施例であ
るLSI電流測定装置を示す図である。被測定デバイス
はDUTボード48上に置かれ、テストボード46、テ
ストヘッド44及びケーブル42を介してLSIテスタ
ー40により測定される。テストボード46上には電流
測定ボード10が実装されている。
Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a diagram showing an LSI current measuring device according to an embodiment of the present invention. The device under test is placed on the DUT board 48 and measured by the LSI tester 40 via the test board 46, the test head 44 and the cable 42. The current measurement board 10 is mounted on the test board 46.

【0010】図2は本発明の実施例の電流測定ボード1
0の回路構成を示す図である。電流測定ボード10は電
流検出抵抗12、差動増幅器14、ウィンドウコンパレ
ータ16から構成される。ウィンドウコンパレータ16
は上限検出コンパレータ22、下限検出コンパレータ2
4及びOR回路26から構成される。電流測定ボード1
0の入出力端子は電流供給端子30と電流被測定端子3
6と上限入力端子32と下限入力端子34と判定結果出
力端子38からなる。
FIG. 2 shows a current measuring board 1 according to an embodiment of the present invention.
FIG. 3 is a diagram illustrating a circuit configuration of a zero. The current measurement board 10 includes a current detection resistor 12, a differential amplifier 14, and a window comparator 16. Window comparator 16
Is the upper limit detection comparator 22, the lower limit detection comparator 2
4 and an OR circuit 26. Current measurement board 1
0 input / output terminals are the current supply terminal 30 and the current measured terminal 3
6, an upper limit input terminal 32, a lower limit input terminal 34, and a determination result output terminal 38.

【0011】図3は本発明の実施例であるLSI電流測
定装置の消費電流測定時の構成を説明する図である。電
流供給端子30はLSIテスター40からケーブル4
2、テストヘッド44及びテストボード46を介して一
定の電源電圧が供給される。電流被測定端子36にはD
UTボード48を介して被測定デバイスの電源端子に接
続される。上限入力端子32と下限入力端子34にはL
SIテスター40から各々上限と下限設定の為の電圧が
入力される。判定結果出力端子38からの信号はテスト
ヘッド44及びケーブル42を介してLSIテスター4
0に入力される。
FIG. 3 is a diagram for explaining the configuration of an LSI current measuring apparatus according to an embodiment of the present invention when measuring current consumption. The current supply terminal 30 is connected to the cable 4 from the LSI tester 40.
2. A constant power supply voltage is supplied via the test head 44 and the test board 46. D is a current measuring terminal 36
It is connected to the power supply terminal of the device under test via the UT board 48. The upper limit input terminal 32 and the lower limit input terminal 34
Voltages for setting the upper and lower limits are respectively input from the SI tester 40. The signal from the judgment result output terminal 38 is sent to the LSI tester 4 via the test head 44 and the cable 42.
Input to 0.

【0012】図2に示すように、電流供給端子30と電
流被測定端子36との間には電流検出抵抗12が設置さ
れている。電流検出抵抗12の電流供給端子30側の一
端は差動増幅器14の非反転入力端子に接続され、電流
検出抵抗12の電流被測定端子36側の一端は差動増幅
器14の反転入力端子に接続されている。差動増幅器1
4の出力端子は上限検出コンパレータ22の非反転入力
端子に接続され、また、下限検出コンパレータ24の反
転入力端子に接続される。上限検出コンパレータ22の
反転入力端子には上限入力端子32が接続され、下限検
出コンパレータ24の非反転入力端子には下限入力端子
34が接続される。上限検出コンパレータ22の出力端
子と下限検出コンパレータ24の出力端子はOR回路2
6の入力端子に接続される。OR回路26の出力端子は
判定結果出力端子38に接続される。
As shown in FIG. 2, the current detection resistor 12 is provided between the current supply terminal 30 and the current measurement terminal 36. One end of the current detection resistor 12 on the side of the current supply terminal 30 is connected to the non-inverting input terminal of the differential amplifier 14, and one end of the current detection resistor 12 on the side of the current measured terminal 36 is connected to the inverting input terminal of the differential amplifier 14. Have been. Differential amplifier 1
The output terminal of No. 4 is connected to the non-inverting input terminal of the upper limit detection comparator 22 and is connected to the inverting input terminal of the lower limit detection comparator 24. The upper limit input terminal 32 is connected to the inverted input terminal of the upper limit detection comparator 22, and the lower limit input terminal 34 is connected to the non-inverted input terminal of the lower limit detection comparator 24. The output terminal of the upper limit detection comparator 22 and the output terminal of the lower limit detection comparator 24 are OR circuits 2
6 input terminals. The output terminal of the OR circuit 26 is connected to the determination result output terminal 38.

【0013】電流被測定端子36から電流が流出する
と、電流検出抵抗12の両端には電圧が発生する。この
電圧を差動増幅器14により所定の倍率で増幅する。上
限検出コンパレータ22、下限検出コンパレータ24及
びOR回路26はウィンドウコンパレータ16を構成
し、差動増幅器14の出力電圧が上限入力端子32の入
力電圧よりも高い場合と、差動増幅器14の出力電圧が
下限入力端子34の入力電圧よりも低い場合には判定結
果出力端子38にハイレベルが出力され、LSIテスタ
ー40は不良と判定する。
When a current flows from the current measuring terminal 36, a voltage is generated across the current detecting resistor 12. This voltage is amplified by the differential amplifier 14 at a predetermined magnification. The upper limit detection comparator 22, the lower limit detection comparator 24, and the OR circuit 26 constitute a window comparator 16. When the output voltage of the differential amplifier 14 is higher than the input voltage of the upper limit input terminal 32, and when the output voltage of the differential amplifier 14 If the input voltage is lower than the input voltage of the lower limit input terminal 34, a high level is output to the determination result output terminal 38, and the LSI tester 40 determines that it is defective.

【0014】以上の実施例では下限入力端子34が存在
し、消費電流の下限をも判定できる電流測定ボードにつ
いて説明したが、下限入力端子34を持たず、消費電流
の上限のみを判定する電流測定ボードも実現可能であ
る。
In the above embodiment, the current measuring board having the lower limit input terminal 34 and capable of determining the lower limit of the current consumption has been described. However, the current measuring board having no lower limit input terminal 34 and determining only the upper limit of the current consumption is described. Boards are also feasible.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例であるLSI電流測定装置を示
す図である。
FIG. 1 is a diagram showing an LSI current measuring device according to an embodiment of the present invention.

【図2】本発明の実施例の電流測定ボードの回路構成を
示す図である。
FIG. 2 is a diagram illustrating a circuit configuration of a current measurement board according to an embodiment of the present invention.

【図3】本発明の実施例であるLSI電流測定装置の消
費電流測定時の構成を説明する図である。
FIG. 3 is a diagram illustrating a configuration at the time of measuring current consumption of an LSI current measuring device according to an embodiment of the present invention.

【図4】一般のLSI測定装置を示す図である。FIG. 4 is a diagram illustrating a general LSI measurement apparatus.

【符号の説明】[Explanation of symbols]

1 :LSI測定装置 2 :LSI電流測定装置 10 :電流測定ボード 12 :電流検出抵抗 14 :差動増幅器 16 :ウィンドウコンパレータ 22 :上限検出コンパレータ 24 :下限検出コンパレータ 26 :OR回路 30 :電流供給端子 32 :上限入力端子 34 :下限入力端子 36 :電流被測定端子 38 :判定結果出力端子 40 :LSIテスター 42 :ケーブル 44 :テストヘッド 46 :テストボード 48 :DUTボード 1: LSI measurement device 2: LSI current measurement device 10: current measurement board 12: current detection resistor 14: differential amplifier 16: window comparator 22: upper limit detection comparator 24: lower limit detection comparator 26: OR circuit 30: current supply terminal 32 : Upper limit input terminal 34: Lower limit input terminal 36: Current measured terminal 38: Judgment result output terminal 40: LSI tester 42: Cable 44: Test head 46: Test board 48: DUT board

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 電流供給端子と電流被測定端子と上限入
力端子と下限入力端子と判定結果出力端子のみの端子を
有し、 前記電流供給端子に一端が接続され前記電流被測定端子
に異なる一端が接続された抵抗と、 該抵抗の両端が入力の二端子に接続された差動増幅器
と、 該差動増幅器の出力端子が入力の一端子に接続され、前
記上限入力端子が異なる入力の一端子に接続された第一
のコンパレータと、 前記差動増幅器の出力端子が入力の一端子に接続され、
前記下限入力端子が異なる入力の一端子に接続された第
二のコンパレータと、 前記第一のコンパレータの出力と第二のコンパレータの
出力とを組み合わせる論理回路と、から成り、 該論理回路の出力が前記判定結果出力端子に接続される
電流測定ボードを備えるLSI電流測定装置。
1. A terminal having only a current supply terminal, a current measurement terminal, an upper limit input terminal, a lower limit input terminal, and a judgment result output terminal, one end being connected to the current supply terminal and a different end being different from the current measurement terminal. A differential amplifier having both ends connected to two input terminals, an output terminal of the differential amplifier connected to one input terminal, and the upper limit input terminal having a different input terminal. A first comparator connected to a terminal, an output terminal of the differential amplifier connected to one terminal of an input,
A second comparator having the lower limit input terminal connected to one terminal of a different input, and a logic circuit combining an output of the first comparator and an output of the second comparator, wherein an output of the logic circuit is An LSI current measurement device including a current measurement board connected to the determination result output terminal.
JP11003075A 1999-01-08 1999-01-08 Apparatus for measuring lsi current Pending JP2000206175A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11003075A JP2000206175A (en) 1999-01-08 1999-01-08 Apparatus for measuring lsi current

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11003075A JP2000206175A (en) 1999-01-08 1999-01-08 Apparatus for measuring lsi current

Publications (1)

Publication Number Publication Date
JP2000206175A true JP2000206175A (en) 2000-07-28

Family

ID=11547230

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11003075A Pending JP2000206175A (en) 1999-01-08 1999-01-08 Apparatus for measuring lsi current

Country Status (1)

Country Link
JP (1) JP2000206175A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004085469A (en) * 2002-08-28 2004-03-18 Yamaha Corp Semiconductor device inspection method and system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004085469A (en) * 2002-08-28 2004-03-18 Yamaha Corp Semiconductor device inspection method and system

Similar Documents

Publication Publication Date Title
KR0142080B1 (en) Apparatus for measuring the quiescent current of an integrated monolithic digital circuit
JP4119060B2 (en) Test equipment
US5959463A (en) Semiconductor test apparatus for measuring power supply current of semiconductor device
JP2001522461A (en) Integrated circuit tester with compensation for leakage current
JP2000206175A (en) Apparatus for measuring lsi current
JP3353288B2 (en) LSI test equipment
JP3494942B2 (en) Integrated semiconductor circuit
JPH11326441A (en) Semiconductor testing device
JP4043743B2 (en) Semiconductor test equipment
JP3098726B2 (en) Printed circuit board inspection equipment
JP2002156403A (en) Apparatus for testing electronic device
KR100355716B1 (en) Test method of low resistor for in-circuit tester
JPS60253883A (en) Constant current load/constant voltage applied current measuring apparatus
JP3436138B2 (en) Bias power supply circuit for semiconductor test equipment
JP2000147071A (en) Characteristics inspection device for analogue circuit
JP2956191B2 (en) Power supply circuit
JPH0366622B2 (en)
JP2001166005A (en) Power supply unit of device for semiconductor testing equipment
JPH07113850A (en) Semiconductor integrated circuit
JPH0712942Y2 (en) IC test equipment
JP2001208801A (en) Method of correcting leakage current for ic tester, and device therefor
KR0148723B1 (en) Integrated circuit parallel test system & method using test machine having single module structure
JP2996989B2 (en) Pin current measuring circuit of IC tester and its substrate
JPH04244974A (en) Measurement of semiconductor integrated circuit
JPH08105935A (en) Semiconductor integrated circuit inspection device