JP2000201000A - Circuit board and positioning thereof - Google Patents

Circuit board and positioning thereof

Info

Publication number
JP2000201000A
JP2000201000A JP11000866A JP86699A JP2000201000A JP 2000201000 A JP2000201000 A JP 2000201000A JP 11000866 A JP11000866 A JP 11000866A JP 86699 A JP86699 A JP 86699A JP 2000201000 A JP2000201000 A JP 2000201000A
Authority
JP
Japan
Prior art keywords
positioning
circuit board
positioning marks
marks
recognized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP11000866A
Other languages
Japanese (ja)
Inventor
Hideaki Araki
英明 荒木
Koji Sawada
孝二 沢田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Metal SMI Electronics Device Inc
Original Assignee
Sumitomo Metal SMI Electronics Device Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Metal SMI Electronics Device Inc filed Critical Sumitomo Metal SMI Electronics Device Inc
Priority to JP11000866A priority Critical patent/JP2000201000A/en
Publication of JP2000201000A publication Critical patent/JP2000201000A/en
Withdrawn legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To reduce the number of defective products and the chances of stoppage of a positioning equipment due to defective alignment marks formed on the surface of a circuit board. SOLUTION: On the surface of a circuit board 21, two pairs of alignment marks 22a, 22b and 23a, 23b are formed. When the circuit board 21 is positioned, the surface of the circuit board 21 is photographed by a camera and the image signal is image processed to search for the first pair of alignment marks 22a, 22b. If these alignment marks can be recognized normally, the circuit board 21 is positioned by means of an XY table, etc., with a coordinates at the center between the first pair of alignment marks 22a, 22b set as a reference. If either of the first pair of alignment marks 22a, 22b or both cannot be recognized normally because they have bleeding, chipping, etc., a second pair of alignment marks 23a, 23b are searched for. If they can be recognized normally, the circuit board 21 is positioned by means of the XY table, etc., with a coordinates at the center between the second pair of alignment marks 23a, 23b as the reference.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、回路基板の表面に
形成した位置決めマークを光学的に認識して回路基板を
位置決めする回路基板の位置決め方法及び回路基板に関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board positioning method and a circuit board for positioning a circuit board by optically recognizing a positioning mark formed on the surface of the circuit board.

【0002】[0002]

【従来の技術】従来、例えばセラミック回路基板の位置
決めは、図4に示すように、セラミック回路基板11の
略対角線上の両端部に2個の位置決めマーク12を厚膜
印刷等により形成し、このセラミック回路基板11の表
面をカメラで撮影して、その画像信号を画像処理して2
個の位置決めマーク12を認識し、各位置決めマーク1
2の中心位置を基準にしてセラミック回路基板11を位
置決めするようにしている。
2. Description of the Related Art Conventionally, for positioning a ceramic circuit board, for example, as shown in FIG. 4, two positioning marks 12 are formed on both ends on a substantially diagonal line of a ceramic circuit board 11 by thick film printing or the like. The surface of the ceramic circuit board 11 is photographed by a camera, and the image signal
Of the positioning marks 12
The ceramic circuit board 11 is positioned with reference to the center position of No. 2.

【0003】[0003]

【発明が解決しようとする課題】一般に、セラミック回
路基板11の表面に形成する位置決めマーク12は、厚
膜印刷で円形、四角形等の形状に形成されることが多い
が、例えば、図5(a)に示すような円形の位置決めマ
ーク12は、常に正確な円形に形成されるとは限らず、
図5(b)に示すように、印刷時のペーストのにじみに
より位置決めマーク12の外周が不定形に広がったり、
或は、図5(c)に示すように、位置決めマーク12の
一部が欠けた形状になることがある。このような欠陥の
ある位置決めマーク12は、位置決めマークとして認識
することができず、セラミック回路基板11の位置決め
を行うことができないため、不良品と判定されて歩留ま
りが低下したり、位置決め装置が停止して生産性が低下
する原因にもなる。
Generally, the positioning marks 12 formed on the surface of the ceramic circuit board 11 are often formed into a circular or square shape by thick-film printing, for example, as shown in FIG. ), The circular positioning mark 12 is not always formed in an accurate circular shape.
As shown in FIG. 5B, the outer periphery of the positioning mark 12 spreads irregularly due to the bleeding of the paste during printing.
Alternatively, as shown in FIG. 5C, a part of the positioning mark 12 may have a missing shape. Since the positioning mark 12 having such a defect cannot be recognized as a positioning mark and the positioning of the ceramic circuit board 11 cannot be performed, it is determined to be defective and the yield is reduced, or the positioning device is stopped. As a result, productivity may be reduced.

【0004】この対策として、位置決めマークの識別条
件を緩和して、多少の欠陥のある位置決めマーク12も
認識できるようにすると、欠陥の有無によって位置決め
マーク12の中心位置がずれて検出されてしまい、位置
決め精度が低下してしまうため、高密度実装化された小
型のセラミック回路基板11に要求される位置決め精度
を確保できない。また、位置決めマークの識別条件を緩
和すれば、セラミック回路基板11の表面に付着したご
みや汚れによって位置決めマーク12を誤認識しやすく
なり、誤った位置決めが行われるおそれもある。
As a countermeasure, if the identification condition of the positioning mark is relaxed so that the positioning mark 12 having some defect can be recognized, the center position of the positioning mark 12 is detected depending on the presence or absence of the defect. Since the positioning accuracy is reduced, the positioning accuracy required for the small-sized ceramic circuit board 11 which is mounted at a high density cannot be secured. Further, if the conditions for identifying the positioning mark are relaxed, the positioning mark 12 can be easily erroneously recognized due to dust or dirt attached to the surface of the ceramic circuit board 11, and erroneous positioning may be performed.

【0005】本発明はこのような事情を考慮してなされ
たものであり、従ってその目的は、位置決めマークの欠
陥による不良品発生や位置決め装置の停止を大幅に低減
でき、歩留まり向上、生産性向上の要求を満たすことが
できると共に、高密度実装化・小型化に伴う位置決め精
度向上の要求も満たすことができる回路基板の位置決め
方法及び回路基板を提供することにある。
SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to significantly reduce the occurrence of defective products and stoppage of a positioning device due to a defect of a positioning mark, thereby improving the yield and the productivity. It is an object of the present invention to provide a circuit board positioning method and a circuit board which can satisfy the requirements of the above, and also can meet the requirements of the improvement of the positioning accuracy accompanying high-density mounting and miniaturization.

【0006】[0006]

【課題を解決するための手段】上記目的を達成するため
に、本発明の請求項1の回路基板の位置決め方法は、回
路基板の表面に複数組の位置決めマークを形成し、画像
認識手段で認識しようとする1つの組の位置決めマーク
を正常に認識できない場合には、他の組の位置決めマー
クをサーチし、当該他の組の位置決めマークを正常に認
識できれば、当該他の組の位置決めマークの位置を基準
にして回路基板を位置決めするようにしたものである。
例えば、2組の位置決めマークを形成した場合、最初に
1組目の位置決めマークを用いて位置決めする際に、位
置決めマークを正常に認識できなければ、2組目の位置
決めマークをサーチし、それを正常に認識できれば、2
組目の位置決めマークの位置を基準にして回路基板を位
置決めする。このようにすれば、1組目の位置決めマー
クに、にじみ、欠け等の欠陥があっても、2組目の位置
決めマークを用いて回路基板を精度良く位置決めするこ
とができる。
According to a first aspect of the present invention, there is provided a method of positioning a circuit board, comprising forming a plurality of sets of positioning marks on a surface of the circuit board and recognizing the marks by image recognition means. If one set of positioning marks cannot be recognized normally, another set of positioning marks is searched. If the other set of positioning marks can be recognized normally, the position of the other set of positioning marks is searched. Is used to position the circuit board.
For example, when two sets of positioning marks are formed, when positioning is first performed using the first set of positioning marks, if the positioning marks cannot be recognized normally, the second set of positioning marks is searched for and searched. If it can be recognized normally, 2
The circuit board is positioned based on the position of the positioning mark of the set. In this way, even if the first set of positioning marks has a defect such as bleeding or chipping, the circuit board can be accurately positioned using the second set of positioning marks.

【0007】この場合、請求項2のように、回路基板の
中心線に関して対称な位置に2組の位置決めマークを形
成すると良い。この場合、回路基板の中心線を座標軸に
とれば、1組目の位置決めマークの座標と2組目の位置
決めマークの座標との関係が±を反転しただけとなり、
座標の設定処理が容易となる。
In this case, it is preferable to form two sets of positioning marks symmetrically with respect to the center line of the circuit board. In this case, if the center line of the circuit board is taken as the coordinate axis, the relationship between the coordinates of the first set of positioning marks and the coordinates of the second set of positioning marks is only inverted ±.
Coordinate setting processing becomes easy.

【0008】また、請求項3のように、画像認識手段で
認識する位置決めマークを選択できるように複数組の位
置決めマークを形成した回路基板を用いれば、上記請求
項1の位置決め方法によって位置決めマークの欠陥によ
る不良品発生や位置決め装置の停止を大幅に低減でき
る。
According to a third aspect of the present invention, when a circuit board on which a plurality of sets of positioning marks are formed so that the positioning marks recognized by the image recognizing means can be selected is used, the positioning method according to the first aspect is used. The occurrence of defective products due to defects and the stoppage of the positioning device can be greatly reduced.

【0009】[0009]

【発明の実施の形態】以下、本発明の実施形態(1)を
図1及び図2に基づいて説明する。回路基板21は、例
えばガラスセラミック、アルミナ等のセラミックの単層
基板又は多層基板である。この回路基板21の表面に
は、例えば2組の位置決めマーク22a,22b,23
a,23bが形成されている。これらの位置決めマーク
22a,22b,23a,23bは、導体ペーストの印
刷・焼成又はフォトリソグラフィ法等により表層導体パ
ターン(図示せず)と同時に形成される。または、表層
導体パターンの一部を位置決めマークとして使用しても
良く、この場合には、表層導体パターン上にレジスト等
の絶縁体被膜を形成する際に位置決めマーク部分を露出
させるように絶縁体被膜を形成する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment (1) of the present invention will be described below with reference to FIGS. The circuit board 21 is, for example, a single-layer board or a multilayer board made of ceramic such as glass ceramic or alumina. On the surface of the circuit board 21, for example, two sets of positioning marks 22a, 22b, 23
a and 23b are formed. These positioning marks 22a, 22b, 23a, 23b are formed simultaneously with the surface conductor pattern (not shown) by printing and baking of a conductor paste or by photolithography. Alternatively, a part of the surface conductor pattern may be used as a positioning mark. To form

【0010】各組の位置決めマーク22a,22b,2
3a,23bは、回路基板21の略対角線上の両端部に
位置すると共に、一方の組の位置決めマーク22a,2
2bと他方の組の位置決めマーク23a,23bとが回
路基板21の中心線(座標のY軸又はX軸)に関して対
称の位置に形成されている。各位置決めマーク22a,
22b,23a,23bは、円形、四角形、十字形等、
どのような形状であっても良いが、全て同一サイズで同
一形状に統一されている。例えば、円形の場合には、直
径0.5mm〜1mm程度に形成されている。
Each set of positioning marks 22a, 22b, 2
3a and 23b are located at both ends on a substantially diagonal line of the circuit board 21, and one set of the positioning marks 22a and 2b.
2b and the other pair of positioning marks 23a and 23b are formed at symmetrical positions with respect to the center line (Y-axis or X-axis of the coordinates) of the circuit board 21. Each positioning mark 22a,
22b, 23a, 23b are circular, square, cross, etc.
Any shape may be used, but they are all the same size and the same shape. For example, in the case of a circular shape, the diameter is about 0.5 mm to 1 mm.

【0011】この回路基板21の位置決めは、位置決め
装置の制御コンピュータ(図示せず)によって図2の位
置決め制御プログラムに従って次のようにして行われ
る。まず、ステップS1で、位置決めステーションに搬
送されてきた回路基板21の表面をカメラ(画像認識手
段)で撮影し、次のステップS2で、カメラから出力さ
れる画像信号を画像処理して、1組目の位置決めマーク
22a,22bをサーチする。この後、ステップS3
で、1組目の位置決めマーク22a,22bを正常に認
識できたか否かを判定し、正常に認識できれば、ステッ
プS4に進み、1組目の位置決めマーク22a,22b
の中心座標を基準にして回路基板21をXYテーブル等
で位置決めする。
The positioning of the circuit board 21 is performed by a control computer (not shown) of the positioning device in accordance with the positioning control program shown in FIG. First, in step S1, the surface of the circuit board 21 conveyed to the positioning station is photographed by a camera (image recognition means), and in the next step S2, image signals output from the camera are subjected to image processing to form a set. The eye positioning marks 22a and 22b are searched. Thereafter, step S3
Then, it is determined whether or not the first set of positioning marks 22a and 22b can be recognized normally. If the first set of positioning marks 22a and 22b can be recognized normally, the process proceeds to step S4.
The circuit board 21 is positioned using an XY table or the like with reference to the center coordinates of.

【0012】もし、1組目の位置決めマーク22a,2
2bの一方又は両方に、にじみ、欠け等の欠陥があって
正常に認識できなければ、ステップS5に進み、カメラ
から出力される画像信号を画像処理して、2組目の位置
決めマーク23a,23bをサーチする。この後、ステ
ップS6で、2組目の位置決めマーク23a,23bを
正常に認識できたか否かを判定し、正常に認識できれ
ば、ステップS7に進み、2組目の位置決めマーク23
a,23bの中心座標を基準にして回路基板21をXY
テーブル等で位置決めする。
If the first set of positioning marks 22a, 2
If one or both of them has a defect such as bleeding or chipping and cannot be recognized normally, the process proceeds to step S5, where the image signal output from the camera is subjected to image processing to perform the second set of positioning marks 23a and 23b. Search for. Thereafter, in step S6, it is determined whether or not the second set of positioning marks 23a and 23b has been normally recognized. If the second set of positioning marks 23a and 23b can be recognized normally, the process proceeds to step S7.
The circuit board 21 is moved in XY with reference to the center coordinates of a and 23b.
Position using a table or the like.

【0013】尚、2組目の位置決めマーク23a,23
bも正常に認識できない場合には、ステップS8に進
み、該回路基板21の排出、不良品発生の報知等のエラ
ー処理を行う。
The second set of positioning marks 23a, 23
If b cannot be recognized normally, the process proceeds to step S8, and error processing such as ejection of the circuit board 21 and notification of occurrence of a defective product is performed.

【0014】以上説明した本実施形態(1)によれば、
回路基板21の表面に2組の位置決めマーク22a,2
2b,23a,23bを形成したので、1組目の位置決
めマーク22a,22bに、にじみ、欠け等の欠陥があ
っても、2組目の位置決めマーク23a,23bを用い
て回路基板21を位置決めすることができる。
According to the embodiment (1) described above,
On the surface of the circuit board 21, two sets of positioning marks 22a, 2
Since the 2b, 23a and 23b are formed, the circuit board 21 is positioned using the second set of positioning marks 23a and 23b even if the first set of positioning marks 22a and 22b has a defect such as bleeding or chipping. be able to.

【0015】本発明者の実験結果によれば、直径1mm
の円形の位置決めマーク22a,22b,23a,23
bを形成したサンプル基板を用いて、1組目の位置決め
マーク22a,22bについて認識処理を行ったとこ
ろ、550枚のサンプル基板中、3枚が認識不良となっ
た(認識不良率=3/550=0.5%)。この3枚の
サンプル基板について、2組目の位置決めマーク23
a,23bの認識処理を行ったところ、全てのサンプル
基板で2組目の位置決めマーク23a,23bを正常に
認識できた(認識不良率=0%)。
According to the experimental results of the present inventor, a diameter of 1 mm
Circular positioning marks 22a, 22b, 23a, 23
When the recognition processing was performed on the first set of positioning marks 22a and 22b using the sample substrate on which “b” was formed, three of the 550 sample substrates failed to recognize (recognition failure rate = 3/550). = 0.5%). For these three sample substrates, the second set of positioning marks 23
As a result of performing the recognition processing of a and 23b, the second set of positioning marks 23a and 23b was normally recognized on all the sample substrates (recognition failure rate = 0%).

【0016】尚、1回目の認識処理で認識不良となる確
率が3/550であれば、2回目の認識処理で認識不良
となる確率は、理論的には(3/550)×(3/55
0)=0.003%となる。
If the probability of recognition failure in the first recognition processing is 3/550, the probability of recognition failure in the second recognition processing is theoretically (3/550) × (3/550). 55
0) = 0.003%.

【0017】このように、本実施形態(1)では、回路
基板21の表面に2組の位置決めマーク22a,22
b,23a,23bを形成して、1組目の位置決めマー
ク22a,22bを正常に認識できない場合に、2組目
の位置決めマーク23a,23bをサーチするようにし
たので、1組目の位置決めマーク22a,22bに、に
じみ、欠け等の欠陥があっても、2組目の位置決めマー
ク23a,23bを用いて回路基板21を位置決めする
ことができる。これにより、位置決めマーク22a,2
2bの欠陥による不良品発生や位置決め装置の停止を大
幅に低減でき、歩留まりを向上できると共に、生産性を
向上でき、生産コストを低減できる。しかも、位置決め
マーク22a,22b,23a,23bの識別条件を緩
和せずに、識別率を高めることができるため、高密度実
装化された小型の回路基板21に要求される位置決め精
度を十分に確保することができ、高密度実装化・小型化
に伴う位置決め精度向上の要求も満たすことができる。
As described above, in the present embodiment (1), two sets of positioning marks 22a and 22 are formed on the surface of the circuit board 21.
When the first set of positioning marks 22a and 22b cannot be recognized normally, the second set of positioning marks 23a and 23b is searched. The circuit board 21 can be positioned using the second set of positioning marks 23a and 23b even if there is a defect such as bleeding or chipping in the portions 22a and 22b. Thereby, the positioning marks 22a, 2
The occurrence of defective products due to the defect 2b and the stoppage of the positioning device can be significantly reduced, the yield can be improved, the productivity can be improved, and the production cost can be reduced. In addition, since the identification rate can be increased without relaxing the identification conditions of the positioning marks 22a, 22b, 23a, and 23b, the positioning accuracy required for the high-density small circuit board 21 is sufficiently ensured. Therefore, it is possible to satisfy the demand for improvement of positioning accuracy accompanying high-density mounting and miniaturization.

【0018】しかも、本実施形態(1)では、1組目の
位置決めマーク22a,22bと2組目の位置決めマー
ク23a,23bとが回路基板21の中心線(座標のY
軸又はX軸)に関して対称の位置に形成されているた
め、1組目の位置決めマーク22a,22bの座標と2
組目の位置決めマーク23a,23bの座標との関係が
±を反転しただけとなり、座標の設定処理が容易となる
利点もある。
Moreover, in this embodiment (1), the first set of positioning marks 22a and 22b and the second set of positioning marks 23a and 23b are aligned with the center line of the circuit board 21 (Y coordinate).
(X axis or X axis), the coordinates of the first set of positioning marks 22a and 22b and 2
The relationship with the coordinates of the positioning marks 23a and 23b of the set is only inverted ±, and there is also an advantage that the coordinate setting processing becomes easy.

【0019】しかしながら、本発明は、回路基板21の
中心線に関して対称な位置に2組の位置決めマークを形
成するものに限定されず、図3に示す本発明の実施形態
(2)のように、1組目の位置決めマーク22a,22
bと2組目の位置決めマーク23a,23bとを回路基
板21の中心線(座標のY軸又はX軸)に関して非対象
の位置に形成しても良い。この場合、1組目の位置決め
マーク22a,22bの座標に対して、X軸方向又はY
軸方向に平行移動した位置に2組目の位置決めマーク2
3a,23bを形成すれば、前者に対して後者のX座標
又はY座標の一方のみを変更するだけで良く、座標の設
定処理が容易である。
However, the present invention is not limited to forming two sets of positioning marks at positions symmetrical with respect to the center line of the circuit board 21, but as in the embodiment (2) of the present invention shown in FIG. First set of positioning marks 22a, 22
b and the second set of positioning marks 23a and 23b may be formed at positions that are asymmetric with respect to the center line (Y-axis or X-axis of the coordinates) of the circuit board 21. In this case, the coordinates of the first pair of positioning marks 22a and 22b are set in the X-axis direction
A second set of positioning marks 2 at the position translated in the axial direction
If 3a and 23b are formed, only the X coordinate or the Y coordinate of the latter need only be changed with respect to the former, and the coordinate setting process is easy.

【0020】但し、本発明は、1組目の位置決めマーク
22a,22bの座標に対して、2組目の位置決めマー
ク23a,23bのX座標とY座標の両方を変更するよ
うにしても良く、この場合でも、本発明の所期の目的は
十分に達成できる。
However, according to the present invention, both the X and Y coordinates of the second set of positioning marks 23a and 23b may be changed with respect to the coordinates of the first set of positioning marks 22a and 22b. Even in this case, the intended object of the present invention can be sufficiently achieved.

【0021】上記各実施形態(1),(2)では、回路
基板21の表面に2組の位置決めマークを形成したが、
3組以上の位置決めマークを形成しても良い。一般に、
N組の位置決めマークを形成すれば、最大、N回の位置
決めマークの認識処理を繰り返すことができる。この場
合、認識処理1回当りの認識不良率をa%とすれば、N
回の認識処理を繰り返して最終的に認識不良となる確率
は、(a/100)N となり、極めて小さい。
In the above embodiments (1) and (2), the circuit
Although two sets of positioning marks were formed on the surface of the substrate 21,
Three or more sets of positioning marks may be formed. In general,
If N sets of positioning marks are formed, the maximum number of positions is N
The recognition process of the decision mark can be repeated. This place
If the recognition failure rate per recognition process is a%, then N
Probability that the recognition process will be repeated in the end
Is (a / 100)N And extremely small.

【0022】また、上記各実施形態(1),(2)で
は、1つの組の位置決めマークを2個としたが、1つの
組の位置決めマークを3個以上としても良い。また、位
置決めマークの位置も、回路基板の対角線上に限定され
ず、対角線から離れた位置であっても良い。その他、本
発明は、回路基板21はセラミック回路基板に限定され
ず、樹脂基板や金属基板であっても良い。
In each of the above embodiments (1) and (2), two sets of positioning marks are used. However, three or more sets of positioning marks may be used. Further, the position of the positioning mark is not limited to the diagonal line of the circuit board, and may be a position apart from the diagonal line. In addition, in the present invention, the circuit board 21 is not limited to the ceramic circuit board, but may be a resin board or a metal board.

【0023】[0023]

【発明の効果】以上の説明から明らかなように、本発明
の請求項1,3では、回路基板の表面に複数組の位置決
めマークを形成し、位置決めに使用する位置決めマーク
を選択することで、複数通りの位置決めを行うことがで
きるようにしたので、位置決めマークの欠陥による不良
品発生や位置決め装置の停止を大幅に低減でき、歩留ま
り向上、生産性向上の要求を満たすことができると共
に、高密度実装化・小型化に伴う位置決め精度向上の要
求も満たすことができる。
As is apparent from the above description, in the first and third aspects of the present invention, a plurality of sets of positioning marks are formed on the surface of a circuit board, and the positioning marks used for positioning are selected. Since multiple types of positioning can be performed, the occurrence of defective products due to defects in the positioning marks and the stoppage of the positioning device can be greatly reduced, and the demands for higher yield and higher productivity can be satisfied. It can also meet the demand for improved positioning accuracy due to mounting and miniaturization.

【0024】更に、請求項2では、回路基板の中心線に
関して対称な位置に2組の位置決めマークを形成したの
で、2組の位置決めマークの座標の設定処理を能率良く
行うことができる。
Furthermore, in the second aspect, since two sets of positioning marks are formed at positions symmetrical with respect to the center line of the circuit board, the processing for setting the coordinates of the two sets of positioning marks can be performed efficiently.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施形態(1)の回路基板の位置決め
方法を説明する回路基板の平面図
FIG. 1 is a plan view of a circuit board illustrating a method for positioning a circuit board according to an embodiment (1) of the present invention.

【図2】位置決め制御プログラムの処理の流れを示すフ
ローチャート
FIG. 2 is a flowchart showing a processing flow of a positioning control program.

【図3】本発明の実施形態(2)の回路基板の位置決め
方法を説明する回路基板の平面図
FIG. 3 is a plan view of a circuit board illustrating a method for positioning the circuit board according to the embodiment (2) of the present invention;

【図4】従来の回路基板の位置決め方法を説明する回路
基板の平面図
FIG. 4 is a plan view of a circuit board for explaining a conventional method of positioning the circuit board.

【図5】(a)は位置決めマークの正常な形状を示す平
面図、(b)はにじみの生じた位置決めマークの形状を
示す平面図、(c)は欠けの生じた位置決めマークの形
状を示す平面図
5A is a plan view showing a normal shape of a positioning mark, FIG. 5B is a plan view showing a shape of a positioning mark having bleeding, and FIG. 5C is a plan view showing a shape of a positioning mark having chipping. Plan view

【符号の説明】[Explanation of symbols]

21…回路基板、22a,22b,23a,23b…位
置決めマーク。
21: circuit board, 22a, 22b, 23a, 23b: positioning mark.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 回路基板の表面に形成した位置決めマー
クを画像認識手段で認識して、その位置決めマークの位
置を基準にして前記回路基板を位置決めする回路基板の
位置決め方法において、 前記回路基板の表面に複数組の位置決めマークを形成
し、 前記画像認識手段で認識しようとする1つの組の位置決
めマークを正常に認識できない場合には、他の組の位置
決めマークをサーチし、当該他の組の位置決めマークを
正常に認識できれば、当該他の組の位置決めマークの位
置を基準にして前記回路基板を位置決めすることを特徴
とする回路基板の位置決め方法。
1. A circuit board positioning method for recognizing a positioning mark formed on a surface of a circuit board by image recognition means and positioning the circuit board with reference to the position of the positioning mark. When a plurality of sets of positioning marks are formed, and one set of positioning marks to be recognized by the image recognition means cannot be normally recognized, another set of positioning marks is searched for and the other set of positioning marks is searched. A method of positioning a circuit board, characterized in that if the mark can be recognized normally, the circuit board is positioned based on the position of the other set of positioning marks.
【請求項2】 前記回路基板の中心線に関して対称な位
置に2組の位置決めマークを形成することを特徴とする
請求項1に記載の回路基板の位置決め方法。
2. The method according to claim 1, wherein two sets of positioning marks are formed at positions symmetrical with respect to a center line of the circuit board.
【請求項3】 基板表面に画像認識手段で認識する位置
決めマークを形成した回路基板において、 基板表面に、前記画像認識手段で認識する位置決めマー
クを選択できるように複数組の位置決めマークを形成し
たことを特徴とする回路基板。
3. A circuit board having a positioning mark to be recognized by an image recognition means on a surface of a substrate, wherein a plurality of sets of positioning marks are formed on the surface of the substrate so that the positioning mark to be recognized by the image recognition means can be selected. A circuit board characterized by the above-mentioned.
JP11000866A 1999-01-06 1999-01-06 Circuit board and positioning thereof Withdrawn JP2000201000A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11000866A JP2000201000A (en) 1999-01-06 1999-01-06 Circuit board and positioning thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11000866A JP2000201000A (en) 1999-01-06 1999-01-06 Circuit board and positioning thereof

Publications (1)

Publication Number Publication Date
JP2000201000A true JP2000201000A (en) 2000-07-18

Family

ID=11485606

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11000866A Withdrawn JP2000201000A (en) 1999-01-06 1999-01-06 Circuit board and positioning thereof

Country Status (1)

Country Link
JP (1) JP2000201000A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100765537B1 (en) * 2000-12-30 2007-10-10 엘지.필립스 엘시디 주식회사 Ailgn Apparatus Of Liquid Crystal Display
JP2012044007A (en) * 2010-08-19 2012-03-01 Fuji Mach Mfg Co Ltd Reference mark registration device for component mounting and reference mark registration method for component mounting
WO2017081773A1 (en) * 2015-11-11 2017-05-18 富士機械製造株式会社 Image processing device and image processing method for base plate

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100765537B1 (en) * 2000-12-30 2007-10-10 엘지.필립스 엘시디 주식회사 Ailgn Apparatus Of Liquid Crystal Display
JP2012044007A (en) * 2010-08-19 2012-03-01 Fuji Mach Mfg Co Ltd Reference mark registration device for component mounting and reference mark registration method for component mounting
WO2017081773A1 (en) * 2015-11-11 2017-05-18 富士機械製造株式会社 Image processing device and image processing method for base plate
JPWO2017081773A1 (en) * 2015-11-11 2018-08-30 株式会社Fuji Image processing apparatus and image processing method for substrate

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