JP2000188581A - Ofdm receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve a signal transmission speed by improving a processing speed of a symbol synchronization detecting circuit in an OFDM receiver. SOLUTION: A phase information generator 109 detects a phase information depending on a quadrant to which a phase discriminated by an absolute value of an in-phase component and an absolute value of a quadrature component of a received signal before FFT processing belongs and acquires a symbol synchronization by subtracting the phase information of the received signal from phase information of one preceding symbol. An FFT processing start timing in an FFT circuit 106 is taken by using the symbol synchronization acquired without multiplication processing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiving apparatus used for OFDM mobile communication.

[0002]

2. Description of the Related Art A receiving apparatus used for conventional OFDM mobile communication (hereinafter simply referred to as an OFDM receiving apparatus).
This will be described with reference to FIGS. FIG.
FIG. 27 is a main block diagram showing a schematic configuration of a conventional OFDM receiving apparatus. FIG. 27 is a schematic diagram of a frame format in wireless communication of the OFDM scheme.

First, the configuration of a conventional apparatus will be described with reference to FIG. The quadrature detector 2601 performs a quadrature detection process on the input received signal. Analog low-pass filters (LPF) 2602 and 2603 remove unnecessary frequency components. A / D converters 2604 and 2605 convert an input analog signal into a digital signal.

[0004] Fourier transform (fast Fourier transform)
(Transform; hereinafter, referred to as FFT) circuit 26
Reference numeral 06 performs FFT processing on an input signal using an output signal of a determination unit 2614 described later as a trigger, and a delay detector 2607 performs delay detection processing on the input signal. The determinator 2608 determines a differential detection signal.

[0005] The delay units 2609 and 2610 delay the input signal and output it. The complex multiplier 2611 performs complex multiplication. This complex multiplication will be described later. The integrator 2612 integrates the output of the complex multiplier 2611.
The subtractor 2613 performs a subtraction process between the output of the integrator 2612 and the threshold, and the determiner 2614 makes a magnitude determination.
This determination result is output to FFT circuit 2606.

Next, the operation of the conventional apparatus will be described. The quadrature detector 2601 performs quadrature detection processing on the received signal to obtain a baseband signal that is an analog signal. This baseband signal is supplied to LPFs 2602 and 260
3, unnecessary frequency components are removed, and the A / D converter 2
Are converted into digital signals by 604 and 2605,
It becomes a digital baseband signal.

[0007] The digital baseband signal is subjected to FFT processing by an FFT circuit 2606 to obtain a signal assigned to each subcarrier. Further, the delay detection processing is performed by the delay detector 2607,
A determination is made by 8 and a demodulated signal is obtained.

By the way, in the OFDM mobile communication, the receiving apparatus needs to take timing so as to start the FFT in synchronization with the base station apparatus on the transmitting side in symbol synchronization. Hereinafter, establishment of symbol synchronization will be described.

In the OFDM mobile communication, as shown in FIG. 27, the same waveform as the last part of each symbol is inserted at the head of each symbol as a guard interval. In general, symbol synchronization is established using the guard interval which is a known symbol.

First, a complex multiplier 261 compares a signal before FFT processing and a signal obtained by delaying the signal before FFT processing by one symbol by delay units 2609 and 2610.
1 performs complex multiplication represented by the following equation.

(Equation 1) Here, R (nT) represents phase information.
D (nT) represents a received signal, Ts represents a symbol length, Tg represents a guard interval length, and T represents a sampling period. n takes 1, 2,....

Next, the output of the complex multiplier 2611 is integrated by an integrator 2612. Here, since the waveform of the guard section is the same as the last part of each symbol,
The integration result has a peak at the start timing of each effective symbol as shown in FIG. Therefore, by detecting the timing at which the integration result exceeds the threshold value, the head of each effective symbol can be detected, so that symbol synchronization can be established.

Accordingly, the integration result output from the integrator 2612 is subtracted from the threshold value by the subtractor 2613,
By performing the magnitude determination by the determiner 2614,
The FFT processing start timing of the FFT circuit 2606 can be controlled.

The detection of symbol synchronization is performed without using a guard interval, for example, by inserting the same symbol as the phase reference symbol required for differential detection at the head of each burst, and using the same symbol as the phase reference symbol. It may be detected from the result of the complex multiplication.

As described above, the conventional OFDM receiving apparatus includes:
Symbol synchronization can be established and FFT start timing can be taken.

[0015]

However, the conventional apparatus has the following problems. That is, since the processing speed of the symbol synchronization detection circuit is limited by the processing of the multiplier having a low processing speed, the symbol synchronization detection circuit of the conventional device employing the configuration using the multiplier can increase the processing speed. Have difficulty.

The present invention has been made in view of the above, and an object of the present invention is to provide an OFDM receiver in which the processing speed of a symbol synchronization detection circuit is improved and the signal transmission speed is improved.

[0017]

The gist of the present invention is to simply convert the phase difference by the quadrant to which the phase belongs based on the absolute value of the in-phase component and the absolute value of the quadrature component of the received signal, and to easily obtain the phase information of the received signal. Is calculated, and the phase information of the received signal and 1
The symbol synchronization is obtained by subtracting the phase information before the symbol, and the FFT processing start timing is set using the obtained symbol synchronization.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS OFD according to a first embodiment of the present invention
The M receiving apparatus includes a phase detecting means for detecting the phase of the received signal of the OFDM system, and a phase detecting means for detecting the phase difference by subtracting the detected phase and a phase obtained by delaying the detected phase by a predetermined symbol. Phase difference detecting means, absolute value integrating means for detecting and integrating the absolute value of the detected phase difference, and detecting a timing at which the output of the absolute value integrating means falls below an arbitrary threshold value; And timing control means for setting the timing to start the fast Fourier transform processing on the signal.

According to this configuration, when detecting the phase difference for establishing the symbol synchronization of the received signal, only the subtraction process is used, and the multiplication process is not used. Speed up, resulting in OFDM
The signal transmission speed of the receiving device can be increased. Also, since the absolute value of the phase difference is integrated when detecting the timing of the start of the fast Fourier transform processing, the integration result does not converge to 0, and the detection accuracy can be improved.

[0020] In the OFDM receiver according to a second aspect of the present invention, in the first aspect, the phase detection means may include a quadrant judging section for judging a quadrant to which the phase of the received signal belongs, A configuration including a phase determination unit that determines the phase of the received signal from the difference between the absolute value and the absolute value of the orthogonal component and the output of the quadrant determination unit is adopted.

According to this configuration, when the symbol synchronization of the received signal is established, the symbol is obtained by performing the subtraction processing of the absolute values of the I and Q components of the received signal and determining the quadrant to which the phase belongs. Therefore, the amount of calculation required for establishing symbol synchronization can be reduced, the processing speed can be increased, and as a result, the signal transmission speed of the OFDM receiver can be increased.

In the OFDM receiving apparatus according to a third aspect of the present invention, in the second aspect, the quadrant judging section makes the judgment using the difference between the absolute value of the in-phase component and the absolute value of the quadrature component of the received signal. The configuration to perform is adopted.

According to this configuration, since only subtraction processing is performed at the time of quadrant determination, the amount of calculation required for establishing symbol synchronization can be reduced, the processing speed can be increased, and as a result, the signal transmission speed of the OFDM receiver can be increased. it can.

An OFDM receiving apparatus according to a fourth aspect of the present invention is the OFDM receiving apparatus according to any one of the first to third aspects,
The absolute value integrating means is configured to integrate only the absolute value of the phase difference of a received signal having a received level higher than an arbitrary threshold.

According to this configuration, the detection accuracy of the fast Fourier transform processing start timing is improved in order to determine that the received signal whose reception level is lower than an arbitrary threshold value includes an error and not use it for the integration processing. Can be.

An OFDM receiver according to a fifth aspect of the present invention is the OFDM receiver according to any one of the first to fourth aspects,
The absolute value integrating means is configured to integrate only the absolute value of the phase difference in which the phase detected by the phase detecting means exceeds an arbitrary threshold.

According to this configuration, the reception signal whose detected phase exceeds an arbitrary threshold value is determined to include an error and is not used in the integration process, so that the detection accuracy of the fast Fourier transform process start timing is improved. be able to.

An OFDM receiver according to a sixth aspect of the present invention, in the fifth aspect, adopts a configuration in which the absolute value integrating means changes the threshold value in accordance with a reception level of a reception signal.

According to this configuration, the threshold value relating to the phase for detecting the received signal not to be used in the integration processing is changed according to the received signal level, so that the absolute value of the phase difference with reduced error is reduced. The value integration processing can be performed, and the detection accuracy of the fast Fourier transform processing start timing can be improved.

An OFDM receiving apparatus according to a seventh aspect of the present invention is the OFDM receiving apparatus according to any one of the first to sixth aspects, wherein
The phase detection means employs a configuration having a thinning unit that reduces the number of samplings of the in-phase component and the quadrature component of the received signal after removing unnecessary frequency components.

According to this configuration, the signal processing can be sped up in order to reduce the sampling frequency.

An OFDM receiving apparatus according to an eighth aspect of the present invention is the OFDM receiving apparatus according to any one of the first to seventh aspects,
The timing control means is configured to set the timing of starting the fast Fourier transform process only when the reception level exceeds an arbitrary threshold.

According to this configuration, whether to set the timing for starting the fast Fourier transform process is determined according to the reception level. Therefore, when the reception level is, for example, zero or close to zero, no timing is set. By doing so, it is possible to prevent erroneous establishment of symbol synchronization in a section where no signal is transmitted.

An OFDM receiver according to a ninth aspect of the present invention is the OFDM receiver according to any one of the first to eighth aspects,
The timing control means includes: a comparing unit that determines the magnitude of the absolute value of the phase difference calculated by the absolute value integrating means and an arbitrary threshold; and a comparing unit that determines the absolute value of the phase difference in the magnitude determination result of the comparing unit. And a counter unit that counts the number of times that the number of times the number becomes smaller, and the timing of starting the fast Fourier transform process is set only when the number counted by the counter unit exceeds an arbitrary threshold value.

According to this configuration, the phase information of the current time and 1
Only when the number of times the absolute value of the difference from the phase information before the symbol falls below the threshold exceeds a certain number of times, the timing of starting the fast Fourier transform processing is set. Can be improved to prevent the establishment of

[0036] In the OFDM receiving apparatus according to a tenth aspect of the present invention, in the ninth aspect, the timing control means has two thresholds having arbitrarily different values, and the counter section A configuration is adopted in which the timing of starting the fast Fourier transform processing is set only when the number of times of output takes a value between the two threshold values.

According to this configuration, the phase information of the current time and 1
No upper / lower limit is set for the number of times the difference between the phase information before the symbol is below the threshold, and the timing of the start of the fast Fourier transform process is set only when the difference is within the appropriate range, so no signal is transmitted. It is possible to increase the accuracy of preventing symbol synchronization from being erroneously established in a section.

[0038] In the OFDM receiving apparatus according to an eleventh aspect of the present invention, in any one of the first to eighth aspects, the timing control means counts the number of times the reception level exceeds an arbitrary threshold. A configuration is provided in which a counter section is provided and the timing of starting the fast Fourier transform processing is set only when the number counted by the counter section falls below an arbitrary threshold value.

According to this configuration, when the reception level exceeds the threshold value, it is determined that an error is included, and only when the number of cases where the reception level exceeds the threshold value is less than a certain number of times, the fast Fourier transform processing starts. By setting the timing, it is possible to increase the accuracy of preventing symbol synchronization from being erroneously established in a section where no signal is transmitted.

The OFDM receiver according to a twelfth aspect of the present invention is the OFDM receiver according to any one of the first to eleventh aspects, wherein the absolute value integrating means calculates a phase difference as an output of the phase difference detecting means. The present invention employs a configuration having a phase difference integrating section for integrating, and a subtracting section for calculating the absolute value of the phase difference output from the phase difference detecting means and subtracting the output of the phase difference integrating section from the integrated value.

According to this configuration, the error due to the frequency offset deviation can be removed from the result of integrating the absolute value of the phase difference, so that the detection accuracy of the timing of the start of the fast Fourier transform processing can be improved.

A base station apparatus according to a thirteenth aspect of the present invention provides the base station apparatus according to any one of the first to twelfth aspects.
A configuration including an FDM receiver is employed.

According to this configuration, the amount of computation required for acquiring symbol synchronization is reduced, the processing speed is increased, and as a result OF
The signal transmission speed of the DM receiver can be increased.

A communication terminal according to a fourteenth aspect of the present invention is the communication terminal according to any one of the first to twelfth aspects.
A configuration including an FDM receiver is employed.

According to this configuration, the amount of calculation required for establishing symbol synchronization is reduced, the processing speed is increased, and as a result OF
The signal transmission speed of the DM receiver can be increased.

The OFDM receiving method according to a fifteenth aspect of the present invention comprises a phase detecting step of detecting a phase of a received signal of the OFDM system, a detected phase and a phase obtained by delaying the detected phase by a predetermined symbol. A phase difference detecting step of detecting the phase difference by subtracting the absolute value of the detected phase difference, an absolute value integrating step of detecting and integrating an absolute value of the detected phase difference, and an output of the absolute value integrating step having an arbitrary threshold value. And a timing control step of detecting a timing lower than the above, and setting this timing as a timing for starting a fast Fourier transform process on the received signal.

According to this method, only the subtraction process is used and the multiplication process is not used when detecting the phase difference for establishing the symbol synchronization of the received signal. Speed up, resulting in OFDM
The signal transmission speed of the receiving device can be increased.

[0048] In the OFDM reception method according to a sixteenth aspect of the present invention, in the fifteenth aspect, the phase detection step is:
A quadrant determining step of determining a quadrant to which a phase of the received signal belongs; and a phase determining step of determining a phase of the received signal from a difference between an absolute value of an in-phase component and an absolute value of a quadrature component of the received signal and an output of the quadrant determining step. And.

According to this method, when acquiring the phase difference for establishing the symbol synchronization of the received signal, subtracting the absolute value of the I component and the absolute value of the Q component of the received signal and determining the quadrant to which the phase belongs. , The amount of calculation required for establishing symbol synchronization can be reduced, the processing speed can be increased, and as a result, the signal transmission speed of the OFDM receiver can be increased.

[0050] In the OFDM receiving method according to a seventeenth aspect of the present invention, in the sixteenth aspect, the quadrant judging step comprises:
The determination is made using the difference between the absolute value of the in-phase component and the absolute value of the quadrature component of the received signal.

According to this method, since only subtraction processing is performed at the time of quadrant determination, it is possible to reduce the amount of computation required for establishing symbol synchronization, increase the processing speed, and consequently increase the signal transmission speed of the OFDM receiver. it can.

[0052] In the OFDM receiving method according to an eighteenth aspect of the present invention, in any one of the fifteenth to seventeenth aspects, in the absolute value accumulating step, the reception level may be higher than an arbitrary threshold value. Only the absolute value of the phase difference of the signal is integrated.

According to this method, it is possible to improve the detection accuracy of the fast Fourier transform processing start timing in order to determine that a received signal whose received level is lower than an arbitrary threshold value includes an error and not use the signal for integration processing. Can be.

In the OFDM receiving method according to a nineteenth aspect of the present invention, in any one of the fifteenth aspect to the eighteenth aspect, the absolute value accumulating step may be configured so that the phase detected by the phase detecting step is arbitrary. Only the absolute value of the phase difference exceeding the threshold value is integrated.

According to this method, it is determined that a received signal whose detected phase exceeds an arbitrary threshold value includes an error and is not used in the integration processing, so that the detection accuracy of the fast Fourier transform processing start timing is improved. be able to.

[0056] In the OFDM reception method according to a twentieth aspect of the present invention, in the nineteenth aspect, in the absolute value integration step, the threshold value is changed according to the reception level of a received signal.

According to this method, the threshold value relating to the phase for detecting the received signal to be not used in the integrating process is changed according to the received signal level, so that the absolute value of the phase difference with reduced error is reduced. The value integration processing can be performed, and the detection accuracy of the fast Fourier transform processing start timing can be improved.

In the OFDM receiving method according to a twenty-first aspect of the present invention, in any one of the fifteenth aspect to the twentieth aspect, the phase detecting step comprises the steps of: A thinning unit is provided to reduce the number of component samplings.

According to this method, the signal processing can be sped up in order to reduce the sampling frequency.

[0060] In the OFDM reception method according to the twenty-second aspect of the present invention, in any one of the fifteenth aspect to the twenty-first aspect, the timing control step may be performed only when the reception level exceeds an arbitrary threshold value. The timing of the start of the fast Fourier transform processing has been set.

According to this method, it is determined whether or not to set the timing for starting the fast Fourier transform process according to the reception level. Therefore, when the reception level is, for example, zero or close to zero, no timing is set. By doing so, it is possible to prevent erroneous establishment of symbol synchronization in a section where no signal is transmitted.

[0062] In the OFDM reception method according to a twenty-third aspect of the present invention, in any one of the fifteenth aspect to the twenty-second aspect, the timing control step includes the step of calculating the absolute value of the phase difference calculated by the absolute value integration step. And an arbitrary threshold value, and count the number of times the absolute value of the phase difference is smaller in the magnitude judgment result, and start the fast Fourier transform process only when this number exceeds an arbitrary threshold value Timing is set.

According to this method, the phase information of the current time and 1
Only when the number of times the absolute value of the difference from the phase information before the symbol falls below the threshold exceeds a certain number of times, the timing of starting the fast Fourier transform processing is set. Can be improved to prevent the establishment of

In the OFDM reception method according to a twenty-fourth aspect of the present invention, in any one of the fifteenth aspect to the twenty-third aspect, the timing control step may include two thresholds having arbitrarily different values. Has a value, determines the magnitude of the absolute value of the phase difference calculated by the absolute value integration step and an arbitrary threshold, and counts the number of times the absolute value of the phase difference is smaller in the magnitude determination result, The timing for starting the fast Fourier transform processing is set only when this number takes a value between the two threshold values.

According to this method, the phase information of the current time and 1
No upper / lower limit is set for the number of times the difference between the phase information before the symbol is below the threshold, and the timing of the start of the fast Fourier transform process is set only when the difference is within the appropriate range, so no signal is transmitted. It is possible to increase the accuracy of preventing symbol synchronization from being erroneously established in a section.

In the OFDM reception method according to a twenty-fifth aspect of the present invention, in any one of the fifteenth aspect to the twenty-fourth aspect, the timing control step counts the number of times the reception level exceeds an arbitrary threshold. The timing for starting the fast Fourier transform processing is set only when the number of times falls below an arbitrary threshold value.

According to this method, when the reception level exceeds the threshold value, it is determined that an error is included. Only when the number of cases where the reception level exceeds the threshold value is less than a certain number of times, the start of the fast Fourier transform process is started. By setting the timing, it is possible to increase the accuracy of preventing symbol synchronization from being erroneously established in a section where no signal is transmitted.

In the OFDM receiving method according to a twenty-sixth aspect of the present invention, in any one of the fifteenth to twenty-fifth aspects, the absolute value integrating step includes the step of calculating the phase difference output from the phase difference detecting step. A phase difference integrating step for integrating, and a subtraction step for calculating the absolute value of the phase difference output from the phase difference detecting step and subtracting the output of the phase difference integrating step from the integrated value are provided.

According to this method, since the error due to the frequency offset deviation can be removed from the result of integrating the absolute value of the phase difference, the detection accuracy of the timing of starting the fast Fourier transform processing can be improved.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Embodiment 1) Embodiment 1 of the present invention will be described with reference to FIGS. FIG. 1 is a main block diagram showing a schematic configuration of the OFDM receiving apparatus according to Embodiment 1 of the present invention.

First, referring to FIG.
The configuration of the FDM receiver will be described. Quadrature detector 1
01 performs a quadrature detection process on the input received signal. The LPFs 102 and 103 remove unnecessary frequency components. The A / D converters 104 and 105 convert the input analog signal into a digital signal.

FFT circuit 106 applies F
The FT process is performed, and the delay detector 107 performs the delay detection process on the input signal. The determiner 108 determines a differential detection signal.

The phase information generator 109 generates phase information of the input signal. The configuration of the phase information generator 109 will be described later in detail. The subtractor 110 performs a subtraction process on the two input signals, and the delay unit 111 delays the input signal by one symbol.

The absolute value detector 112 takes out and outputs the absolute value of the input signal, and the integrator 113 integrates the input signal. The subtractor 114 performs a subtraction process on the input signal and the threshold. The determiner 115 determines whether the input signal is positive or negative.

Next, the operation of the OFDM receiver according to the present embodiment will be described. First, the operation related to demodulation will be described. The quadrature detector 101 performs quadrature detection processing on a received signal to obtain a baseband signal that is an analog signal. This baseband signal is
Unnecessary frequency components are removed by 2 and 103, and A / D
The digital signals are converted by the converters 104 and 105 into digital baseband signals.

The digital baseband signal is subjected to FFT processing by the FFT circuit 106 to obtain a signal assigned to each subcarrier. Further, the delay detector 1
07, a delay detection process is performed, a determination is made by the determiner 108, and a demodulated signal is obtained.

Next, operations related to phase difference detection and FFT process start timing control for establishing symbol synchronization will be described. The phase information generator 109 generates phase information of the received signal from an in-phase component (hereinafter, referred to as an I component) and a quadrature component (hereinafter, referred to as a Q component) of the received signal before the FFT processing.

The subtractor 110 subtracts the phase information output from the phase information generator 109 from the phase information delayed by one symbol by the delay unit 111 to calculate a phase rotation. The absolute value detector 112 extracts only the absolute value of the output of the subtractor 110, and the integrator 113 integrates this.

The subtractor 114 calculates a difference between the absolute value of the phase rotation integrated by the integrator 113 and the threshold value,
The determiner 115 determines the magnitude.

Here, if a guard section as shown in FIG. 27 is used, the result of integrating the absolute value of the phase difference between the signal before FFT processing and the signal obtained by delaying the signal before FFT processing by one symbol, that is, The output of the integrator 113 becomes minimum at the start timing of the effective symbol as shown in FIG.
Therefore, the timing at which the integration result of the absolute value of the phase difference becomes minimum can be detected by calculating the difference from the preset threshold value.

As described above, since the head of the effective symbol can be detected, that is, the symbol synchronization can be detected, the FFT circuit 1 uses the effective symbol head timing output from the determiner 115 as a start trigger.
By performing the FFT processing in 06, appropriate demodulation processing can be performed.

Note that, without providing the absolute value detector 112, the phase difference output from the subtractor 110 is directly used as an integrator 113.
, The integration of the phase difference at a time that is not the correct symbol synchronization timing is an integration of an uncorrelated signal, and the integration result converges to 0. Therefore, the phase difference can be minimized at a time that is not the correct symbol synchronization timing. The nature increases. Therefore, it is possible to prevent the symbol synchronization timing error from increasing by integrating the absolute values of the phase differences.

Next, the phase information generator according to the present embodiment will be described with reference to FIG. FIG. 3 is a main block diagram showing a schematic configuration of the phase information generator of the OFDM receiving apparatus according to Embodiment 1 of the present invention. The phase information generator according to the present embodiment does not include a multiplier, and reduces the amount of calculation required for detecting the phase of a received signal.

The I and Q components of the input signal are detected by absolute value detectors 301 and 302, respectively, and output to a subtractor 303.

The I and Q components of the input signal are input to the quadrant determiner 304, where the quadrant is determined. Hereinafter, the quadrant determiner 304 will be described in detail.

When the phase is obtained from the I component and the Q component of the input signal, it is necessary to calculate the phase Θ = arctan (Q / I) of the input signal, and this arctan (Q / I)
Can be approximated by the following equation, assuming that I2 + Q2 = 1. arctan (Q / I) = | I | − | Q | −

FIG. 4 shows arctan (Q / I) and | I |
6 is a graph showing a relationship with − | Q |. Like this
= | I |-| Q |, the error can be kept within 1.8 °.

Based on the above approximation, the quadrant determiner 304 determines that the quadrant is the first quadrant if | I | − | Q | {−4} / π + 1, and similarly, | I | − | Q ｜ {4} /
If π-3, the second quadrant, | I |-| Q | {-4} / π
If -3, the third quadrant, | I |-| Q | {4} / π + 1
If so, it is determined to be the fourth quadrant.

Next, converter 305 converts the output of subtractor 303 according to the result of determination by quadrant determiner 304 to determine phase Θ.

As described above, in this embodiment, when symbol synchronization of a received signal is obtained, multiplication processing is not used, and the absolute value of the I component and the absolute value of the Q component of the received signal are subtracted and the phase is changed. Since acquisition is performed by judging which quadrant to belong to, it is possible to reduce the amount of computation required for symbol synchronization acquisition, increase the processing speed, and as a result, increase the signal transmission speed of the OFDM receiver.

(Embodiment 2) The OFDM receiving apparatus according to Embodiment 2 of the present invention provides the OFDM receiving apparatus according to Embodiment 1.
It has the same configuration as that of the receiving apparatus, but normalizes the phase information based on the envelope information, thereby increasing the signal transmission speed even when the received signal is not normalized.

The OFDM receiver according to the present embodiment will be described below with reference to FIGS. In the figure, the same components as those of the first embodiment are denoted by the same reference numerals, and the detailed description is omitted.

FIG. 5 shows an OF according to the second embodiment of the present invention.
FIG. 3 is a main block diagram illustrating a schematic configuration of a phase information generator of the DM receiving device. The I and Q components of the input signal are input to an envelope generator 501, and envelope information is calculated. Next, the normalization circuit 502 normalizes the input signal using the calculated envelope information. The converter 305 converts the normalized input signal according to the determination result of the quadrant determiner 304 to obtain phase information.

Hereinafter, the configurations and operations of the envelope generator 501 and the normalization circuit 502 will be described in detail.

The envelope information Z is expressed as follows: Z = √ (| I | ² + | Q
| ² ), but obtaining a sum of squares requires a relatively large amount of calculation. Therefore, it is conceivable to perform an approximate calculation with Z = | I | + | Q | so that only a small amount of calculation is required.
°), an error of 1.414 times the value calculated by the sum of squares √ (| I | ² + | Q | ² ), that is, about 41% occurs, and the error rate characteristic deteriorates.

Therefore, in the present embodiment, an approximate expression using multiplication that can be easily performed by bit shifting is used. That is, when | I |> | Q |, Z = | I | +
0.375 × | Q |, when | Q |> | I |, Z = | Q
| + 0.375 × | I | is used as an approximate expression.

FIG. 6 shows that | I |> | Q
FIG. 6 is a graph showing the results obtained by theoretical calculation of the relationship between the phase θ and the estimated radius, that is, the amplitude, in the case of |, that is, in the range of 0 ≦ θ ≦ 45 °. From this graph, it can be seen that the use of the above-described approximate expression enables envelope information to be obtained with an error of 7% or less as compared with the case where the square sum is obtained.

Hereinafter, the envelope generator 501 for obtaining the envelope information by using the above approximate expression will be described with reference to FIG. FIG. 7 is a main block diagram showing a schematic configuration of an envelope generator according to Embodiment 2 of the present invention.

The I and Q components of the input signal are input to absolute value detectors 701 and 702. Absolute value detector 701,
702 takes the absolute value of the input signal and outputs it to the subtractor 705 and the adder 710. Selection of the I component and the Q component is performed by switches 703 and 704. The result of the subtraction by the subtractor 705 is determined by the determiner 706, and the result of the determination is reflected in the control of the switches 703 and 704.

The 2-bit shifter 707 and 3-bit shifter 708 shift the output of the switch 704 by 2 bits and 3 bits, respectively. Outputs of the 2-bit shifter 707 and the 3-bit shifter 708 are added by an adder 709. Thereby, 0.3 in the above approximate expression is obtained.
A multiplication process of 75 is performed. Adder 710 adds the output of switch 703 and the output of adder 709, and outputs envelope information.

Next, the operation of the envelope generator of the phase information generator according to the present embodiment will be described.

The absolute values of the I and Q components are detected by absolute value detectors 701 and 702, respectively, and | I | and |
Q | is obtained.

Next, the outputs (| I | and | Q |) of the absolute value detectors 701 and 702 are subjected to a subtraction process in a subtractor 705, and the output of the subtractor 705 determines the magnitude.
The outputs of the absolute value detectors 701 and 702 (| I | and | Q
|) Are selected and output by switches 703 and 704, respectively. The switches 703 and 704 are connected to the decision unit 7
A signal to be output is selected according to the result of the determination in step 06.

The switch 703 outputs | I | if the output of the decision unit 706 is | I |> | Q |, and | Q |> | I
If |, | Q | is output. The switch 704 outputs | Q | when the output of the decision unit 706 is | I |> | Q |, and outputs | I | when | Q |> | I |. That is, the switch 703 outputs the larger of | I | and | Q |, and the switch 704 outputs the smaller of | I | and | Q |.

Next, the signal output from switch 704 |
The smaller of I | and | Q | is shifted by 2 bits and 3 bits by a 2-bit shifter 707 and a 3-bit shifter 708, respectively.

Since the amplitude is halved by the 1-bit shift, the amplitude is 0.25 times for the 2-bit shift and 0.125 times for the 3-bit shift. Therefore, the 2-bit shifter 7
07 is 0.25 times the amplitude of the output signal of the switch 704, and the amplitude of the output signal of the 3-bit shifter 708 is 0.125 times the amplitude of the output signal of the switch 704.

Next, the adder 709 outputs the output signal of the 2-bit shifter 707 (0.25 × | I | or 0.25 × |
Q |) and the output signal of the 3-bit shifter 708 (0.12
5 × | I | or 0.125 × | Q |)
The output signal of the adder 709 is 0.375 × | I | or 0.375 × | Q |.

Finally, the adder 710 is connected to the switch 703
Output signal (| I | or | Q |) and the output signal of the adder 709 (0.375 × | I | or 0.375 × | Q |).
Are added to obtain envelope information Z based on the approximate expression.

As described above, the envelope information generator according to the present embodiment does not perform the sum-of-squares operation in the calculation of the envelope, and can perform simple multiplication and addition that can be realized by a bit shift on a circuit. Since an approximation formula consisting only of the above is used, a multiplier is not required, and the necessary amount of calculation can be reduced.
Processing speed is improved.

Next, a normalization circuit included in the phase information generator according to the present embodiment will be described with reference to FIG. FIG. 8 is a main block diagram showing a schematic configuration of a normalization circuit of the phase information generator according to Embodiment 2 of the present invention.

The determiners 801 to 804 determine whether the phase is larger or smaller than π / 4.
05 to 807 add the bit-shifted input signal and the envelope signal controlled whether or not the polarity is inverted according to the result of the immediately preceding determiner.

By adopting such a configuration, it is possible to remove the information of the envelope from the input signal. Then, the output of the decision unit 801 indicates that the phase of the input signal is π in the quadrant.
The output of the determiner 802 is determined whether the output of the determiner 802 is greater than or less than π / 8 within the range of π / 4 determined by the determiner 801, and the output of the determiner 803 is determined by the determiner 802. The output of the decision unit 804 indicates whether it is not less than π / 16 or less within the range of π / 16 determined by the decision unit 803, respectively.

Here, the case where the output normalized signal is composed of 4 bits has been described. However, an arbitrary number of determiners and arithmetic units can be provided, and the greater the number, the higher the accuracy.
Also, as is clear from FIG. 8, the number of arithmetic units must be equal to the number of decision units minus one.

As described above, the normalization circuit of the phase information generator according to the present embodiment does not require a multiplier, can reduce the required calculation amount, and improves the processing speed.

As described above, according to the present embodiment, the amount of calculation required for symbol synchronization acquisition is reduced by performing phase information generation and the accompanying envelope generation and normalization processing without using a multiplier. And speeds up the processing, resulting in OF
The signal transmission speed of the DM receiver can be increased.
Further, since the present invention can be applied even when the received signal is not normalized, it is possible to cope with more communication modes than in the first embodiment.

(Embodiment 3) The OFDM receiving apparatus according to Embodiment 3 of the present invention provides the OFDM receiving apparatus according to Embodiment 1.
It has the same configuration as that of the receiving apparatus, except that the threshold used is changed according to the line quality.

Hereinafter, the OFDM receiving apparatus according to the present embodiment will be described with reference to FIG. FIG. 9 is a main block diagram showing a schematic configuration of the OFDM receiving apparatus according to Embodiment 3 of the present invention. In the figure, the same components as those of the first embodiment are denoted by the same reference numerals, and the detailed description is omitted.

When the signal-to-noise power ratio is low, the influence of thermal noise and the like becomes large, and the amplitude error and the phase error become large. Therefore, the channel quality is estimated using the demodulated signal determination error, and the channel quality is estimated. Try changing the threshold.

The subtractor 901 performs a subtraction process on the input signal and the output signal of the determiner 108, and the determiner 902 determines the magnitude. The result of this decision unit is a decision error of the demodulated signal. The switch 903 is controlled by a determination error output from the determiner 902, and selectively outputs a threshold A and a threshold B. Here, the threshold value A is larger than the threshold value B. If the determination error exceeds a certain value, the larger threshold value A is output to the subtractor 114; Is output as the threshold value B.

As described above, according to the present embodiment, by making the threshold variable according to the channel quality, it is possible to improve the accuracy of symbol synchronization acquisition as compared with the first embodiment.

(Embodiment 4) The OFDM receiving apparatus according to Embodiment 4 of the present invention provides the OFDM receiving apparatus according to Embodiment 3.
It has the same configuration as the receiving device, except that the phase information of the symbol whose signal level is lower than the threshold value is not used for the integration processing.

Hereinafter, an OFDM receiving apparatus according to the present embodiment will be described using FIG. FIG. 10 is a main block diagram showing a schematic configuration of the OFDM receiving apparatus according to Embodiment 4 of the present invention. Note that, in FIG.
The same components as those described above are denoted by the same reference numerals, and detailed description thereof is omitted.

Symbols having a reception level lower than a certain value are considered to have a poor reception state, and their phase information is considered to contain an error. The phase information is not used for the integration processing.

The subtractor 1001 is provided with a phase information generator 109.
Subtraction processing is performed between the envelope information and the threshold value of
Performs a magnitude determination. This determination result controls the switch 1003 so that the output of the absolute value detector 112 is input to the integrator 113 only when the reception level is equal to or higher than the threshold value.

As described above, according to the present embodiment, the accuracy of symbol synchronization acquisition is higher than in Embodiment 4 by not using the phase information of the symbol whose reception level is lower than the threshold value in the integration processing. be able to.

(Embodiment 5) The OFDM receiving apparatus according to Embodiment 5 of the present invention provides the OFDM receiving apparatus according to Embodiment 3.
It has the same configuration as the receiving device, except that the phase information exceeding the threshold is not used for the integration processing.

Hereinafter, an OFDM receiving apparatus according to the present embodiment will be described using FIG. FIG. 11 is a main block diagram showing a schematic configuration of the OFDM receiving apparatus according to Embodiment 5 of the present invention. Note that, in FIG.
The same components as those described above are denoted by the same reference numerals, and detailed description thereof is omitted.

Since phase information exceeding a certain value may include an error, in the present embodiment, phase information exceeding a preset threshold is not used in the integration processing.

[0130] The subtractor 1101 is a phase information generator 109.
Is subtracted from the threshold value, and the decision unit 1102 makes a magnitude judgment. This determination result controls the switch 1003 so that the output of the absolute value detector 112 is input to the integrator 113 only when the value is equal to or smaller than the threshold value.

As described above, according to the present embodiment, since the phase information exceeding the threshold is not used for the integration processing, the accuracy of acquiring the symbol synchronization can be improved as compared with the fourth embodiment.

(Embodiment 6) The OFDM receiving apparatus according to Embodiment 6 of the present invention provides the OFDM receiving apparatus according to Embodiment 5.
It has the same configuration as the receiving device, except that the threshold value is changed according to the line quality.

Hereinafter, an OFDM receiving apparatus according to the present embodiment will be described using FIG. FIG. 12 is a main block diagram showing a schematic configuration of the OFDM receiving apparatus according to Embodiment 6 of the present invention. Note that, in FIG.
The same reference numerals are given to the same components as those in FIGS. 5 and 5, and the detailed description is omitted.

When the signal-to-noise power ratio is low, the influence of thermal noise and the like increases, and the amplitude error and the phase error increase. Therefore, the channel quality is estimated using the demodulation signal determination error, and the channel quality is estimated according to the channel quality. Try changing the threshold.

The switch 1201 is controlled by a decision error output from the decision unit 902, and selectively outputs a threshold value C and a threshold value D. Here, threshold value C> threshold value D, and if the determination error exceeds a certain value, threshold value C, which is the larger value, is output to subtractor 1101,
If the value is equal to or smaller than the predetermined value, the smaller threshold value D is output.

As described above, according to the present embodiment, by making the threshold variable according to the channel quality, it is possible to improve the accuracy of symbol synchronization acquisition as compared with the fifth embodiment.

(Embodiment 7) The OFDM receiving apparatus according to Embodiment 7 of the present invention provides the OFDM receiving apparatus according to Embodiment 1.
It has the same configuration as the receiving device, except that the received signal after A / D conversion is input to the phase information generator after passing through the LPF.

Hereinafter, the OFDM receiving apparatus according to the present embodiment will be described with reference to FIG. FIG. 13 is a main block diagram showing a schematic configuration of an OFDM receiving apparatus according to Embodiment 7 of the present invention. In the figure, the first embodiment
The same components as those described above are denoted by the same reference numerals, and detailed description thereof is omitted.

The LPFs 1301 and 1302 remove unnecessary frequency components from the output signals of the A / D converters 104 and 105 and output the signals to the phase information generator 109.

In particular, when the cutoff frequency of the LPF is lowered, the effect of removing unnecessary frequency components increases, and the signal-to-noise power ratio can be improved. The frequency offset is
In order to detect using the signal before FFT which is a multiplex signal,
Even if the cutoff frequency of the LPF is lowered, the detection accuracy of the frequency offset does not decrease.

As described above, according to the present embodiment, after removing unnecessary frequency components from the received signal by the LPF,
Since the signal is input to the phase information generator, the detection accuracy of the frequency offset can be further improved compared to the first embodiment.

(Embodiment 8) The OFDM receiving apparatus according to Embodiment 8 of the present invention provides the OFDM receiving apparatus according to Embodiment 7.
It has the same configuration as the receiving device, except that the sampling frequency is reduced to increase the signal transmission speed.

Hereinafter, an OFDM receiving apparatus according to the present embodiment will be described using FIG. FIG. 14 is a main block diagram showing a schematic configuration of the OFDM receiving apparatus according to Embodiment 8 of the present invention. In FIG.
The same components as those described above are denoted by the same reference numerals, and detailed description thereof is omitted.

The thinning circuits 1401 and 1402 are provided with LPFs.
The sampling frequency is reduced by thinning out the received signal after passing through 1301 and 1302. Since the noise bandwidth of the signal after passing through the LPF is reduced, the sampling frequency can be reduced.

As described above, according to the present embodiment, it is possible to increase the signal transmission speed by reducing the sampling frequency.

(Embodiment 9) The OFDM receiving apparatus according to Embodiment 9 of the present invention provides the OFDM receiving apparatus according to Embodiment 7.
It has the same configuration as the receiving device, except that it is input to the phase information generator after passing through an analog LPF.

Hereinafter, an OFDM receiving apparatus according to the present embodiment will be described with reference to FIG. FIG. 15 is a main block diagram showing a schematic configuration of the OFDM receiving apparatus according to Embodiment 9 of the present invention. In FIG.
The same components as those described above are denoted by the same reference numerals, and detailed description thereof is omitted.

The LPFs 1501 and 1502 are analog filters and remove unnecessary frequency components. LPF15
01 and 1502 are output from A / D converters 1503 and 15
04, and is converted into a digital signal.
9 is input.

As described above, according to the present embodiment, the operation of the A / D converter is further improved as compared with the eighth embodiment by using an analog filter for the LPF that passes a signal before being input to the phase information generator. Speed can be reduced,
Signal transmission speed can be increased.

(Embodiment 10) Embodiment 1 of the present invention
0 according to the third embodiment.
It has the same configuration as the DM receiver, except that the condition that the envelope information exceeds a threshold value is added to the condition for obtaining symbol synchronization.

Hereinafter, an OFDM receiving apparatus according to the present embodiment will be described using FIG. FIG. 16 is a main block diagram showing a schematic configuration of the OFDM receiving apparatus according to Embodiment 10 of the present invention. In the figure, the same components as those of the third embodiment are denoted by the same reference numerals, and the detailed description is omitted.

In this embodiment, in order to prevent symbol synchronization from being established in a section where no signal is transmitted,
In consideration of the fact that only the thermal noise is present in the section where no signal is transmitted and the signal level is low, a condition that the envelope information exceeds the threshold value is added to the condition of symbol synchronization acquisition.

The subtractor 1601 is a phase information generator 109
, The envelope information output from the envelope generator 501 is subtracted from the threshold value, and the determiner 1602 makes a magnitude determination. The AND circuit 1603 is controlled by the output of the determinator 1602, and determines whether or not the reception level exceeds the threshold value.
The determination result of No. 15 is output to the FFT circuit 106.

As described above, according to the present embodiment, whether to set the timing of starting the fast Fourier transform processing is determined according to the reception level. By not setting the timing, symbol synchronization can be prevented from being erroneously established in a section where no signal is transmitted.

(Embodiment 11) Embodiment 1 of the present invention
1 according to the tenth embodiment.
It has the same configuration as that of the FDM receiver, except that the threshold used is changed according to the line quality.

Hereinafter, the OFDM receiving apparatus according to the present embodiment will be described using FIG. FIG. 17 is a main block diagram showing a schematic configuration of the OFDM receiving apparatus according to Embodiment 11 of the present invention. In the drawings, the same components as those in Embodiments 3 and 10 are denoted by the same reference numerals, and detailed description thereof will be omitted.

When the signal-to-noise power ratio is low, the influence of thermal noise and the like becomes large, and the amplitude error and the phase error become large. Therefore, the channel quality is estimated using the demodulated signal determination error, and the channel quality is estimated. Try changing the threshold.

The switch 1701 is controlled by a determination error output from the determiner 902, and selectively outputs a threshold value E and a threshold value F. Here, threshold value E> threshold value F, and if the determination error exceeds a certain value, threshold value E, which is the larger value, is output to subtractor 1601,
If the value is equal to or smaller than the predetermined value, a smaller threshold value F is output.

As described above, according to the present embodiment, by making the threshold variable according to the channel quality, it is possible to prevent symbol synchronization from being established in a section where no signal is transmitted. This can be performed with higher accuracy than in Embodiment 10.

(Embodiment 12) Embodiment 1 of the present invention
The OFDM receiver according to Embodiment 2 is the OFDM receiver according to Embodiment 3.
It has the same configuration as that of the DM receiver, except that the number of times that the absolute value of the difference between the phase information at the current time and the phase information one symbol before falls below a predetermined threshold exceeds a certain number. This is in addition to the condition for synchronous acquisition.

The OFDM receiving apparatus according to the present embodiment will be described below with reference to FIGS. FIG.
FIG. 8 is a main block diagram showing a schematic configuration of an OFDM receiving apparatus according to Embodiment 12 of the present invention. FIG. 19 is a schematic configuration of a control circuit of the OFDM receiving apparatus according to Embodiment 12 of the present invention. It is a principal part block diagram shown. In the figure, the same components as those of the third embodiment are denoted by the same reference numerals, and the detailed description is omitted.

In FIG. 18, control circuit 1801 determines whether or not the number of times that the difference between the phase information at the current time and the phase information one symbol before falls below a predetermined threshold exceeds a certain number. The result of this determination is output to the AND circuit 1802 as a control signal. The AND circuit 1802 transmits the head timing of the valid symbol detected by the determiner 115 to the FFT circuit 106 and selectively switches whether to use the FFT start trigger according to the output of the control circuit 1801.

In FIG. 19, a subtractor 1901 subtracts the absolute value of the difference between the phase information at the current time, which is the output of the absolute value detector 112, and the phase information one symbol before, from a threshold value G, The determiner 1902 makes a magnitude determination.

The counter 1903 counts and outputs the number of times that the absolute value of the phase difference falls below the threshold value among the determination results of the determiner 1902. The subtractor 1904 includes a counter 190
3 is subtracted from the threshold value H, and the decision unit 1905 makes a magnitude judgment. As described above, the output of the determiner 1905 is a control signal indicating whether or not the number of times that the difference between the phase information at the current time and the phase information one symbol before falls below a predetermined threshold exceeds a certain number. And the AND circuit 180
2 is output.

As described above, according to the present embodiment, the number of times that the absolute value of the difference between the phase information at the current time and the phase information one symbol before falls below a predetermined threshold exceeds a certain number. Only when the start timing of the effective symbol
By using the FT start trigger, it is possible to prevent symbol synchronization from being established in a section where no signal is transmitted, more accurately than in the tenth embodiment.

(Embodiment 13) Embodiment 1 of the present invention
3 according to the twelfth embodiment.
It has the same configuration as the FDM receiver, except that the counter in the control circuit counts the difference between the number of absolute values of the phase difference below the threshold value and the number of phase differences exceeding the threshold value.

Hereinafter, an OFDM receiving apparatus according to the present embodiment will be described with reference to FIG. FIG. 20 is a main block diagram showing a schematic configuration of a control circuit of the OFDM receiving apparatus according to Embodiment 13 of the present invention. In the figure,
The same components as those in the twelfth embodiment are denoted by the same reference numerals, and detailed description is omitted.

Unlike the counter 1903 of FIG. 19, the counter 2001 of FIG. 20 not only counts the number of times that the absolute value of the phase difference falls below the threshold value G, When the absolute value of the phase difference exceeds the threshold value G, the counted number of times of decrease is reduced by one.

For example, when the determination result, which is the output of the determiner 1902, indicates that the absolute value of the phase difference falls below the threshold value G,
If the absolute value of the phase difference exceeds the threshold value G in the determination result output from the determiner 1902, the number of times the phase difference output by the counter falls below the threshold value is two.

As described above, according to the present embodiment, the number of times that the absolute value of the difference between the phase information at the current time and the phase information one symbol before falls below a predetermined threshold value, and the threshold value, Only when the difference from the number of times exceeds the predetermined number of times, the head timing of the effective symbol is used as the FFT start trigger to prevent the symbol synchronization from being established in the section where no signal is transmitted. 12 can be performed with higher accuracy.

(Embodiment 14) Embodiment 1 of the present invention
4 according to the twelfth embodiment.
It has the same configuration as that of the FDM receiver, except that the number of times that the difference between the phase information at the current time and the phase information one symbol before falls below the threshold falls within a certain range. It is in addition.

Hereinafter, an OFDM receiving apparatus according to the present embodiment will be described using FIG. FIG. 21 is a main block diagram showing a schematic configuration of a control circuit of the OFDM receiving apparatus according to Embodiment 14 of the present invention. In the figure,
The same components as those in the twelfth embodiment are denoted by the same reference numerals, and detailed description is omitted.

The subtractor 2101 subtracts the output of the counter 1903 from the threshold value, and the magnitude judgment unit 2102 judges the magnitude. The result of this determination is used as a control signal by the logical product circuit 2.
Output to 103. The logical product circuit 2103 is provided by the determiner 1
The logical product of the output of the determination unit 2102 and the output of the determination unit 2102 is obtained, and a control signal is output to the logical product circuit 1802.

Here, the threshold value input to the subtractor 2101 has a larger value than the threshold value input to the subtractor 1904. That is, the counter 1903
Is larger than the threshold value input to the subtractor 1904 and smaller than the threshold value input to the subtractor 2101, that is, whether or not the output of Is determined.

As described above, according to the present embodiment, it is determined that the number of times that the difference between the phase information at the current time and the phase information one symbol before is less than the threshold value is within a certain range by symbol synchronization. By adding to the acquisition condition, it is possible to prevent symbol synchronization from being established in a section where no signal is transmitted, more accurately than in the thirteenth embodiment.

(Embodiment 15) Embodiment 1 of the present invention
5 according to the fourteenth embodiment.
It has the same configuration as that of the FDM receiver, except that the threshold value to be compared with the absolute value of the phase difference is changed according to the line quality.

Hereinafter, an OFDM receiver according to the present embodiment will be described using FIG. 22 and FIG. FIG.
FIG. 2 is a main block diagram showing a schematic configuration of the OFDM receiving apparatus according to Embodiment 15 of the present invention. FIG. 23 is a schematic configuration of a control circuit of the OFDM receiving apparatus according to Embodiment 15 of the present invention. It is a principal part block diagram shown. In the drawings, the same components as those in Embodiments 3 and 14 are denoted by the same reference numerals, and detailed description thereof will be omitted.

When the signal-to-noise power ratio is low, the influence of thermal noise and the like increases, and the amplitude error and the phase error increase. Therefore, the channel quality is estimated using the demodulation signal determination error, and the channel quality is estimated. Try changing the threshold.

In FIG. 22, a control circuit 2201 receives the output of the absolute value detector 112 and the output of the decision unit 902.

In FIG. 23, a switch 2301 is controlled by the line quality information output from the decision unit 902, and selectively outputs a threshold value I and a threshold value J. Here, threshold value I> threshold value J. If the determination error exceeds a certain value, threshold value I, which is the larger value, is output to subtractor 1901; Is output as the threshold value J.

As described above, according to the present embodiment, by making the threshold variable according to the channel quality, it is possible to prevent symbol synchronization from being established in a section where no signal is transmitted. It can be performed with higher accuracy than the embodiments 12 to 14.

(Embodiment 16) Embodiment 1 of the present invention
6 according to the tenth embodiment.
It has the same configuration as that of the FDM receiver, except that the number of times that the envelope information exceeds the threshold value is equal to or less than a certain number, as a condition for obtaining symbol synchronization.

Hereinafter, an OFDM receiving apparatus according to the present embodiment will be described using FIG. FIG. 24 is a main block diagram showing a schematic configuration of the OFDM receiving apparatus according to Embodiment 16 of the present invention. In the figure, the same components as those of the tenth embodiment are denoted by the same reference numerals, and the detailed description is omitted.

The counter 2401 determines the magnitude of the envelope information output from the determiner 1602 and the threshold value,
Count and output the number of times that the envelope information exceeds the threshold value.
The subtractor 2402 subtracts the output of the counter 2401 from the threshold value, and the determiner 2403 makes a magnitude determination.

The AND circuit 2404 is controlled by the output of the decision unit 1602 and the output of the decision unit 2403, and the number of times the reception level exceeds the threshold and the number of times the reception level exceeds the threshold is equal to or less than the threshold. Only in this case, the determination result of the determiner 115 is output to the FFT circuit 106.

As described above, according to the present embodiment, only when the number of times that the envelope information exceeds the threshold value is equal to or less than a certain number, the head timing of the effective symbol is used as the FFT start trigger so that the signal is transmitted. Embodiment 1 Prevents Symbol Synchronization from Being Established in Non-Performed Sections
It can be performed more accurately than zero.

(Embodiment 17) Embodiment 1 of the present invention
7 is the OFDM receiver according to the first embodiment.
It has the same configuration as the DM receiver, except that an error due to a frequency offset shift is removed from the integrated absolute value of the phase rotation.

The OFDM receiving apparatus according to the present embodiment will be described below with reference to FIG. FIG. 25 is a main block diagram showing a schematic configuration of a control circuit of the OFDM receiving apparatus according to Embodiment 17 of the present invention. In the figure,
The same components as those in the first embodiment are denoted by the same reference numerals, and detailed description is omitted.

When the frequency offset is large and is shifted by, for example, about 45 degrees, the sum of the absolute values of the phase rotations includes an error due to the frequency offset shift. Therefore, in the present embodiment, this is removed.

The integrator 2501 integrates the phase rotation amount output from the subtractor 110. Thus, the amount of phase rotation per symbol due to the frequency offset shift is obtained. Therefore, in the subtractor 2502, the integrator 11
By subtracting the output of the integrator 2501 from the integrated absolute value of the phase rotation, which is the output of 3, the absolute value of the phase rotation amount from which the phase rotation amount due to the frequency offset is removed can be calculated.

As described above, according to the present embodiment, the accuracy of calculating the amount of phase rotation when detecting the head of an effective symbol can be increased, and thus the effect of improving the accuracy of symbol synchronization can be obtained. .

As described above, according to the present invention,
The processing speed of the symbol synchronization detection circuit can be improved, and the signal transmission speed can be improved.

[Brief description of the drawings]

FIG. 1 is a main block diagram showing a schematic configuration of an OFDM receiving apparatus according to Embodiment 1 of the present invention.

FIG. 2 is a graph showing an integration result of a guard section in the OFDM receiving apparatus according to the embodiment.

FIG. 3 is a main block diagram showing a schematic configuration of a phase information generator of the OFDM receiving apparatus according to the embodiment.

FIG. 4 is a graph showing a theoretical calculation result of a phase calculation approximate expression used in the phase information generator according to the embodiment.

FIG. 5 is a main block diagram showing a schematic configuration of a phase information generator of the OFDM receiving apparatus according to Embodiment 2 of the present invention.

FIG. 6 is a graph showing theoretical calculation results of an approximate expression for calculating envelope information used in the phase information generator according to the embodiment.

FIG. 7 is a main block diagram showing a schematic configuration of an envelope generator according to the embodiment.

FIG. 8 is a main block diagram showing a schematic configuration of a normalization circuit of the phase information generator according to the embodiment.

FIG. 9 is a main block diagram showing a schematic configuration of an OFDM receiving apparatus according to Embodiment 3 of the present invention.

FIG. 10 is a main block diagram showing a schematic configuration of an OFDM receiving apparatus according to Embodiment 4 of the present invention.

FIG. 11 is a main block diagram showing a schematic configuration of an OFDM receiving apparatus according to Embodiment 5 of the present invention.

FIG. 12 is a main block diagram showing a schematic configuration of an OFDM receiving apparatus according to Embodiment 6 of the present invention.

FIG. 13 is a main block diagram showing a schematic configuration of an OFDM receiving apparatus according to Embodiment 7 of the present invention.

FIG. 14 is a main block diagram showing a schematic configuration of an OFDM receiving apparatus according to Embodiment 8 of the present invention.

FIG. 15 is a main block diagram showing a schematic configuration of an OFDM receiving apparatus according to Embodiment 9 of the present invention.

FIG. 16 is a main block diagram showing a schematic configuration of an OFDM receiving apparatus according to Embodiment 10 of the present invention.

FIG. 17 is a main block diagram showing a schematic configuration of an OFDM receiving apparatus according to Embodiment 11 of the present invention.

FIG. 18 is a main block diagram showing a schematic configuration of an OFDM receiving apparatus according to Embodiment 12 of the present invention.

FIG. 19 is a main block diagram showing a schematic configuration of a control circuit of the OFDM receiving apparatus according to the above embodiment.

FIG. 20 is a main block diagram showing a schematic configuration of a control circuit of the OFDM receiving apparatus according to Embodiment 13 of the present invention.

FIG. 21 is a main block diagram showing a schematic configuration of a control circuit of the OFDM receiver according to Embodiment 14 of the present invention;

FIG. 22 is a main block diagram showing a schematic configuration of an OFDM receiving apparatus according to Embodiment 15 of the present invention.

FIG. 23 is a main block diagram showing a schematic configuration of a control circuit of the OFDM receiver according to the above embodiment.

FIG. 24 is a main block diagram showing a schematic configuration of an OFDM receiving apparatus according to Embodiment 16 of the present invention.

FIG. 25 is a main block diagram showing a schematic configuration of a control circuit of the OFDM receiving apparatus according to Embodiment 17 of the present invention.

FIG. 26 is a main block diagram showing a schematic configuration of a conventional OFDM receiver.

FIG. 27 is a schematic view of a frame format in OFDM wireless communication;

FIG. 28 is a graph showing a result of integrating guard intervals in a conventional OFDM receiver.

[Explanation of symbols]

 Reference Signs List 101 Quadrature detector 106 FFT circuit 107 Delay detector 108 Judge 109 Phase information generator 112 Absolute value detector 304 Quadrant judge 305 Converter 501 Envelope generator 502 Normalizer 707 2-bit shifter 708 3-bit shifter 1801 control circuit

Continuation of the front page (72) Inventor Mitsuru Uesugi 3-3-1 Tsunashima Higashi, Kohoku-ku, Yokohama-shi, Kanagawa Prefecture F-term in Matsushita Communication Industrial Co., Ltd. 5K022 DD01 DD19 DD33 DD42

Claims (26)

[Claims] 1. A phase detecting means for detecting a phase of an OFDM received signal, and a phase detecting means for subtracting a detected phase and a phase obtained by delaying the detected phase by a predetermined symbol to detect a phase difference. Phase difference detecting means, absolute value integrating means for detecting and integrating the absolute value of the detected phase difference, and detecting a timing at which the output of the absolute value integrating means falls below an arbitrary threshold value; An OFDM receiving apparatus comprising: timing control means for setting a timing for starting a fast Fourier transform process on a signal. 2. A quadrant judging unit for judging a quadrant to which a phase of a received signal belongs, a difference between an absolute value of an in-phase component and an absolute value of a quadrature component of the received signal, and an output of the quadrant judging unit. 2. The OFDM receiving apparatus according to claim 1, further comprising: a phase determining unit that determines a phase of a received signal from the received signal. 3. The OFDM receiving apparatus according to claim 2, wherein the quadrant judging section makes a judgment using a difference between an absolute value of an in-phase component and an absolute value of a quadrature component of a received signal. 4. The apparatus according to claim 1, wherein said absolute value integrating means integrates only an absolute value of said phase difference of a received signal having a received level higher than an arbitrary threshold value. An OFDM receiver according to any one of claims 1 to 3. 5. The absolute value integrating means according to claim 1, wherein said absolute value integrating means integrates only the absolute value of said phase difference whose phase detected by said phase detecting means exceeds an arbitrary threshold value. The OFDM receiver according to any one of the above. 6. The OFDM receiving apparatus according to claim 5, wherein said absolute value integrating means changes said threshold value according to a reception level of a reception signal. 7. The phase detector according to claim 1, wherein the phase detector has a thinning unit for reducing the number of samplings of the in-phase component and the quadrature component of the received signal after removing unnecessary frequency components. 5. The OFDM receiver according to claim 1. 8. The method according to claim 1, wherein the timing control means sets the timing of starting the fast Fourier transform only when the reception level exceeds an arbitrary threshold. The OFDM receiver according to any one of the preceding claims. 9. A comparing unit for judging the absolute value of the phase difference calculated by the absolute value accumulating unit and an arbitrary threshold value, the timing control unit comprising: And a counter unit for counting the number of times the absolute value of the counter unit becomes smaller, and setting the timing of the start of the fast Fourier transform process only when the number of times counted by the counter unit exceeds an arbitrary threshold value. The OFD according to any one of claims 1 to 8, wherein
M receiving device. 10. The timing control means has two thresholds having different values arbitrarily determined, and when the number of times output by the counter section takes a value between the two thresholds. 10. The OFDM receiving apparatus according to claim 9, wherein a timing for starting the fast Fourier transform processing is set only. 11. The timing control means has a counter unit for counting the number of times the reception level exceeds an arbitrary threshold value, and performs high-speed operation only when the number of times counted by the counter unit falls below an arbitrary threshold value. 9. The timing for starting Fourier transform processing is set.
The OFDM receiver according to any one of the above. 12. A phase difference integrating section for integrating a phase difference output from the phase difference detecting section,
12. A subtraction unit for calculating an absolute value of a phase difference as an output of the phase difference detection unit and subtracting an output of the phase difference integration unit from a value obtained by integration. The OFDM receiver according to any one of the above. 13. A base station apparatus comprising the OFDM receiver according to claim 1. Description: 14. A communication terminal device comprising the OFDM receiving device according to claim 1. Description: 15. A phase detecting step for detecting a phase of a received signal of the OFDM system, and a phase for detecting a phase difference by subtracting the detected phase and a phase obtained by delaying the detected phase by a predetermined symbol. A phase difference detecting step, an absolute value integrating step of detecting and integrating an absolute value of the detected phase difference, and detecting a timing at which an output of the absolute value integrating step falls below an arbitrary threshold value, and receiving the timing. A timing control step of setting a timing for starting a fast Fourier transform process on a signal.
Receiving method. 16. The phase detecting step includes: a quadrant determining step of determining a quadrant to which a phase of a received signal belongs; and a difference between an absolute value of an in-phase component and an absolute value of a quadrature component of the received signal and an output of the quadrant determining step. 16. A phase determining step of determining a phase of a received signal from the received signal.
DM receiving method. 17. The OFDM reception method according to claim 16, wherein said quadrant determination step performs the determination using a difference between an absolute value of an in-phase component and an absolute value of a quadrature component of a received signal. 18. The method according to claim 15, wherein in the absolute value integrating step, only the absolute value of the phase difference of a received signal having a received level higher than an arbitrary threshold value is integrated. Or the OFDM receiving method described in 19. The method according to claim 15, wherein in the absolute value integrating step, only the absolute value of the phase difference whose phase detected by the phase detecting step exceeds an arbitrary threshold value is integrated.
The OFDM reception method according to any one of claims 1 to 18. 20. The OFDM reception method according to claim 19, wherein said absolute value integration step changes said threshold value according to a reception level of a reception signal. 21. The phase detecting step according to claim 1, further comprising a thinning section for reducing the number of sampling of the in-phase component and the quadrature component of the received signal after removing unnecessary frequency components.
The OFDM receiving method according to any one of claims 5 to 20. 22. The method according to claim 15, wherein the timing control step sets the timing of starting the fast Fourier transform process only when the reception level exceeds an arbitrary threshold value. OFDM reception method as described in the above. 23. The timing control step, wherein the magnitude of the absolute value of the phase difference calculated by the absolute value integration step and an arbitrary threshold value are determined, and in the magnitude determination result, the absolute value of the phase difference is larger. 23. The OFDM receiving method according to claim 15, wherein the number of times of decrease is counted, and the timing of starting the fast Fourier transform processing is set only when this number exceeds an arbitrary threshold value. . 24. The timing control step has two thresholds having arbitrarily determined different values, and calculates the difference between the absolute value of the phase difference calculated by the absolute value integration step and an arbitrary threshold. The magnitude is determined, and the number of times the absolute value of the phase difference becomes smaller in the magnitude determination result is counted, and the timing of starting the fast Fourier transform process is set only when this number takes a value between the two thresholds. The OFDM receiving method according to any one of claims 15 to 23, wherein the method is performed. 25. The timing control step includes counting the number of times the reception level exceeds an arbitrary threshold, and setting the timing of starting the fast Fourier transform process only when this number falls below an arbitrary threshold. Claim 15 characterized by the above-mentioned.
The OFDM receiver according to any one of claims 1 to 24. 26. The absolute value integrating step includes: a phase difference integrating step of integrating a phase difference output from the phase difference detecting step; and calculating and integrating an absolute value of the phase difference output from the phase difference detecting step. 16. A subtraction step of subtracting the output of the phase difference integration step from the obtained value.
The OFDM reception method according to any one of claims 25 to 25.