JP2000188422A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to inject sufficient holes into an active region by constituting a potential well of an active layer where radiative recombination of electrons and holes occurs, a hole emitting layer make of p-type AlGaN, a p-type contact layer made of p-type InGaN, and a metallic ohmic contact. SOLUTION: Asymmetric claddings for prevention of leakage of electrons from an active region are adopted to obtain a high p-type mobility. For the reason, a p-AlGaN cladding layer 10 is added to the structure of GaN-based LED, and a p-IgGaN layer 11 is substituted for a contact p-GaN layer. In addition, an i-GaN current diffusion layer 12 and an electron emitting layer 13 are added for more favorable lateral uniformity of electron injection. Further, a thread displacement stopping layer 4 based on distorted superlattice is provided by either of alternately stacked lattice structure and a distributed black reflector layer which also functions as a mirror.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device,
Light emitting diode (LED) and laser diode (L
D).

[0002]

Background Art, Problems, and Means for Solving the Problems
The present invention is a light emitting diode structure with an asymmetric cladding, a sapphire substrate with a thin porous surface layer or a patterned porous structure that controls the nucleation process of the quaternary InAlGaN buffer layer and reduces distortion. A quaternary InAlGaN buffer layer, an n-GaN layer, and an III-
A tunnel barrier and an electron diffusion layer comprising a group V material;
An active layer comprising a group III-V material, forming a single or multiple potential well for electrons and holes, in which luminescent recombination of electrons and holes occurs, and a p-type A
Provided is a light emitting diode structure including a hole emitting layer made of lGaN, a p-type contact layer made of p-type InGaN, and an ohmic contact portion of a metal to the hole emitting layer.

Preferably, the tunnel barrier and the electron diffusion layer have a thickness of 5 to 50 °, the active layer has a width of 5 to 0.1 μm, and the hole emitting layer has a thickness of 50 to 1 μm.
m, and the p-type contact layer has a thickness of 50 ° to 1 μm.
With a width of There may be an electron emitting layer (e.g., 50 [deg.] to 1 [mu] m wide) made of an n-type or undoped III-V material and constituting a potential well for electrons and an electron storage layer.

In designing an LED, there are the following points to be achieved.

[0005] Sufficient hole injection into the active region.

The quality of the crystal structure of the active region.

High internal efficiency.

[0008] Improved light extraction.

[0009] To achieve the above points, the following features are used in embodiments of the present invention. They also
Features of the invention, individually or in combination.

An asymmetric cladding is provided to prevent leakage of electrons from the active region.

Quaternary buffer layer.

[0012] Threading dislocation
Strained superlattice to prevent intrusion into the active region and improve light extraction from its structure.

A quaternary alloy cladding that provides lattice matching between the cladding and the active region.

Active region laterally confined to prevent recombination of non-light emitting carriers.

A porous sapphire surface that controls the nucleation process of the quaternary buffer layer and reduces the strain in the epitaxial layer.

FIG. 1 shows a sapphire substrate 1, a GaN buffer 2, an n-GaN layer 3, an InGaN active layer 4,
GaN-based LED configured with p-GaN layer 5, n-contact, and p-contact
1 shows a simple conventional structure.

FIG. 2 shows a sapphire substrate, a GaN buffer 2, an n-GaN layer 3, and a lower n-AlGaN second layer.
A cladding layer 6, a lower n-InGaN first cladding layer 7, an InGaN active layer 4, an upper p-AlGaN first cladding layer 8, an upper p-AlGaN second cladding layer 9, 1 illustrates a prior art GaN-based single quantum well LED with a symmetric cladding configured with a GaN layer 5, an n-contact, and a p-contact.

[0018]

DETAILED DESCRIPTION OF THE INVENTION The present invention employs an asymmetric cladding to prevent electron leakage from the active region to overcome the problems associated with low p-type mobility.

In FIG. 3, a p-AlGaN cladding layer 10 is added, and the contact p-GaN layer 5 of FIG.
In addition, an i-GaN current spreading layer 12 has been added for better lateral uniformity of electron injection.

In FIG. 4, an electron emitting layer 13 has been added for better lateral uniformity of electron injection.

In FIG. 5, furthermore, a threaded dislocation blocking layer 14 based on strained superlattices is provided by either an alternate superlattice structure or a distributed Bragg reflector layer which also acts as a mirror. Has been brought.

In FIG. 6, an outer mirror 15 based on a metal layer or a metal-dielectric interference filter is used.

In FIG. 7, the distortion in the active layer 4 is suppressed by adjusting the composition of the quaternary alloy in the claddings 16 and 17 for lattice matching. The same purpose is achieved by adding a graded cladding layer 18.

FIG. 8 shows an advanced structure using lateral confinement of carriers within an active region 4 consisting of isolated islands embedded in a wide gap matrix provided by confinement layers 19 and 20. .

FIG. 9 is a modification of the structure shown in FIG. 3 in which the formation of the front transparent metal contact portion is facilitated.

In each of the above-described examples, the crystal of the compound semiconductor 3 containing GaN as a main component is represented by the formula (Ga _x Al _{1 -x} ) _y In
_It is grown on the surface of the buffer layer 2 represented by _1-yN (where 0 = x = 1, 0 = y = 1) (FIG. 3). The addition of In suppresses the generation of crystal defects, thereby achieving excellent crystallinity and excellent flatness. The addition of In
Further, the crystal growth rate is increased, thereby shortening the deposition time required for the buffer layer. It is difficult to grow a p-type GaN layer on a conventional buffer layer. This is because the film has a very low crystallinity. For this reason, n-type GaN has conventionally been grown on a sapphire substrate. According to one embodiment of the present invention, there is provided a growth method for growing p-type (Ga _x Al _{1 -x} ) _y In _{1 -y} N directly on a buffer as an inverted LED structure ( (FIG. 9).

The following are also features of the present invention, individually or in combination.

The use of a sapphire substrate with a thin porous surface layer or a patterned structure to control the nucleation process of the GaN-based buffer layer and reduce distortion. The structure having the porous surface layer or pattern formed thereon can be formed by laser scanning, plasma etching, or chemical vapor deposition using an appropriate mask.

The structure of this LED is asymmetric. The main reason for this is that the mobility of p-type GaN (about several tens cm ² / V ·
sec) is n-type GaN (300 cm ² / V · se
It is much smaller than c). This is very different from other types of compound semiconductor LED devices having compatible p-type and n-type mobilities. Therefore, the additional layer inserted on the p-type GaN side prevents leakage of escape electrons (FIGS. 3, 4, 5, 6, and 7).

The use of strained superlattices to prevent thread dislocations from penetrating into the active region and improve light extraction from the structure (FIG. 5).

Use of quaternary alloy cladding to provide lattice matching between the cladding and the active region (FIG. 7).

Use of laterally confined active regions to prevent recombination of non-light emitting carriers (FIG. 8).
The laterally confined active region has a composition (Ga _x Al
_1-x ) In _1-y N can be formed by using a quantum structure such as a quantum dot.

[Brief description of the drawings]

FIG. 1 is a diagram showing a simple conventional structure of an LED mainly composed of GaN.

FIG. 2 illustrates a prior art GaN-based single quantum well LED with a symmetric cladding.

FIG. 3 is a diagram showing one embodiment of the present invention.

FIG. 4 is a diagram showing one embodiment of the present invention.

FIG. 5 is a diagram showing one embodiment of the present invention.

FIG. 6 is a diagram showing an embodiment of the present invention.

FIG. 7 is a diagram showing one embodiment of the present invention.

FIG. 8 is a diagram showing one embodiment of the present invention.

FIG. 9 is a diagram showing an embodiment of the present invention.

[Explanation of symbols]

 Reference Signs List 1 sapphire substrate 2 buffer layer 3 n-GaN layer 4 active layer 5 contact p-GaN layer 10 p-AlGaN cladding layer 13 electron emission layer 16, 17 quaternary alloy cladding 19, 20 lateral confinement layer

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Stephan Sentien Lee Taiwan Taipei Chengkang Road Lane 325 Ally 18 No. 29

Claims (8)

[Claims] 1. A light emitting diode structure having an asymmetric cladding having a thin porous surface layer or a patterned porous structure that controls the nucleation process of a quaternary InAlGaN buffer layer and reduces distortion. A sapphire substrate, a quaternary InAlGaN buffer layer, an n-GaN layer, a tunnel barrier and an electron diffusion layer, which is located between the electron emission layer and the active layer and is made of a group III-V material, An active layer formed of a group III substance and having a single or multiple potential wells for electrons and holes, in which radiative recombination of electrons and holes occurs, and holes formed of p-type AlGaN. A light emitting diode structure comprising: an emission layer; a p-type contact layer made of p-type InGaN; and an ohmic contact portion of a metal with respect to the hole emission layer. 2. The active layer has a thickness of 5 ° to 50 °, the active layer has a width of 5 ° to 0.1 μm, the hole emitting layer has a width of 50 ° to 1 μm,
The structure of claim 1 wherein the mold contact layer has a width of 50 ° to 1 µm. 3. The structure according to claim 1, further comprising an electron-emitting layer comprising an n-type or undoped III-V material, said electron-emitting layer constituting a potential well for electrons and an electron storage layer. 4. The structure according to claim 1, wherein the structure having the porous surface layer or pattern formed thereon is formed by laser scanning, plasma etching, or chemical vapor deposition using an appropriate mask. 5. The structure according to claim 1, which has an asymmetric structure. 6. The structure of claim 1, wherein a strained superlattice is used to prevent thread dislocations from penetrating into the active region and enhance light extraction from the structure. 7. A quaternary alloy cladding for providing lattice matching between the cladding and the active region.
The described structure. 8. The method of claim 1, wherein a laterally confined active region is used to prevent recombination of non-light emitting carriers.
The described structure.