JP2000183200A - Package for housing optical semiconductor element - Google Patents

Package for housing optical semiconductor element

Info

Publication number
JP2000183200A
JP2000183200A JP10351900A JP35190098A JP2000183200A JP 2000183200 A JP2000183200 A JP 2000183200A JP 10351900 A JP10351900 A JP 10351900A JP 35190098 A JP35190098 A JP 35190098A JP 2000183200 A JP2000183200 A JP 2000183200A
Authority
JP
Japan
Prior art keywords
semiconductor element
optical semiconductor
base
optical
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10351900A
Other languages
Japanese (ja)
Inventor
Mitsuo Yanagisawa
美津夫 柳沢
Takashi Sawai
隆 澤井
Hisayoshi Wada
久義 和田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP10351900A priority Critical patent/JP2000183200A/en
Publication of JP2000183200A publication Critical patent/JP2000183200A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Semiconductor Lasers (AREA)
  • Optical Couplings Of Light Guides (AREA)

Abstract

PROBLEM TO BE SOLVED: To obtain a package for housing an optical semiconductor element which converts optical signal to electric signal and transmits it accurately to a specified external electric circuit, by realizing fast conversion speed of an optical signal to an electric signal in an optical semiconductor element. SOLUTION: The package for housing an optical semiconductor element consists of a substrate 1 with a recessed part 1a for storing an optical semiconductor element 3 in an upper surface, a through hole 1b which is formed in a side part of the substrate 1 and communicates the recessed part 1a to the outside, a plurality of wiring layers 4 which are formed from an inner surface of the recessed part 1a to an outside surface of the substrate 1 and whereto an electrode of the optical semiconductor element 3 is connected, a plurality of external lead terminals fixed to the wiring layer 4 formed in an outside surface of the substrate 1, and a lid body 3 which is fixed to an upper surface of the substrate 1 and closes the recessed part 1a. A groove part is formed between the wiring layers 4 on an outside surface of the substrate 1.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は光半導体素子を収容
するための光半導体素子収納用パッケージに関するもの
である。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical semiconductor element housing package for housing an optical semiconductor element.

【0002】[0002]

【従来の技術】従来、光半導体素子を収容するための光
半導体素子収納用パッケージは、一般に、酸化アルミニ
ウム質焼結体から成り、上面に光半導体素子を収容する
ための凹部を有する基体と、該基体の側部に形成され、
凹部を外部に連通させ、凹部内に収容した光半導体素子
に光信号を伝達する光ファイバーが挿通される貫通孔
と、前記凹部内面から基体の側面にかけて形成され、前
記光半導体素子の電極が接続されるタングステン、モリ
ブデン、マンガン等の高融点金属粉末から成る複数個の
配線層と、前記基体の側面に形成された配線層に取着さ
れている鉄ーニッケルーコバルト合金等の金属材料から
成る複数個の外部リード端子と、前記基体の上面に取着
され、前記凹部を塞ぐ蓋体とから構成されており、前記
基体の凹部内に光半導体素子をガラス、樹脂、ロウ材等
の接着剤を介して接着固定するとともに該光半導体素子
の各電極をボンディングワイヤを介して配線層に電気的
に接続し、しかる後、前記基体の上面に蓋体をガラス、
樹脂、ロウ材等から成る封止材を介して接合させ、基体
と蓋体とから成る容器内部に光半導体素子を気密に収容
するとともに基体の貫通孔に光ファイバーを挿通固定さ
せることによって製品としての光半導体装置となる。
2. Description of the Related Art Conventionally, an optical semiconductor element housing package for housing an optical semiconductor element is generally made of an aluminum oxide sintered body and has a concave portion on its upper surface for housing the optical semiconductor element, Formed on the side of the substrate,
The recess is communicated to the outside, and a through hole through which an optical fiber for transmitting an optical signal to the optical semiconductor element housed in the recess is inserted, and a hole is formed from the inner surface of the recess to the side surface of the base, and the electrode of the optical semiconductor element is connected. A plurality of wiring layers made of a high melting point metal powder such as tungsten, molybdenum, manganese, etc., and a plurality of metal layers made of a metal material such as an iron-nickel-cobalt alloy attached to the wiring layer formed on the side surface of the base. And an external lead terminal, and a lid attached to the upper surface of the base and closing the recess. The optical semiconductor element is provided with an adhesive such as glass, resin, or brazing material in the recess of the base. Each electrode of the optical semiconductor element is electrically connected to a wiring layer via a bonding wire, and then a lid is formed on the upper surface of the base by glass,
The optical semiconductor element is hermetically housed inside a container consisting of a base and a lid, and an optical fiber is inserted and fixed in a through-hole of the base. It becomes an optical semiconductor device.

【0003】かかる光半導体装置は光ファイバーから伝
達された光信号を光半導体素子に照射し、光半導体素子
に光信号を授受させるとともに光信号を電気信号に変換
させ、しかる後、この変換された電気信号を配線層及び
外部リード端子を介して外部電気回路に伝達することに
よって高速通信等に使用される。
Such an optical semiconductor device irradiates an optical semiconductor element with an optical signal transmitted from an optical fiber, causes the optical semiconductor element to transmit and receive the optical signal, and converts the optical signal into an electric signal. It is used for high-speed communication and the like by transmitting a signal to an external electric circuit via a wiring layer and an external lead terminal.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、この従
来の光半導体素子収納用パッケージにおいては、基体側
面に複数個の配線層が間に基体を形成する酸化アルミニ
ウム質焼結体を挟んで多数併設されていること、酸化ア
ルミニウム質焼結体の比誘電率が約10(室温1MH
z)と高いこと等から隣接する配線層間に大きな静電容
量が形成され、該大きな静電容量によって光半導体素子
における光信号の電気信号への変換が速度の遅いものと
なってしまう欠点を有していた。特に光通信においては
光ファイバーから光半導体素子に伝達される光信号は極
めて高速であり、光半導体素子における光信号の電気信
号への変換速度が遅いことは光信号を電気信号に変えて
外部電気回路に伝達することができず、光通信として致
命的な欠点となってしまう。
However, in this conventional package for housing an optical semiconductor element, a large number of wiring layers are provided side by side on a side surface of the substrate with an aluminum oxide sintered body forming a substrate therebetween. That the relative permittivity of the aluminum oxide sintered body is about 10 (1 MH at room temperature).
z), there is a disadvantage that a large capacitance is formed between adjacent wiring layers, and the conversion of an optical signal into an electric signal in the optical semiconductor element becomes slow due to the large capacitance. Was. Particularly in optical communication, the optical signal transmitted from the optical fiber to the optical semiconductor device is extremely high speed. Cannot be transmitted to the optical communication, which is a fatal drawback for optical communication.

【0005】本発明は上記欠点に鑑み案出されたもの
で、その目的は光半導体素子における光信号の電気信号
への変換速度を高速とし、光信号を電気信号に変えて所
定の外部電気回路に正確に伝達することができる光半導
体素子収納用パッケージを提供することにある。
The present invention has been made in view of the above-mentioned drawbacks, and has as its object to increase the speed of converting an optical signal into an electrical signal in an optical semiconductor device, and to convert an optical signal into an electrical signal to provide a predetermined external electrical circuit. It is an object of the present invention to provide an optical semiconductor element housing package that can accurately transmit an optical semiconductor device.

【0006】[0006]

【課題を解決するための手段】本発明は、上面に光半導
体素子を収容するための凹部を有する基体と、該基体の
側部に形成され、凹部を外部に連通させる貫通孔と、前
記凹部内面から基体の外側面にかけて形成され、前記光
半導体素子の電極が接続される複数個の配線層と、前記
基体の外側面に形成された配線層に取着されている複数
個の外部リード端子と、前記基体の上面に取着され、前
記凹部を塞ぐ蓋体とから成る光半導体素子収納用パッケ
ージであって、前記基体の外側面で配線層間に溝部が形
成されていることを特徴とするものである。
According to the present invention, there is provided a base having a concave portion for accommodating an optical semiconductor element on an upper surface, a through-hole formed on a side portion of the base and communicating the concave portion to the outside, and the concave portion. A plurality of wiring layers formed from the inner surface to the outer surface of the base and connected to the electrodes of the optical semiconductor element, and a plurality of external lead terminals attached to the wiring layers formed on the outer surface of the base And a cover attached to the upper surface of the base and closing the recess, wherein a groove is formed between wiring layers on the outer surface of the base. Things.

【0007】本発明の光半導体素子収納用パッケージに
よれば、複数個の配線層が併設されている基体の外側面
で配線層間に溝部を形成したことから、隣接する配線層
間の静電容量は小さな値となり、その結果、光半導体素
子における光信号の電気信号への変換速度も速いものと
なって光ファイバーを介して伝達された光信号を光半導
体素子で確実に電気信号に変換することが可能となると
ともに該変換された電気信号を所定の外部電気回路に正
確に伝達することができる。
According to the package for housing an optical semiconductor element of the present invention, since the groove is formed between the wiring layers on the outer surface of the substrate provided with the plurality of wiring layers, the capacitance between the adjacent wiring layers is reduced. As a result, the speed of converting an optical signal to an electrical signal in the optical semiconductor device is also high, and the optical signal transmitted via the optical fiber can be reliably converted to an electrical signal by the optical semiconductor device. And the converted electric signal can be accurately transmitted to a predetermined external electric circuit.

【0008】[0008]

【発明の実施の形態】次に、本発明を添付図面に基づき
説明に説明する。図1乃至図3は本発明の光半導体素子
収納用パッケージの一実施例を示し、1は基体、2は蓋
体である。この基体1と蓋体2とで内部に光半導体素子
3を収容するための容器が構成される。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the accompanying drawings. 1 to 3 show an embodiment of the package for housing an optical semiconductor element according to the present invention, wherein 1 is a base, and 2 is a lid. The base 1 and the lid 2 constitute a container for housing the optical semiconductor element 3 therein.

【0009】前記基体1はその上面に光半導体素子3を
収容するための空所を形成する凹部1aが設けてあり、
該凹部1a底面には光半導体素子3が搭載固定される。
The base 1 is provided on its upper surface with a recess 1a forming a space for accommodating the optical semiconductor element 3,
The optical semiconductor element 3 is mounted and fixed on the bottom surface of the concave portion 1a.

【0010】前記基体1は酸化アルミニウム質焼結体か
ら成り、例えば、酸化アルミニウム、酸化珪素、酸化マ
グネシウム、酸化カルシウム等の原料粉末に適当な有機
バインダー、溶剤等を添加混合して泥漿物を作るととも
に、該泥漿物をドクターブレード法やカレンダーロール
法を採用することによってセラミックグリーンシート
(セラミック生シート)となし、しかる後、前記セラミ
ックグリーンシートに適当な打ち抜き加工を施すととも
にこれを複数枚積層し、約1600℃の温度で焼成する
ことによって製作される。
The base 1 is made of an aluminum oxide-based sintered body. For example, a raw material powder such as aluminum oxide, silicon oxide, magnesium oxide, and calcium oxide is mixed with a suitable organic binder, a solvent, and the like to form a slurry. At the same time, the slurry is formed into a ceramic green sheet (ceramic green sheet) by employing a doctor blade method or a calender roll method. Thereafter, the ceramic green sheet is subjected to an appropriate punching process and a plurality of the green sheets are laminated. , At about 1600 ° C.

【0011】また前記基体1は凹部1aの内面から基体
1の外側面にかけて複数個の配線層4が被着形成されて
おり、該配線層4の凹部1a内に露出する領域には光半
導体素子3の各電極がボンディングワイヤ5を介して電
気的に接続され、また基体1の外側面に形成されている
領域には外部電気回路と接続される外部リード端子6が
銀ロウ等のロウ材を介してロウ付け取着されている。
A plurality of wiring layers 4 are formed on the substrate 1 from the inner surface of the concave portion 1a to the outer surface of the substrate 1, and a region of the wiring layer 4 exposed in the concave portion 1a has an optical semiconductor element. 3 are electrically connected to each other through bonding wires 5, and external lead terminals 6 connected to an external electric circuit are made of a brazing material such as silver brazing in a region formed on the outer surface of the base 1. It is attached via brazing.

【0012】前記配線層4は光半導体素子3の各電極を
外部電気回路に接続する際の導電路として作用し、タン
グステン、モリブデン、マンガン等の高融点金属粉末に
より形成されている。
The wiring layer 4 functions as a conductive path for connecting each electrode of the optical semiconductor element 3 to an external electric circuit, and is formed of a high melting point metal powder such as tungsten, molybdenum, and manganese.

【0013】前記配線層4はタングステン、モリブデ
ン、マンガン等の高融点金属粉末に適当な有機バインダ
ー、溶剤等を添加混合して得た金属ペーストを基体1と
なるセラミックグリーンシートに予め従来周知のスクリ
ーン印刷法により所定パターンに印刷塗布しておくこと
によって基体1の凹部1a内から基体1の外側面にかけ
て被着形成される。
The wiring layer 4 is formed by adding a metal paste obtained by adding a suitable organic binder, a solvent and the like to a high melting point metal powder such as tungsten, molybdenum, manganese or the like on a ceramic green sheet serving as the substrate 1 in advance by using a conventionally known screen. By printing and applying a predetermined pattern by a printing method, the adhesive is formed from the inside of the concave portion 1a of the base 1 to the outer surface of the base 1.

【0014】また前記配線層4はその露出する表面にニ
ッケル、金等の耐蝕性に優れ、かつロウ材との濡れ性に
優れる金属を1μm乃至20μmの厚みにメッキ法によ
り被着させておくと、配線層4の酸化腐蝕を有効に防止
することができるとともに配線層4への外部リード端子
6のロウ付けを強固となすことができる。従って、前記
配線層4は、その露出する表面にニッケル、金等の耐蝕
性に優れ、かつロウ材との濡れ性に優れる金属を1μm
乃至20μmの厚みに被着させておくことが好ましい。
The wiring layer 4 is preferably provided with a metal having excellent corrosion resistance such as nickel and gold and excellent wettability with a brazing material to a thickness of 1 μm to 20 μm by a plating method on the exposed surface. In addition, the oxidation corrosion of the wiring layer 4 can be effectively prevented, and the brazing of the external lead terminals 6 to the wiring layer 4 can be firmly performed. Therefore, the wiring layer 4 is made of a metal having excellent corrosion resistance such as nickel and gold and having excellent wettability with a brazing material of 1 μm on the exposed surface.
Preferably, it is applied to a thickness of from 20 to 20 μm.

【0015】更に前記配線層4には外部リード端子6が
銀ロウ等のロウ材を介してロウ付け取着されており、該
外部リード端子6は容器内部に収容する光半導体素子3
の各電極を外部電気回路に電気的に接続する作用をな
し、外部リード端子6を外部電気回路に接続することに
よって容器内部に収容される光半導体素子3は配線層4
及び外部リード端子6を介して外部電気回路に接続され
ることとなる。
Further, an external lead terminal 6 is attached to the wiring layer 4 by brazing via a brazing material such as silver brazing, and the external lead terminal 6 is connected to the optical semiconductor element 3 contained in the container.
The optical semiconductor element 3 accommodated in the container by connecting the external lead terminals 6 to the external electric circuit is electrically connected to the external electric circuit.
And the external lead terminal 6 is connected to an external electric circuit.

【0016】前記外部リード端子6は鉄ーニッケルーコ
バルト合金や鉄ーニッケル合金等の金属材料から成り、
例えば、鉄ーニッケルーコバルト合金等の金属材料から
成るインゴット(塊)に圧延加工法や打ち抜き加工法
等、従来周知の金属加工法を施すことによって所定の形
状に形成される。
The external lead terminal 6 is made of a metal material such as an iron-nickel-cobalt alloy or an iron-nickel alloy.
For example, an ingot made of a metal material such as an iron-nickel-cobalt alloy is formed into a predetermined shape by applying a conventionally known metal working method such as a rolling method or a punching method.

【0017】なお、前記外部リード端子6はその露出す
る表面にニッケル、金等の耐蝕性に優れ、かつロウ材と
の濡れ性に優れる金属を1μm乃至20μmの厚みにメ
ッキ法により被着させておくと、外部リード端子6の酸
化腐蝕を有効に防止することができるとともに外部リー
ド端子6を外部電気回路に接続する際、その接続を確
実、強固となすことができる。従って、前記外部リード
端子6は、その露出する表面にニッケル、金等の耐蝕性
に優れ、かつロウ材との濡れ性に優れる金属を1μm乃
至20μmの厚みに被着させておくことが好ましい。
The external lead terminal 6 is formed by coating a metal having excellent corrosion resistance such as nickel and gold and having excellent wettability with a brazing material to a thickness of 1 μm to 20 μm on an exposed surface by plating. By doing so, the oxidative corrosion of the external lead terminal 6 can be effectively prevented, and when the external lead terminal 6 is connected to an external electric circuit, the connection can be reliably and firmly made. Therefore, it is preferable that the external lead terminal 6 is coated with a metal having excellent corrosion resistance such as nickel and gold and excellent wettability with a brazing material to a thickness of 1 μm to 20 μm on the exposed surface.

【0018】前記外部リード端子6が取着された基体1
はまたその側部に貫通孔1bが形成されている。
The base 1 to which the external lead terminals 6 are attached
Also, a through-hole 1b is formed on the side portion thereof.

【0019】前記貫通孔1bは基体1に設けた凹部1a
を外部に連通させており、該貫通孔1b内には光ファイ
バー7が挿通され、光ファイバー7を容器の外部から内
部にかけて挿通させるための挿通孔として作用する。
The through hole 1b is formed in a concave portion 1a provided in the base 1.
The optical fiber 7 is inserted into the through hole 1b, and functions as an insertion hole for inserting the optical fiber 7 from the outside to the inside of the container.

【0020】前記貫通孔1bは、例えば、基体1となる
セラミックグリーンシートに予め打ち抜き加工法により
孔を形成しておくことによって、或いは基体1の側部に
孔あけ加工を施すことによって基体1の側部に所定形状
に形成される。
The through hole 1b is formed in the ceramic green sheet serving as the base body 1 by forming a hole in advance by a punching method, or by forming a hole in a side portion of the base body 1. It is formed in a predetermined shape on the side.

【0021】また前記基体1の外側面で貫通孔1bの周
囲には、例えば、枠状の下地部材8がロウ付けされてお
り、該下地部材8には光ファイバー7に取着されている
金属フランジ9がYAG等のレーザー光線を使用して溶
接される。
For example, a frame-like base member 8 is brazed around the through hole 1b on the outer surface of the base 1, and a metal flange attached to the optical fiber 7 is attached to the base member 8. 9 is welded using a laser beam such as YAG.

【0022】前記下地部材8は光ファイバー7を基体1
に取着する際の下地金属材として作用し、例えば、鉄ー
ニッケルーコバルト合金や鉄ーニッケル合金等の金属材
料から成り、鉄ーニッケルーコバルト合金等のインゴッ
ト(塊)に圧延加工法や打ち抜き加工法等、従来周知の
金属加工法を施すことによって所定の形状に形成され
る。
The base member 8 includes the optical fiber 7 and the base 1.
Acts as a base metal material when attaching to steel. For example, it is made of a metal material such as an iron-nickel-cobalt alloy or an iron-nickel alloy. It is formed into a predetermined shape by applying a conventionally known metal working method such as a working method.

【0023】なお、前記下地部材8は基体1の外側面で
貫通孔1b周辺に予めタングステンやモリブデン、マン
ガン等の高融点金属粉末から成る金属層を被着させてお
き、該金属層に銀ロウ等のロウ材を介しロウ付け取着す
ることによって基体1の外側面で貫通孔1b周辺に取着
される。
The base member 8 has a metal layer made of a high melting point metal powder such as tungsten, molybdenum, manganese or the like previously applied to the outer surface of the base 1 around the through hole 1b. Is attached to the outer surface of the base 1 around the through hole 1b by brazing.

【0024】また前記下地部材8には光ファイバー7に
取着された金属フランジ9がYAG等のレーザー光線を
使用して溶接され、これによって光半導体素子3に光信
号を伝達するための光ファイバー7が基体1に固定され
ることとなる。
A metal flange 9 attached to the optical fiber 7 is welded to the base member 8 by using a laser beam such as YAG, so that the optical fiber 7 for transmitting an optical signal to the optical semiconductor element 3 is provided on the base member. It will be fixed to 1.

【0025】更に前記基体1はその外側面で配線層4間
に溝部10が形成されている。前記溝部10は隣接する
配線層4間に比誘電率が約10(室温1MHz)と高い
基体1を形成する酸化アルミニウム質焼結体が介在し、
隣接する配線層4間の静電容量が高くなるのを防止する
作用をなし、基体1の外側面で隣接する配線層4間に溝
部10を形成し、配線層4間に位置する酸化アルミニウ
ム質焼結体を除去しておくことによって配線層4間の静
電容量は小さくなり、その結果、光半導体素子3におけ
る光信号の電気信号への変換速度は速いものとなり、光
ファイバー7を介して伝達された光信号を光半導体素子
3で確実に電気信号に変換することが可能となるととも
に該変換された電気信号を所定の外部電気回路に正確に
伝達することができる。
Further, a groove 10 is formed between the wiring layers 4 on the outer surface of the base 1. In the groove 10, an aluminum oxide sintered body forming the base 1 having a relative dielectric constant of as high as about 10 (room temperature 1 MHz) is interposed between the adjacent wiring layers 4,
A groove 10 is formed between the adjacent wiring layers 4 on the outer surface of the base 1 so as to prevent an increase in the capacitance between the adjacent wiring layers 4. By removing the sintered body, the capacitance between the wiring layers 4 is reduced, and as a result, the speed of converting an optical signal into an electrical signal in the optical semiconductor element 3 is increased, and the transmission speed is increased via the optical fiber 7. The converted optical signal can be reliably converted into an electric signal by the optical semiconductor element 3, and the converted electric signal can be accurately transmitted to a predetermined external electric circuit.

【0026】前記溝部10は基体1となるセラミックグ
リーンシートに予め打ち抜き加工法により所定の孔を形
成しておくことによって、或いは基体1の側部に研削加
工を施すことによって基体1の外側面で隣接配線層4間
に形成される。
The groove 10 is formed on the outer surface of the base 1 by forming a predetermined hole in the ceramic green sheet serving as the base 1 in advance by a punching method or by grinding the side of the base 1. It is formed between adjacent wiring layers 4.

【0027】なお、前記溝部10はその幅を隣接する配
線層4間の全幅としておくことが好ましく、また深さは
0.1mm以上としておくと隣接する配線層4間の静電
容量を極めて小さなのとなすことができる。従って、前
記溝部10はその幅を隣接する配線層4間の全幅とし、
かつ深さを0.1mm以上としておくことが好ましい。
It is preferable that the width of the groove 10 is set to be equal to the entire width between the adjacent wiring layers 4, and that if the depth is set to 0.1 mm or more, the capacitance between the adjacent wiring layers 4 is extremely small. Can be made. Therefore, the width of the groove 10 is set to the entire width between the adjacent wiring layers 4,
Preferably, the depth is set to 0.1 mm or more.

【0028】また一方、前記基体1の上面には、例え
ば、鉄ーニッケルーコバルト合金や鉄ーニツケル合金等
の金属材料から成る蓋体2が接合され、これによって基
体1と蓋体2とからなる容器の内部に光半導体素子3が
気密に封止されることとなる。
On the other hand, a lid 2 made of a metal material such as an iron-nickel-cobalt alloy or an iron-nickel alloy is joined to the upper surface of the base 1, thereby forming the base 1 and the lid 2. The optical semiconductor element 3 is hermetically sealed inside the container.

【0029】前記蓋体2は、例えば、鉄ーニッケルーコ
バルト合金等のインゴット(塊)に圧延加工法や打ち抜
き加工法等、従来周知の金属加工法を施すことによって
所定の形状に形成される。
The lid 2 is formed into a predetermined shape by subjecting an ingot (lumps) of, for example, an iron-nickel-cobalt alloy to a conventionally known metal working method such as a rolling method or a punching method. .

【0030】かくして本発明の光半導体素子収納用パッ
ケージによれば、基体1の凹部1a底面に光半導件素子
3を搭載固定させるとともに光半導体素子3の各電極を
ボンディングワイヤ5を介して外部リード端子6のロウ
付けされている配線層4に電気的に接続し、次に基体1
の上面に蓋体2を接合させ、基体1と蓋体2とから成る
容器内部に光半導体素子3を収容し、最後に基体1に形
成した貫通孔1bに光ファイバー7を取着させることに
よって最終製品としての光半導体装置となる。
Thus, according to the package for housing an optical semiconductor element of the present invention, the optical semiconductor element 3 is mounted and fixed on the bottom surface of the concave portion 1 a of the base 1, and each electrode of the optical semiconductor element 3 is externally connected via the bonding wire 5. The lead terminal 6 is electrically connected to the soldered wiring layer 4 and then the base 1
The lid 2 is bonded to the upper surface of the substrate 1, the optical semiconductor element 3 is accommodated in a container formed of the base 1 and the lid 2, and finally the optical fiber 7 is attached to the through hole 1 b formed in the base 1. It becomes an optical semiconductor device as a product.

【0031】かかる光半導体装置は外部から光ファイバ
ー7を介して光半導体素子3に光信号を伝達し、光半導
体素子3において光信号を電気信号に変換するとともに
該変換した電気信号を配線層4及び外部リード端子6を
介して外部電気回路に伝達することによって光通信等に
使用される。
The optical semiconductor device transmits an optical signal from the outside to the optical semiconductor element 3 via the optical fiber 7, converts the optical signal into an electric signal in the optical semiconductor element 3, and converts the converted electric signal into the wiring layer 4 and It is used for optical communication or the like by transmitting it to an external electric circuit via the external lead terminal 6.

【0032】なお本発明は上述の実施例に限定されるも
のではなく、本発明の要旨を逸脱しない範囲であれば種
々の変更は可能である。
The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention.

【0033】[0033]

【発明の効果】本発明の光半導体素子収納用パッケージ
によれば、複数個の配線層が併設されている基体の外側
面で配線層間に溝部を形成したことから、隣接する配線
層間の静電容量は小さな値となり、その結果、光半導体
素子における光信号の電気信号への変換速度も速いもの
となって光ファイバーを介して伝達された光信号を光半
導体素子で確実に電気信号に変換することが可能となる
とともに該変換された電気信号を所定の外部電気回路に
正確に伝達することができる。
According to the package for housing an optical semiconductor element of the present invention, since a groove is formed between the wiring layers on the outer surface of the substrate on which a plurality of wiring layers are juxtaposed, the static electricity between the adjacent wiring layers is reduced. The capacity becomes a small value, and as a result, the conversion speed of the optical signal to the electric signal in the optical semiconductor device is also high, and the optical signal transmitted via the optical fiber is reliably converted to the electric signal by the optical semiconductor device. And the converted electric signal can be accurately transmitted to a predetermined external electric circuit.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の光半導体素子収納用パッケージの一実
施例を示す断面図である。
FIG. 1 is a sectional view showing an embodiment of a package for housing an optical semiconductor element of the present invention.

【図2】図1に示す半導体素子収納用パッケージの側面
図である。
FIG. 2 is a side view of the semiconductor element housing package shown in FIG. 1;

【図3】図1に示す半導体素子収納用パッケージの蓋体
を除いた状態の平面図である。
FIG. 3 is a plan view of the semiconductor device housing package shown in FIG. 1 with a lid removed.

【符号の説明】[Explanation of symbols]

1・・・・・・・・基体 1a・・・・・・・凹部 1b・・・・・・・貫通孔 2・・・・・・・・蓋体 3・・・・・・・・光半導体素子 4・・・・・・・・配線層 6・・・・・・・・外部リード端子 7・・・・・・・・光ファイバー 10・・・・・・・・溝部 1 base 1a recess 1b through-hole 2 lid 3 light Semiconductor element 4 Wiring layer 6 External lead terminal 7 Optical fiber 10 Groove

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】上面に光半導体素子を収容するための凹部
を有する基体と、該基体の側部に形成され、凹部を外部
に連通させる貫通孔と、前記凹部内面から基体の外側面
にかけて形成され、前記光半導体素子の電極が接続され
る複数個の配線層と、前記基体の外側面に形成された配
線層に取着されている複数個の外部リード端子と、前記
基体の上面に取着され、前記凹部を塞ぐ蓋体とから成る
光半導体素子収納用パッケージであって、前記基体の外
側面で配線層間に溝部が形成されていることを特徴とす
る光半導体素子収納用パッケージ。
1. A base having a concave portion for accommodating an optical semiconductor element on an upper surface, a through hole formed in a side portion of the base and communicating the concave portion to the outside, and formed from an inner surface of the concave portion to an outer surface of the substrate. A plurality of wiring layers to which electrodes of the optical semiconductor element are connected; a plurality of external lead terminals attached to a wiring layer formed on an outer surface of the base; An optical semiconductor element housing package comprising: a lid attached to the housing to cover the recess, wherein a groove is formed between wiring layers on an outer surface of the base.
JP10351900A 1998-12-10 1998-12-10 Package for housing optical semiconductor element Pending JP2000183200A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10351900A JP2000183200A (en) 1998-12-10 1998-12-10 Package for housing optical semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10351900A JP2000183200A (en) 1998-12-10 1998-12-10 Package for housing optical semiconductor element

Publications (1)

Publication Number Publication Date
JP2000183200A true JP2000183200A (en) 2000-06-30

Family

ID=18420388

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10351900A Pending JP2000183200A (en) 1998-12-10 1998-12-10 Package for housing optical semiconductor element

Country Status (1)

Country Link
JP (1) JP2000183200A (en)

Similar Documents

Publication Publication Date Title
JPH11126847A (en) Package for electronic component
JPH05335433A (en) Package for accommodating semiconductor element
JP2746809B2 (en) Package for storing optical semiconductor elements
JP2750253B2 (en) Semiconductor device
JP2000183200A (en) Package for housing optical semiconductor element
JP2000236103A (en) Package for housing optical semiconductor element
JP3457906B2 (en) Optical semiconductor element storage package
JP3488392B2 (en) Optical semiconductor element storage package
JP3176267B2 (en) Package for storing semiconductor elements
JP3709082B2 (en) Optical semiconductor element storage package
JP2713841B2 (en) Package for storing semiconductor elements
JP3181011B2 (en) Package for storing semiconductor elements
JPH11163184A (en) Optical semiconductor device housing package
JP2000183254A (en) Package for housing optical semiconductor element
JP3138186B2 (en) Semiconductor device
JP2003037196A (en) Package for housing optical semiconductor element
JP2000260896A (en) Package for housing semiconductor element
JP3670523B2 (en) Optical semiconductor element storage package
JP2783735B2 (en) Package for storing semiconductor elements
JPH0922957A (en) Package for housing semiconductor element
JP2543153Y2 (en) Package for storing semiconductor elements
JP2728584B2 (en) Method for manufacturing semiconductor device
JP2000183560A (en) Electronic component housing container
JP2000277644A (en) Manufacture of optical semiconductor element housing package
JP2003037321A (en) Package for accommodating optical semiconductor element

Legal Events

Date Code Title Description
A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20040127

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20040329

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20040420