JP2000183082A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To aim at reducing cost by improving mass productivity performance and improving the reliability of a semiconductor device which mounts chip structures on its surface and back planes. SOLUTION: This semiconductor device is provided with fourteen wafer process packages 5, equipped with each semiconductor chip 1 and bump electrodes electrically connecting each semiconductor chip 1 and each pad responsive to each semiconductor chip 1, and a module substrate 3, and a sealing part 4 which seals the resin of a flip-chip connection part 5a responds to the fourteen wafer processing packages respectively. In this case, the module substrate 3 supports seven wafer processing packages on a surface plane 3c and other seven wafer processing packages on a back plane 3d, and it has also fourteen through-holes 3e whose opening ends 3f are exposed on the surface plane 3c or the back plane 3d, and other openings ends 3g are arranged on flip-chip connecting parts 5a. When resin is sealed, the sealing part 4 implements underfill sealing by supplying the resin for sealing via the through-holes 3e from the opening end 3f exposed on the side opposite to each flip-chip connection part 5a of each wafer process package 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing technique, and more particularly to a technique which is effective when applied to improve mass productivity and reliability of a memory module.

[0002]

2. Description of the Related Art The technology described below studies the present invention,
Upon completion, they were examined by the inventor, and the outline is as follows.

As an example of a module product on which a plurality of semiconductor chips (chip structures) are mounted, a SIMM (Single)
In-line Memory Module) or DIMM (Dual In-line M
There is a memory module called emory Module).

[0004] Here, the memory module is a semiconductor chip that is a memory chip. When a memory to be used is added to a personal computer (hereinafter abbreviated as a personal computer), a workstation, or the like, the memory module is mounted on a motherboard of the personal computer or the workstation. It is installed to increase the memory capacity.

Some memory modules have a structure in which a memory chip is directly mounted on a module substrate by flip-chip connection using bump electrodes. In this case, for example, about 8 to 20 memory chips (chips) are used. The structure is mounted on the module substrate, and at that time, the flip chip connection portions of the respective memory chips are sealed with a resin having a relatively high fluidity.

[0006] Such a memory chip (semiconductor chip)
The resin sealing of the flip chip connection between the module and the module substrate (chip supporting substrate) is called underfill sealing.

[0007] Some memory modules on which memory chips are mounted by flip-chip connection have memory chips mounted on both sides of a module substrate so as to greatly increase the memory capacity.

In this chip double-sided mounting type memory module, when performing resin sealing, a highly fluid sealing resin is dropped from above one side surface of the memory chip, and one side surface is sealed on the chip back surface. The sealing resin is spread around the entire flip chip connection portion on the back surface of the chip by causing the stopping resin to flow around.

[0009] For memory modules such as SIMMs, see, for example, Industrial Research Council, Ltd., September 1993.
On September 33, "Electronic Materials September Issue", pp. 33-39, and a method for underfill sealing of a flip chip connection portion is described in, for example,
No. 0-112481.

[0010]

However, in the underfill sealing of the memory module according to the above-described technique, the sealing resin is spread from one side surface of the memory chip to the back surface of the chip. It takes a very long time for the sealing resin to spread over the entire chip connecting portion.

Therefore, there is a problem that the workability of underfill sealing is poor.

Furthermore, since it takes time to seal the underfill, there is a problem that mass productivity is reduced.

In addition, since the sealing resin is wrapped around from one side of the memory chip to the back of the chip, it is difficult for the sealing resin to be uniformly supplied at the flip chip connecting portion, and the connection reliability of the flip chip connecting portion is reduced. May cause problems with sex.

Japanese Patent Application Laid-Open No. H10-112481 discloses a method for supplying the sealing resin uniformly and in a short time to the entire flip chip connection portion.

This is because, when a through hole is formed in the module substrate and a sealing resin is supplied to the flip chip connection portion, the flip chip connection portion is provided near the center of the semiconductor chip through the through hole from the opposite side. The sealing resin is supplied to the substrate, and the sealing resin is diffused from there to the entire flip chip connection portion.

However, in this resin supply method, in a chip double-sided mounting type memory module in which a memory chip is mounted so as to face both sides of a module substrate, the memory chip is similarly mounted on the opposite side of the memory chip. Therefore, there is a problem that the resin supply method described in JP-A-10-112481 cannot be performed.

It is an object of the present invention to provide a semiconductor device in which a chip structure is mounted on both front and back surfaces to improve mass productivity and reduce cost and to improve reliability and a method of manufacturing the same. is there.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0019]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, the semiconductor device of the present invention comprises a plurality of chip structures each having a semiconductor chip,
And a plurality of the chip structures are supported on the second surface on the opposite side by flip-chip connection, and one open end is exposed on either the first or second surface and the other open end is the chip A module substrate having a plurality of through-holes arranged in a flip-chip connection portion of a structure, and a sealing portion for resin-sealing each of the flip-chip connection portions of the plurality of chip structures, wherein the resin At the time of sealing, the sealing resin is supplied from the opening end on the opposite side to the flip chip connection portion of each of the chip structures via the through hole.

Thus, since the sealing resin can be directly supplied to the flip-chip connecting portion through the through hole, the time required to spread the sealing resin over the entire flip-chip connecting portion can be reduced.

As a result, the workability of underfill sealing in the semiconductor device (module product) of the chip double-sided mounting type can be improved, thereby improving the mass productivity of the semiconductor device of the chip double-sided mounting type.

Further, the method of manufacturing a semiconductor device according to the present invention
A step of preparing a plurality of chip structures each having a semiconductor chip, and a first and a second opposite side provided with a plurality of through holes and capable of supporting the plurality of chip structures by flip-chip connection; Preparing a module substrate having a surface; and opening the first end of the module substrate such that one opening end of the through hole is exposed and the other opening end is disposed at a flip chip connection portion of the chip structure.
Mounting the plurality of chip structures on the second surface by flip-chip connection;
Supplying a sealing resin to the flip chip connection portions of the plurality of chip structures on one of the surfaces from the opening end on the opposite side through the through-hole, and forming the chip on the one surface. A step of resin-sealing the flip-chip connecting portion of the structure, and a step of resin-sealing the flip-chip connecting portion of the chip structure on the one surface, and then the other one of the first and second surfaces A sealing resin is supplied to the flip chip connecting portions of the plurality of chip structures from the opening ends on the opposite side through the through holes, and the flip chip of the chip structure on the other surface is provided. Sealing the connection portion with a resin.

[0024]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a diagram showing a structure of a memory module which is an example of a semiconductor device according to an embodiment of the present invention.
(A) is a plan view, (b) is a cross-sectional view showing the AA cross section of (a), (c) is a partially enlarged cross-sectional view of a B portion shown in the cross-sectional view of (b), and FIG. 3A and 3B are diagrams illustrating an example of the structure of a wafer process package (chip structure) used in the memory module illustrated in FIG. 3A, wherein FIG. 3A is a partially enlarged sectional view, FIG. 3B is a partially enlarged plan view, and FIG. FIG. 4 is an enlarged partial plan view showing an example of a structure of a semiconductor wafer used in a process package. FIG. 4 is a plan view showing an example of a structure of a module substrate used in the memory module shown in FIG. 1. FIG. FIG. 6 is a step diagram showing an example of a procedure for mounting a wafer process package (chip structure) on a module substrate in a manufacturing method. FIG. 6 shows an example of a resin supply state during underfill sealing in a semiconductor device manufacturing method of the present invention. It is to enlarged partial cross-sectional view.

The semiconductor device of the present embodiment shown in FIG.
This is a module product having a plurality of semiconductor chips 1 each having a semiconductor integrated circuit formed thereon. As an example of the semiconductor device, a case where the semiconductor chip 1 is a memory module 8 which is a memory chip will be described.

The memory module 8 has a plurality of chip structures (the memory chip itself or a structure having the memory chip) mounted on a personal computer or a workstation for the purpose of increasing the memory to be used. To increase the memory capacity.

The memory module 8 of the present embodiment has a plurality of chip structures mounted on both front and back surfaces of the module substrate 3 by flip-chip connection.

Further, in this embodiment, the chip structure used for the memory module 8 includes a wiring portion 1b electrically connected to the pad 1a (surface electrode) of the semiconductor chip 1.
(See FIGS. 2 (a) and 2 (b)) and bump electrodes 1c (connection terminals) electrically connected thereto were formed in each chip area 2a of the semiconductor wafer 2 before dicing as shown in FIG. After that, it is obtained by cutting and separating the individual chip structures.

In this embodiment, the chip structure provided with the semiconductor chip 1 (memory chip) is called a wafer process package (hereinafter abbreviated as WPP) 5.
Hereinafter, the case where the chip structure is WPP5 will be described.

However, the chip structure is not limited to the wafer process package, but may be a bare chip mounting semiconductor chip product in which bump electrodes 1c are formed on the semiconductor chip 1 after dicing.

Here, the configuration of the memory module 8 will be described. Each of the memory modules 8 includes a semiconductor chip 1 and a bump electrode 1c (connection terminal) electrically connected to the semiconductor chip 1 and a pad 1a (surface electrode) thereof. , Which is a plurality (14 in the present embodiment) of chip structures provided with
W5 is supported on the PP5, the front surface 3c (first surface) and the back surface 3d (second surface) on the opposite side by seven, and one open end 3f is exposed on the front surface 3c or the back surface 3d. Module substrate 3 having 14 through-holes 3e whose other open end 3g is arranged at flip-chip connection portion 5a of WPP 5, and a sealing portion for resin-sealing each of 14 flip-chip connection portions 5a of WPP 5 4 and the sealing resin 6 (see FIG. 6) from the exposed open end 3f on the opposite side to the flip chip connecting portion 5a of each WPP 5 through the through hole 3e during resin sealing. The supply is to take place.

Further, in the memory module 8 according to the present embodiment, the part of the WPP 5 mounted on the front surface 3c of the module substrate 3 and the part of the WPP 5 mounted on the back surface 3d thereof are connected to the front surface 3c of the module substrate 3. And the back 3d
At the same time.

That is, as shown in FIG. 1B, the WPPs 5 on the front surface 3c and the back surface 3d of the module substrate 3 are each mounted at a pitch P (for example, about 10 to 20 mm).
And 1/2 of the pitch P between the front surface 3c and the back surface 3d.
It is implemented by shifting by about ΔP.
The side portions 5b on both sides in the direction perpendicular to the longitudinal direction of each WPP 5 are arranged so as to overlap on the front surface 3c and the back surface 3d of the module substrate 3.

Further, in the memory module 8 of the present embodiment, the through holes 3e are formed so as to be arranged substantially corresponding to the center of the WPP 5. Therefore, the through hole 3
e is also provided on the module substrate 3 at the pitch of ΔP.

As a result, as shown in FIGS. 1A and 1B, when the module substrate 3 is viewed from the front surface 3c side, the WPP 5 and the exposed open end 3f of the through hole 3e alternate. It is in a state of being arranged at the pitch of ΔP (back surface 3
The same applies when viewed from the d side).

The through hole 3e has one open end 3
If f is exposed, it may not necessarily be formed so as to correspond to substantially the center of WPP5.
It may be arranged at a position deviated from the center of P5.

The connection terminals in the WPP 5 are, for example, bump electrodes 1c such as solder bumps and gold bumps, which are formed by vapor deposition in a semiconductor wafer state.

Further, the wiring portion 1b shown in FIG.
For example, it is a copper wiring or the like, and the pad 1a is a surface electrode of the semiconductor chip 1 made of aluminum or the like.

Further, the module substrate 3 has the structure shown in FIG.
As shown in FIG. 1, a plurality of electrodes 3b according to the arrangement of the 14 WPPs 5 to be mounted, and external terminals 3a provided electrically connected to the bump electrodes 1c of the WPPs 5 via the electrodes 3b (see FIG. 1). ) Is formed. This external terminal 3
For example, when the module substrate 3 is attached to a personal computer or the like, the module a is inserted into a port of a main body of the personal computer and electrically connected to the personal computer.

The module substrate 3 is provided with WPPs 5 arranged in a row at a predetermined interval (pitch P) on both front and rear surfaces thereof, and 14 through-holes correspond to each WPP 5. 3e is formed (FIG. 4).
reference).

Here, the through hole 3 e is
The base substrate may have only holes formed therein, or holes covered with wiring layers (formed for wiring) may be used.

The size of the module substrate 3 is, for example, about 130 mm × 25 mm. However, the size of the module substrate 3 is not limited to the above-mentioned size, and is not limited to the above-mentioned size. Various changes can be made according to the size and number of WPPs 5).

The sealing portion 4 is formed by, for example, using a relatively fluid epoxy-based thermosetting sealing resin 6 (see FIG. 6) or the like to form the flip chip connecting portion 5a of each WPP 5. In the case of resin sealing, the flip-chip connecting portions 5 of the respective WPPs 5 are formed.
a, a sealing resin 6 is applied from the exposed opening end 3f on the opposite side to the sealing resin 6 through the through hole 3e.
5 is formed by diffusing a sealing resin 6 over the entire flip chip connecting portion 5a.

The resin sealing of the flip chip connecting portion 5a is also called underfill sealing.

When seven WPPs 5 are mounted on the front surface 3c or the rear surface 3d of the module substrate 3, seven WPPs 5 are collectively mounted on one side of each of the module substrates by reflow (batch reflow) or the like. 3

Next, the memory module 8 of the present embodiment
A method for manufacturing a (semiconductor device) will be described with reference to a step diagram of mounting the WPP 5 shown in FIG.

First, the semiconductor chip 1 and its pad 1a
(14 in the present embodiment) chip structure including a bump electrode 1c electrically connected to the WPP.
Prepare 5

The chip structure according to the present embodiment is
Since this is PP5, when preparing this WPP5, the wiring portion 1b electrically connected to the pad 1a of the semiconductor chip 1
As shown in FIG. 3, after forming bump electrodes 1c electrically connected to the respective chip regions 2a of the semiconductor wafer 2, the WPPs 5 are prepared by being cut and separated into individual WPPs 5.

That is, the semiconductor wafer 2 before dicing
After forming the semiconductor integrated circuit, a wiring portion 1b made of copper or the like is electrically connected to the pad 1a by a film forming technique.

Further, the wiring portion 1b is formed by vapor deposition or the like.
Electrode 1 made of solder etc. electrically connected to
Form c.

As a result, as shown in FIG. 3, in the state of the semiconductor wafer 2, the wiring portion 1b is formed in each chip region 2a.
And the bump electrode 1c can be formed.

Note that the semiconductor chip 1 of the present embodiment is
It is a memory chip.

Thereafter, dicing of the semiconductor wafer 2 is performed, and as shown in step S1 shown in FIG.
P14 (chip structure) is separated to obtain 14 WPP5.

On the other hand, a plurality of external terminals 3a and 14 through holes 3e are provided, and 14 WPPs 5
A module substrate 3 shown in FIG. 4 is prepared, which can be supported by flip chip connection on the c (first surface) and the back surface 3d (second surface) seven by seven.

Here, a module substrate 3 provided with a through hole 3e so as to be arranged substantially corresponding to the center of the WPP 5 when the WPP 5 is mounted on the module substrate 3 is used.

That is, a module substrate 3 provided with 14 through-holes 3e at a pitch (interval) of ΔP is prepared.

Subsequently, as in step S2 shown in FIG. 5, the module substrate 3 is supplied, and then the WPP 5 is mounted on the front surface 3c and the rear surface 3d of the module substrate 3 (step S3).

At this time, one of the opening ends 3f of the through-hole 3e is exposed, and the other opening end 3g is disposed on the front surface 3c and the back surface 3d of the module substrate 3 so that the opening end 3g is disposed at the flip chip connection portion 5a of the WPP 5. The WPPs 5 are mounted by flip-chip connection on each of the surfaces 7 and 7 each.

Here, the surface of the module substrate 3 (first
WPP5 is mounted by flip-chip connection from the 3c side.

First, the surface 3c side of the module substrate 3 is directed upward, and every third through-hole 3e is placed on the through-hole 3e.
The WPPs 5 are arranged with the bump electrodes 1c facing downward.

At this time, the through-hole 3e is located substantially at the center of the WPP 5.
For example, each WPP 5 is temporarily fixed on the module substrate 3 using a flux or the like so as to be arranged correspondingly.

Thereafter, it is passed through a reflow furnace or the like to
Batch reflow of PP5.

At this time, each WPP 5 is mounted on the module substrate 3 by the alignment of the solder bump electrodes 1c.
Is positioned between

Thereafter, by cooling, the mounting of the seven WPPs 5 on the front surface 3c side of the module substrate 3 is completed.

That is, in this state, the module substrate 3
In other words, the WPP 5 is arranged on the through hole 3e every other through hole 3e on the surface 3c side. At this time, the through holes 3e are provided at a pitch of ΔP, and seven WPs are formed.
Since P5 is disposed on every other through-hole 3e, P is almost twice as large as ΔP. As a result, seven WPPs 5 are attached to the surface 3c of the module substrate 3 by the mounting pitch P. Has been implemented.

At this time, the through-hole 3e is located substantially at the center of the WPP 5.
Is arranged.

Subsequently, the front and back surfaces of the module substrate 3 are reversed, and the back surface 3d side is directed upward.

After that, on the back surface 3d side of the module substrate 3, with respect to the through hole 3e adjacent to the through hole 3e on which the WPP 5 is mounted on the front surface 3c side, every other through hole 3e as in the case of the front surface 3c side. Seven WPP5 on the through hole 3e
Are arranged with the bump electrodes 1c facing downward.

At this time, as in the case of the surface 3c side, the WP
For example, each WPP is formed using a flux or the like so that the through-holes 3e are arranged correspondingly at substantially the center of P5.
5 is temporarily fixed on the module substrate 3.

Thereafter, it is passed through a reflow furnace or the like to
Batch reflow of PP5.

At this time, each WPP 5 is placed on the module substrate 3 by the alignment of the solder bump electrodes 1c.
Is positioned between

Subsequently, the mounting of the seven WPPs 5 on the back surface 3d side of the module substrate 3 is completed by cooling.

As a result, on the front surface 3 c and the back surface 3 d of the module substrate 3, the WPPs 5 are attached at the mounting pitch P (for example, about
c and the back surface 3d are mounted in such a manner that they are shifted from each other by ΔP which is about の of the pitch P, so that the side parts 5b on both sides in the direction perpendicular to the longitudinal direction of each WPP 5 are mounted on the module substrate. 3 are arranged so as to overlap on the front surface 3c and the back surface 3d.

Further, each through-hole 3e is formed by WPP
5 is arranged corresponding to substantially the center, at which time one open end 3f is exposed and the other open end 3g is
It is arranged substantially at the center of the flip chip connection part 5a of PP5.

Thereafter, the flip chip connecting portion 5a of each WPP 5 is sealed with a resin, that is, underfilled.

First, the flip chip connecting portions 5a of the seven WPPs 5 mounted on the front surface 3c of the module substrate 3 are connected to the opposite side, that is, from the exposed opening ends 3f to the through holes 3e.
The sealing resin 6 is supplied through this, and as a result, as shown in step S4 in FIG. 5, the flip-chip connecting portion 5a of the WPP 5 on the front surface 3c side is underfill-sealed.

At this time, in the present embodiment, as shown in FIG. 6, the back surface 3d side of the module substrate 3 is directed upward, and the nozzle 7 for discharging the sealing resin 6 from the opening end 3f exposed upward is provided. Insert the through hole 3e from above, and then
The sealing resin 6 to which pressure is applied is supplied to the WPP 5 through the nozzle 7.
It is supplied to the flip chip connecting portion 5a of the (chip structure) to perform underfill sealing.

That is, when the flip chip connecting portion 5a on the front surface 3c side is sealed with resin, the nozzle 7 for supplying the sealing resin 6 is inserted into the opening end 3f exposed on the back surface 3d side from above. A predetermined pressure is applied to the sealing resin 6 through the sealing resin 6 to the flip chip connecting portion 5a.
Supply.

The through hole 3e is provided in each WPP5
Is arranged substantially at the center with respect to the flip chip connecting portion 5a, when the sealing resin 6 is pressurized through the nozzle 7 and supplied to the flip chip connecting portion 5a during resin sealing, The sealing resin 6 can be diffused from substantially the center of the connection portion 5a to the entire outer periphery thereof.

In the same procedure, the surface 3 of the module substrate 3
After the resin is supplied to all the seven WPPs 5 on the c side, the sealing resin 6 is cured by heat curing or the like, and the underfill sealing of the flip chip connection portion 5a on the front surface 3c side is completed.

Thereafter, as in step S5 shown in FIG. 5, the front surface 3c and the back surface 3d of the module substrate 3 are reversed, and the front surface 3c side is turned upward.
Resin sealing, that is, underfill sealing of the flip-chip connecting portions 5a of the seven WPPs 5 mounted on the side is performed (step S6).

The underfill sealing of the back surface 3d is also performed on the opposite side (front surface 3c side) with respect to each flip chip connecting portion 5a, as in the case of the front surface 3c side.
A nozzle 7 for supplying the sealing resin 6 is inserted into the opening end 3f exposed from above, from above, and a predetermined pressure is applied to the sealing resin 6 via the nozzle 7 so as to apply the flip chip connecting portion 5a.
Is supplied with a sealing resin 6.

Further, as in the case of the surface 3c side, the through hole 3
e is the flip chip connection part 5a of each WPP5.
When the sealing resin 6 is pressurized via the nozzle 7 and supplied to the flip-chip connecting portion 5a at the time of resin sealing, almost the center of the flip-chip connecting portion 5a is provided. From the sealing resin 6 toward the entire outer periphery
Can be diffused.

In the same procedure, the back surface 3 of the module substrate 3
After the resin is supplied to all the seven WPPs 5 on the d side, the sealing resin 6 is cured by thermosetting or the like, and the underfill sealing of the flip chip connection portion 5a on the back surface 3d is completed.

Thereafter, predetermined inspections and the like are performed to complete the assembling of the memory module 8 (semiconductor device) having the chip structure WPP5 mounted on the front and back surfaces as shown in FIG.

According to the memory module (semiconductor device) and the method of manufacturing the same according to the present embodiment, the following operational effects can be obtained.

That is, the module substrate 3 has WPP5
When the (chip structure) is mounted, the fourteen through holes 3 e provided in the module substrate 3 have one of the open ends 3.
f is the front surface 3c (first surface) or the back surface 3d (second surface)
And the other open end 3g is arranged at the flip chip connecting portion 5a of the WPP 5, so that when the flip chip connecting portion 5a is sealed with a resin (underfill sealing), the opposite side is formed. The sealing resin 6 can be directly supplied to the flip chip connecting portion 5a from the exposed opening end 3f through the through hole 3e.

Therefore, the WPP 5 is connected to the module substrate 3
In the memory module 8 (semiconductor device) mounted on the front and back surfaces of the
By using e, the flip chip connection portion 5a of the WPP 5 can be resin-sealed (underfill-sealed).

Further, the sealing resin 6 is applied from the side of the WPP 5.
As compared with the method of supplying the sealing resin 6, the sealing resin 6 can be directly supplied to the flip chip connecting portion 5 a through the through hole 3 e, so that the sealing resin 6 can be spread over the entire flip chip connecting portion 5 a. You can spend less time.

As a result, the workability of underfill sealing in a module product such as the memory module 8 (semiconductor device) in which the WPP 5 is mounted on both front and back surfaces can be improved.

As a result, the mass productivity of the WPP 5 double-sided mounted memory module 8 can be improved.

Further, since the mass productivity of the memory module 8 can be improved, the manufacturing cost of the memory module 8 can be reduced.

The through hole 3e of the module substrate 3 is
By being formed so as to correspond to substantially the center of the WPP 5, the sealing resin 6 can be diffused from substantially the center of the flip chip connecting portion 5a.

As a result, the time required to spread the sealing resin 6 over the entire flip chip connection portion 5a can be further reduced. As a result, the workability of underfill sealing in the WPP5 double-sided mounting type memory module 8 can be reduced. It can be further improved.

Also, since the through hole 3e is formed so as to correspond to substantially the center of the WPP 5,
The sealing resin 6 is located substantially at the center of the flip chip connecting portion 5a.
Can be diffused, and as a result, the dispersion of the diffusion of the sealing resin 6 in the flip chip connection portion 5a can be reduced.

Therefore, the sealing resin 6 can be diffused almost uniformly over the entire flip chip connecting portion 5a.
Thereby, high-quality underfill sealing can be performed.

As a result, it is possible to improve the connection reliability of the flip chip connection portion 5a in the WPP 5 double-sided mounting type memory module 8.

At the time of resin sealing, a nozzle 7 for discharging the sealing resin 6 is inserted from the exposed opening end 3f of the through hole 3e of the module substrate 3, and then the sealing resin 6 is inserted through the nozzle 7. Is supplied to the flip-chip connecting portion 5a by applying pressure to the flip-chip connecting portion 5a.
The diffusion time of the sealing resin 6 in a can be significantly reduced.

As a result, the workability of underfill sealing in the WPP5 double-sided mounting type memory module 8 can be further improved, and as a result, the mass productivity can be further improved.

Further, when the semiconductor chip 1 is a memory chip and the semiconductor device is a memory module 8 as in the present embodiment, the need for the memory module 8 is large, so that the mass productivity is improved. The effect of reducing the cost of the memory module 8 can be further increased.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the embodiments of the invention, and does not depart from the gist of the invention. It is needless to say that various changes can be made.

For example, in the above-described embodiment, the case where the WPPs 5 as the chip structures are provided in a line at a predetermined interval (pitch P) on both the front and back surfaces of the module substrate 3 has been described. The modules 8 may be mounted in two rows on the module substrate 3 in order to increase the memory capacity.

Here, the memory module 8 according to the other embodiment shown in FIGS. 7A, 7B and 7C has the same size as the memory module 8 according to the embodiment shown in FIG. The substrate 3 and the same size WPP5 are used, and the mounting orientation of the WPP5 on the module substrate 3 is 90 °.
° Change, and two rows of 10 W on each side for a total of 20 W
This is a memory module 8 (semiconductor device) in which PP5 is mounted on both sides.

At this time, in the memory module 8 shown in FIG. 7, the mounting pitch of adjacent WPPs 5 in the same row is set to a pitch L larger than the pitch P (the mounting pitch in the case of the memory module 8 shown in FIG. 1). The front surface 3c side and the back surface 3d side of the substrate 3 are shown in FIG.
As shown in (b), they are mounted shifted by ΔL.

In the memory module 8 shown in FIG. 7, resin sealing, that is, underfill sealing can be performed using the same method as the method of underfill sealing of the memory module 8 shown in FIG. Therefore, the same function and effect as those described in the above embodiment can be obtained. In addition, since the number of WPPs 5 to be mounted can be increased by six, the memory capacity of memory module 8 can be greatly increased. Can be done.

In the above-described embodiment and the other embodiments, the case where one through-hole 3e is formed per one chip structure (WPP5) has been described. A plurality of chip structures may be provided.

As a result, the time required for underfill sealing can be reduced, and the sealing resin 6 can be supplied almost uniformly to the entire flip chip connecting portion 5a.

In the above embodiment, the first surface of the module substrate 3 is the front surface 3c and the second surface is the rear surface 3d, but the relationship between the two may be reversed.

That is, the first surface may be the back surface 3d and the second surface may be the front surface 3c.

The number of chip structures (WPP5) mounted on the module substrate 3 may be a plurality other than 14 or 20, and a plurality of the chip structures (WPP5) may be provided on both the front and back surfaces of the module substrate 3. Is not particularly limited as long as the semiconductor device is mounted with.

Further, the number of through-holes 3e provided in the module substrate 3 is not limited to the same number as the number of mounted chip structures, but is equal to or more than the number of mounted chip structures. Is also good.

In the above embodiment and the other embodiments, the case where the semiconductor chip 1 is a memory chip has been described. However, the semiconductor chip 1 has a system in which a microcomputer area and a memory area are formed. It may be a chip or a combination of both.

Further, in the above embodiments and the other embodiments, the case where the semiconductor device is the memory module 8 has been described. However, the semiconductor device is not limited to the memory module 8 but includes the semiconductor chip 1. If the chip structure is mounted on the front and back surfaces of the module substrate 3 by flip-chip connection, and the respective flip-chip connection portions 5a are underfill-sealed,
An MCM (Multi-Chip-Module) having a plurality of types of semiconductor chips 1 such as a microcomputer chip and a memory chip may be used.

[0115]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

(1). By providing a plurality of through holes in the module substrate, when flip-chip connection parts of a semiconductor device mounted on both sides of the chip are sealed with resin (underfill sealing), the exposed opening ends are sealed through the through holes. The stopping resin can be directly supplied to the flip chip connection portion. As a result, it is possible to reduce the time spent for distributing the sealing resin to the entire flip chip connection portion. Thereby, the workability of underfill sealing in a semiconductor device (module product) of a chip double-sided mounting type can be improved.

(2). According to the above (1), the mass productivity of the semiconductor device mounted on both sides of the chip can be improved.

(3). Since the mass productivity of the semiconductor device can be improved, the manufacturing cost of the semiconductor device can be reduced.

(4). Since the through-hole of the module substrate is formed so as to correspond to substantially the center of the chip structure, the sealing resin can be diffused from substantially the center of the flip-chip connection portion. Variations in the diffusion of the sealing resin in the chip connection portion can be reduced. Therefore, high-quality underfill sealing can be performed. As a result, it is possible to improve the connection reliability of the flip-chip connecting portion in the semiconductor device mounted on both sides of the chip.

(5). At the time of resin sealing, insert a nozzle that discharges sealing resin from the exposed opening end of the through hole,
Thereafter, by applying pressure to the sealing resin through the nozzle and supplying the resin to the flip chip connection portion, the diffusion time of the sealing resin can be significantly reduced. Thereby, the workability of underfill sealing in the semiconductor device of the chip double-sided mounting type can be further improved.

[Brief description of the drawings]

FIGS. 1A, 1B, and 1C are diagrams showing a structure of a memory module which is an example of a semiconductor device according to an embodiment of the present invention, FIG. 1A is a plan view, and FIG. (A) is a sectional view showing an AA section, and (c) is a partially enlarged sectional view of a B portion shown in the (b) sectional view.

FIGS. 2A and 2B are wafer process packages (chip structures) used in the memory module shown in FIG. 1;
FIGS. 2A and 2B are diagrams illustrating an example of the structure of FIG. 1A, wherein FIG. 1A is a partially enlarged cross-sectional view, and FIG.

FIG. 3 is an enlarged partial plan view showing an example of the structure of a semiconductor wafer used in the wafer process package shown in FIG.

FIG. 4 is a plan view showing an example of a structure of a module substrate used in the memory module shown in FIG.

FIG. 5 is a step diagram showing an example of a procedure for mounting a wafer process package (chip structure) on a module substrate in the method of manufacturing a semiconductor device according to the present invention.

FIG. 6 is an enlarged partial cross-sectional view illustrating an example of a resin supply state during underfill sealing in the method of manufacturing a semiconductor device according to the present invention.

FIGS. 7A, 7B and 7C are diagrams showing the structure of a memory module which is a semiconductor device according to another embodiment of the present invention, wherein FIG. 7A is a plan view and FIG. (A) is a sectional view showing a CC section, and (c) is a partially enlarged sectional view of a D part shown in the sectional view of (b).

[Explanation of symbols]

 Reference Signs List 1 semiconductor chip 1a pad (front electrode) 1b wiring portion 1c bump electrode (connection terminal) 2 semiconductor wafer 2a chip area 3 module substrate 3a external terminal 3b electrode 3c front surface (first surface) 3d rear surface (second surface) 3e Through holes 3f, 3g Open end 4 Sealing part 5 WPP (chip structure) 5a Flip chip connecting part 5b Side part 6 Resin for sealing 7 Nozzle 8 Memory module (semiconductor device)

Claims (9)

[Claims] 1. A plurality of chip structures each having a semiconductor chip, and the plurality of chip structures are supported on a first surface and a second surface opposite thereto by flip-chip connection. A module substrate having a plurality of through-holes that are exposed on either the first or second surface and whose other open end is disposed at a flip-chip connection portion of the chip structure; and a plurality of the chip structures, respectively. A sealing portion for resin-sealing the flip-chip connection portion of the chip structure, the flip-chip connection portion of each of the chip structures being sealed from the opening end opposite to the flip chip connection portion at the time of the resin sealing. A semiconductor device, wherein a sealing resin is supplied through a through hole. 2. The semiconductor device according to claim 1, wherein a part of the chip structure mounted on the first surface of the module substrate and the chip structure mounted on the second surface. A semiconductor device, wherein a part of a body is disposed so as to overlap on the first and second surfaces of the module substrate. 3. The semiconductor device according to claim 1, wherein the chip structure includes a wiring portion electrically connected to a surface electrode of the semiconductor chip and a connection terminal electrically connected to the wiring portion. A semiconductor device comprising a structure formed in each chip region of a semiconductor wafer and then cut and separated into individual chip structures. 4. The semiconductor device according to claim 3, wherein the semiconductor chip in each of the chip structures is a memory chip, and the connection terminal is a bump electrode. 5. The semiconductor device according to claim 1, wherein said through hole is formed so as to be located substantially at the center of said chip structure. Semiconductor device. 6. A step of preparing a plurality of chip structures each provided with a semiconductor chip, and a first and an opposite, provided with a plurality of through holes, capable of supporting the plurality of chip structures by flip-chip connection. Preparing a module substrate having a second surface on the side of the module; and forming the module so that one opening end of the through-hole is exposed and the other opening end is arranged at a flip chip connection portion of the chip structure. Mounting the plurality of chip structures on the first and second surfaces of the substrate by flip-chip connection; and the plurality of flip chips of the plurality of chip structures on one of the first and second surfaces A sealing resin is supplied to the connection portion from the opening end on the opposite side through the through hole, and the flip chip connection portion of the chip structure on the one surface is resin-sealed. And after sealing the flip chip connection portion of the chip structure on the one surface with resin, the flip chip connection of the plurality of chip structures on the first or second other surface Supplying a sealing resin from the opening end on the opposite side to the portion through the through-hole, and resin-sealing the flip chip connection portion of the chip structure on the other surface. A method for manufacturing a semiconductor device, comprising: 7. The method for manufacturing a semiconductor device according to claim 6, wherein said first or second step is performed when said resin sealing is performed.
After resin-sealing the flip chip connection portion of the chip structure on one of the surfaces, the first surface and the second surface of the module substrate are inverted, and then the first or A method of manufacturing a semiconductor device, comprising: resin-sealing the flip-chip connecting portions of the plurality of chip structures on any one of the second surface. 8. The method for manufacturing a semiconductor device according to claim 6, wherein said chip structure is disposed substantially corresponding to a center of said chip structure when said chip structure is mounted on said module substrate. A semiconductor, characterized in that a sealing resin is diffused from substantially the center of the flip-chip connecting portion of the chip structure through the through-hole at the time of resin sealing using the module substrate provided with a through-hole. Device manufacturing method. 9. The method for manufacturing a semiconductor device according to claim 6, wherein at the time of resin sealing, a nozzle for discharging a sealing resin from an exposed opening end of the through hole is inserted. A method for manufacturing a semiconductor device, comprising: supplying a sealing resin under pressure to the flip-chip connecting portion of the chip structure via the nozzle.