JP2000181883A - Crossbar device, multistage crossbar device and information processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multistage crossbar device capable of performing request sequence assurance with a simple configuration. SOLUTION: A small-scale crossbar device 10 provided with an input buffering part 11, a crossbar switch 12 and an output buffering part 13 including plural output buffers is provided with an other crossbar output buffer state monitoring part 14 which monitors the output buffering parts of the other small- scale crossbar devices belonging to the same processing stage of the multistage crossbar device and an output buffer busy generating part 15 which generates an output buffer busy signal in accordance with its output. The other crossbar output buffer state monitoring part obtains the absolute value of the number of requests in every connection destination of each output buffer and outputs maximum write request number information. The output buffer busy generating part decides if write should be stopped in every output buffer based on the maximum write request number information and the states of the output buffering part of a self-crossbar and the input buffering part.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a multi-stage crossbar device, and more particularly to a multi-stage crossbar device capable of guaranteeing the order of requests issued at different timings.

[0002]

2. Description of the Related Art As shown in FIG. 14, a plurality of (four in this case) small-scale crossbar devices 10 are provided.
0, 110, 120, and 130 (or 200, 2
10, 220, and 230) to form one processing stage,
It is constituted by connecting such processing stages in multiple stages (here, two stages).

[0003] Small crossbar devices 100, 110, 12
0, 130, 200, 210, 220, and 230 are
The input buffer units 101, 111, 121, 131, connected to a plurality of (here, four) input ports, respectively.
201, 211, 221 and 231 and crossbar switches 102 and 11 for transferring a request input to an input port to a plurality (here, four) of output ports.
2, 122, 132, 202, 212, 222, and 2
32, and output buffer units 103, 113, 123, 133, connected between the crossbar switch and the output port.
203, 213, 223, and 233.
The technique of providing an output buffer on the output side of the crossbar switch is described in Japanese Patent Application Laid-Open No. 9-6759.

The multistage crossbar device is used, for example, in an information processing device in which a plurality of CPUs access a single main memory in parallel. That is, it is used to supply an access request issued from a plurality of CPUs to a plurality of main storage access units that access a single main storage device in parallel. In this case, when access requests (requests) to the same area (same address) of the main memory are issued from a plurality of CPUs, the requests are transferred to the main memory access means in the order in which these access requests are issued. There must be. That is, the order of the requests must be guaranteed.

[0005] In order to clarify the reason why the request order must be guaranteed, the operation of the multi-stage crossbar device when the request order is not guaranteed will be described below with reference to FIGS.

First, it is assumed that two consecutive commands are input to all input ports. These instructions are shown in FIG.
As shown in FIG. 5, the data is stored in the input buffer units 101, 111, 121, and 131 of the small scale crossbar device belonging to the first processing stage. That is, each input buffer unit 10
1, 111, 121, and 131 store four preceding instructions and four subsequent instructions, respectively. In FIG. 15, each instruction is indicated by “□”, and the upper right corner of “□” indicating the subsequent instruction is blacked out to distinguish the preceding instruction from the subsequent instruction. The alphabetic characters in "□" indicate the output port to which the instruction is to be transferred.

At the next operation timing, each of the crossbar switches 102, 112, 122, and 132 fetches the preceding instructions stored in the input buffer units 101, 111, 121, and 131, and sends these instructions to their destinations. Accordingly, the output buffer units 103, 113, 123, and 1
33. FIG. 16 shows the result. here,
When there are a plurality of instructions having the same destination, each crossbar switch arranges these instructions in a predetermined order and outputs the instructions to the output buffer unit 103. That is, in the state of FIG. 15, the three preceding instructions stored in the input buffer unit 101 and to be output to the output port “a” are in the predetermined order at the next operation timing as shown in FIG. Stored in the same output buffer.

At the next operation timing, the output buffer units 103, 113, 123, and 133 respectively store only one instruction and hold the input buffer unit of the small scale crossbar device belonging to the second processing stage. 201,211,2
21 and 231. At the same time, the crossbar switches 102, 112, 122, and 1 of the first processing stage
32 designates a subsequent instruction for input buffer units 101, 111, 1
21 and 131, and output buffer units 103, 113, 123,
And 133. The result is shown in FIG. At this time, the output buffer unit 113 includes the output port “a”.
While three subsequent instructions addressed to the same buffer are stored, two preceding instructions addressed to the output port “a” remain in the output buffer unit 103.

At the next operation timing, the output buffer unit 1
03, 113, 123, and 133 each store only one instruction held by the input buffer units 201, 211,
221 and 231. At the same time, the crossbar switches 202, 212, 222, and 232 are connected to the input buffer units 201, 211, 221 and 23, respectively.
Take out one instruction stored in 1 and according to its destination,
Output to the output buffer units 203, 213, 223 and 233. FIG. 18 shows the result. At this time, the input buffer units 101, 111, 121, and 13
1 has no instruction, so that the crossbar switch 10
2, 112, 122, and 132 do not operate, and there is no output to the output buffer units 103, 113, 123, and 133.

In FIG. 18, a preceding instruction and a following instruction destined for the output port “a” coexist in the input buffer unit 201. Moreover, the preceding instruction destined for the output port “a” remains in the output buffer unit 103. This means that the succeeding instruction overtakes the preceding instruction, as described below.

At the next operation timing, the output buffer units 103, 113, 123, and 133 also
The input buffer unit 2 stores only one instruction each holds.
01, 211, 221 and 231. At the same time, the crossbar switches 202, 212, 222, and 2
32 are input buffer units 201, 211, and 2, respectively.
21 and one of the instructions stored in the output buffer units 231, 213, and 22.
3 and 233. Further, the output buffer units 203, 213, 223, and 233 output the instructions stored at the previous operation timing one by one to the output ports. The results are shown in FIG.

Thereafter, by repeating the same operation as described above, the state of each section sequentially changes from FIG. 19 to FIG. 20, FIG. 21, and FIG. Then, in the state shown in FIG. 22, all instructions are output to the corresponding output ports.

Referring to FIG. 22, the instructions output to each output port are basically in the order of the preceding instruction-the following instruction. However, in the instruction output to the output port “a”, one of the subsequent instructions replaces the preceding instruction by one of the
Are overtaken by one. This causes a situation in which, for example, when another CPU attempts to read information rewritten by one CPU from main memory, the information before rewriting is read. Therefore, in the multi-stage crossbar device as shown in FIG. 14, it is necessary to guarantee the order so that the transfer is performed in the order in which the requests are generated.

Conventionally, the order of requests is guaranteed by managing a main storage area by software such as an OS, and accessing an accessible CP for each address or for each part of the main storage area.
This is done by assigning U.

[0015]

According to the conventional method of assigning access rights to the main storage device to a plurality of CPUs by software or the like, a certain assigned CPU
After the access has been completed, if the CPU to which the access right has been assigned subsequently accesses the address accessed by the previously assigned CPU, the preceding access has been completed or the subsequent instruction It is necessary to issue a subsequent request after confirming that the preceding instruction is not overtaken, and there is a problem that operation control is very complicated. Particularly, in a multi-stage crossbar device in which a small-scale crossbar device in which an output buffer is connected to a crossbar switch is connected in multiple stages, the presence of this output buffer makes it difficult to confirm that a subsequent instruction does not overtake a preceding instruction. However, there is a problem that the overhead becomes very large.

An object of the present invention is to provide a multi-stage crossbar device capable of guaranteeing the order of requests with a simple configuration.

It is another object of the present invention to provide a multi-stage crossbar apparatus which not only guarantees the order of requests but also guarantees the order according to the contents of the requests.

It should be noted that Japanese Unexamined Patent Publications Nos. 3-82243 and 5-83283 disclose an ATM which can guarantee the order.
Although the exchanges are disclosed, the method adopted in these methods is to add information indicating the output order to the cell and determine the output order based on the information. It is difficult to apply to high-speed operation such as when accessing a device.

Japanese Patent Application Laid-Open No. 4-94240 discloses that
Although a cell switching device that arbitrates the transmission order is disclosed,
The arbitration performed by the cell switching device does not guarantee the output order.

[0020]

According to the present invention, an input buffer connected to a plurality of input ports, an output buffer connected to a plurality of output ports, and a request held in the input buffer are provided. And a crossbar switch for transferring the data to the output buffer unit, wherein the state of at least one other output buffer unit different from the externally connected output buffer unit is monitored and written to the other output buffer unit. A crossbar output buffer state monitoring unit that outputs monitoring information representing the maximum value of the number of requests received, and the input buffer based on the monitoring information and the states of the input buffer unit and the output buffer unit. An output buffer busy generation unit for stopping transfer of a request from the unit to the output buffer unit. Rosuba device is obtained.

In the crossbar device, a decoding unit for decoding a request held in the input buffer unit and the output buffer busy generation unit in accordance with the content of the request decoded by the decoding unit are transmitted to the output buffer busy generation unit. And a busy generation method instructing unit for instructing whether or not to adopt. Further, a crossbar configuration information holding unit for holding setting information for designating another output buffer unit monitored by the other crossbar output buffer state monitoring unit is provided, and the other crossbar output buffer state monitoring unit uses It is also possible to monitor only the state of another designated output buffer unit.

The output buffer section has an output buffer corresponding to the plurality of output ports on a one-to-one basis, and a request from the input buffer section to the output buffer section by the output buffer busy generation section. Is stopped for each output buffer.

According to the present invention, an input buffer unit connected to a plurality of input ports, an output buffer unit connected to a plurality of output ports, and a request held in the input buffer unit are transmitted to the output buffer. In a multi-stage crossbar device in which a plurality of crossbar devices each having a crossbar switch for transferring data to a unit are connected in multiple stages, the state of the output buffer unit of another crossbar device belonging to the same processing stage is provided for each of the crossbar devices. Another crossbar output buffer status monitoring unit for monitoring and outputting monitoring information representing the maximum value of the number of requests written to the other output buffer unit; the monitoring information; the input buffer unit and the output buffer An output buffer for stopping a transfer of a request from the input buffer unit to the output buffer unit based on a state of the unit. Multistage crossbar device is obtained which is characterized by comprising a G generator.

Here, each of the crossbar devices includes a decoding unit for decoding the request held in the input buffer unit, and the output buffer busy generation unit according to the content of the request decoded by the decoding unit. The unit may be provided with a busy generation mode instruction unit for instructing whether to adopt the monitoring information. Further, each of the crossbar devices is provided with a crossbar configuration information holding unit for holding setting information for designating another output buffer unit to be monitored by the other crossbar output buffer status monitoring unit, and the other crossbar output buffer status monitoring unit is provided. The unit may monitor only the state of another output buffer unit specified by the setting information.

Each of the output buffer units of the crossbar device has an output buffer corresponding to the plurality of output ports on a one-to-one basis, and the output buffer unit generates the output buffer from the input buffer unit to the output buffer unit. The transfer of the request to the buffer is stopped for each output buffer.

This multi-stage crossbar device has a plurality of CPUs.
And a plurality of access means for accessing a single main storage device in parallel to constitute an information processing device.

[0027]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 shows a small-scale crossbar device 10 according to an embodiment of the present invention. This small crossbar device 1
0 denotes an input buffer unit 11 having input buffers connected to four input ports, and an input buffer unit 1
A crossbar switch 12 for transferring the input request stored in the switch 1 to the output port;
An output buffer unit 13 having an output buffer connected to each of the four output ports, and another crossbar output buffer state monitoring unit 14 for monitoring the state of the output buffer unit of another small scale crossbar device; An output buffer busy that generates a busy signal for temporarily stopping writing to the output buffer unit 13 based on monitoring information from the other crossbar output buffer state monitoring unit 14 and a result of state detection of the crossbar switch 12 and the output buffer unit 13 And a generating unit 15. Here, the other small crossbar device to which the other crossbar output buffer state monitoring unit 14 is connected refers to another small crossbar device belonging to the same processing stage in the multistage crossbar device.

The input buffer section 11 has input buffers respectively corresponding to input ports. These input buffers are buffer buffers for temporarily storing and holding crossbar input requests continuously input to each input port. When there is a request that cannot be passed through the crossbar switch 12, a subsequent request is sent. Hold.

The crossbar switch 12 receives an input request input to an input port (accurately, a request held in an input buffer connected to the input port).
The data is transferred to an output port corresponding to the destination information included in the input request (more precisely, an output buffer connected to the output port). At this time, if there is a request for transfer to one output port among a plurality of input ports, the requests are arbitrated (that is, arranged) according to a predetermined priority and output simultaneously. In addition, the crossbar switch 12 outputs the own crossbar output request number information 12-1 to the output buffer busy generation unit 15. This own crossbar output request number information indicates how many requests to be transferred next exist for each output buffer described later.

The output buffer section 13 has an output buffer corresponding to each output port. These output buffers are buffers for transferring the output of the crossbar switch 12 to the next-stage small-scale crossbar device (or an external device). When a plurality of requests are output from the crossbar switch 12 at the same time, each output buffer can store the plurality of requests simultaneously (according to arbitration in the crossbar switch). Further, the output buffer unit 13 outputs the own crossbar use request number information 13-1 to the output buffer busy generation unit 15. This own crossbar use request number information indicates the number of requests stored in each output buffer.

Other crossbar output buffer status monitor 14
Monitors the state of the output buffer section of another small-scale crossbar device that may need to guarantee the order of requests. That is, in the multistage crossbar device, the state of the output buffer section of the other small crossbar device in the processing stage to which the small crossbar device belongs is monitored. For example, when one processing stage is composed of four small-sized crossbar devices, as shown in FIG. 2, the small-sized crossbar device 10a and the crossbar output buffer state monitoring unit 14a are connected to the small-sized crossbar device of the same processing stage. Output buffer unit 1 of devices 10b, 10c and 10d
The monitoring of 3b, 13c, and 13d is performed. Similarly, the other crossbar output buffer state monitoring unit 14b of the small scale crossbar device 10b includes output buffer units 13a, 13c, and 13d of the small scale crossbar devices 10a, 10c, and 10d.
Is monitored by the small-sized crossbar device 10c and the crossbar output buffer state monitoring unit 14c.
a, 10b, and 10d output buffer units 13a, 13
The small-size crossbar device 10d monitors the output buffers 13a, 13b, and 13c of the small-size crossbar devices 10a, 10b, and 10c, respectively.

Other crossbar output buffer status monitor 14
Is, for each connection destination of the output buffer of the output buffer unit 13,
The maximum number of write requests (maximum value) is obtained by comparing the monitoring results of the output buffers of the other small crossbar devices. The other crossbar output buffer state monitoring unit 14 sets the obtained maximum number of write requests as the maximum number of write requests information 14-1 and sets the output buffer busy generation unit 15
Output to

The output buffer busy generator 15 is configured as shown in FIG. 3, for example. The maximum number of write request information 14-1 from the other crossbar output buffer status monitor 14 and the own crossbar from the crossbar switch 12 are output. Output request number information 12-1 and output buffer unit 13
The output buffer busy signals 15-1 and 15-2 for stopping the operation of writing the output of the crossbar switch 12 to the output buffer unit 13 are generated based on the crossbar use request number information 13-1 from the server.

Hereinafter, the operation when the processing stage shown in FIG. 2 is adopted as the first stage of the multistage crossbar device shown in FIG. 14 will be described in detail with reference to FIG. 2 and FIGS.

Here, in the following description, a group of small-scale crossbar devices that need to guarantee the order of requests is called a crossbar group. The crossbar group is a group of crossbars in the same hierarchy having input ports to which requests to the same address may be input at the same time (not necessarily at the same time). That is, in the multi-stage crossbar device shown in FIG.
a, 10b, 10c, and 10d form a crossbar group. Each of the second-stage small-scale crossbar devices has a different hierarchy (processing stage), so that the small-scale crossbar devices 10a,
They cannot belong to the crossbar group formed by 10b, 10c, and 10d. In the example of FIG. 4, all the small-scale crossbar devices in the first stage constitute one crossbar group. However, when the physical connections in the first and second stages are different, If the priorities of the crossbar switches of the small crossbar devices are different, not all small groups belonging to the processing stage necessarily form one crossbar group. That is, a plurality of crossbar groups may be formed even in one processing stage.

First, as shown in FIG. 4, the input buffer units 11a, 11b, 11c, and 11 of the first processing stage
It is assumed that the preceding instruction and the following instruction are stored in d.

At the next operation timing, the crossbar switches 12a, 12b, 12c, and 1 of the first processing stage
2d are input buffer units 11a, 11b, 11
c and the preceding instruction stored in 11d
According to the destination, these preceding instructions are output to the output buffer unit 1.
Output to 3a, 13b, 13c and 13d. The result is shown in FIG.

In the state shown in FIG. 5, the other crossbar output buffer state monitoring unit 14a includes the output buffer units 13b and 13
Monitor the status of c and 13d. Similarly, the other crossbar output buffer state monitoring unit 14 b
a, 13c, and 13d, and the other crossbar output buffer state monitoring unit 14c
a, 13b, and 13d are monitored, and the other crossbar output buffer status monitoring unit 14d is connected to the output buffer unit 13d.
Monitor the status of a, 13b, and 13c. Then, the other crossbar output buffer status monitoring units 14a, 14b, 14
Each of c and 14d compares the results obtained for each connection destination of the output buffer to determine the maximum number of write requests. Then, the other crossbar output buffer state monitoring unit 1
4a, 14b, 14c, and 14d are output buffer busy generators 15a, 15b, 15c, and 1 respectively.
Notify 5d.

For example, the other crossbar output buffer state monitoring unit 14b determines that three, zero, zero, and one requests have been written to each output buffer of the output buffer unit 13a.
The number of requests written to each output buffer of the output buffer unit 13c is one, one, one, and one, and the number of requests written to each output buffer of the output buffer unit 13d is one. , One, one, and one are detected. Then, these results are compared for each connection destination of the output buffer, and the input buffers 201 and 201 are compared.
It is determined that the maximum number of write requests respectively corresponding to 11, 221 and 231 is 3, 1, 1, and 1, and the output buffer busy generation unit 15b is notified.

Output buffer busy generators 15a, 15
b, 15c, and 15d are other crossbar output buffer state monitoring units 14a, 14b, 14c, and 14 respectively.
d), and receives the information on the maximum number of write requests notified from the crossbar switches 12a, 12b, 12b.
c and 12d, the number of own crossbar output request information 12-1 from the output buffer units 13a, 13b, 13c,
And cross-bar request usage number information 13 from 13d
In response to -1, it is determined whether to output an output buffer busy signal.

More specifically, the output buffer busy generator 1
5a, 15b, 15c, and 15d indicate the number of requests written in the output buffer units 13a, 13b, 13c, and 13d (the number of own crossbar requests used),
The maximum number of write requests is compared between devices having the same connection destination of the output buffer. When the maximum number of write requests is larger than the number of own crossbar requests used, and the maximum number of write requests is two or more and there is a request to be written to the corresponding output buffer, the corresponding output buffer An output buffer busy signal is generated to stop writing data to the buffer.

For example, the output buffer busy generator 15b
Indicates that the maximum number of write requests is 3
, One, one, and one are notified. Further, the output buffer busy generation unit 15b determines from the own crossbar request usage number information 13-1 that the number of requests written in the output buffer unit 13b is one, one, one, and one for each output buffer. Know that it is one. Further, own crossbar output request number information 12-1
Therefore, the number of requests to be written to the output buffer unit 13b at the next operation timing is
It is known that there are three, zero, zero, and one. Then, the output buffer busy generation unit 15b determines that the maximum number of write requests for the output buffer connected to the input buffer unit 201 is 2 or more and larger than the number of used crossbar requests, and there is a request to be written next. I do. As a result, the output buffer busy generation unit 15b outputs the output buffer unit 13 so as to prohibit writing to the output buffer connected to the input buffer unit 201.
b and the output buffer busy signals 15-1 and 15-2 to the crossbar switch 12b. Similarly, the output buffer busy generation units 15c and 15d also prohibit writing to the output buffer connected to the input buffer unit 201.

The output buffer busy generator 15a,
15b, 15c and 15d are output buffer units 13
When the number of requests written in a, 13b, 13c, and 13d and the number of own crossbar output requests to be written from now on are summed up, and the sum exceeds the maximum number of output buffer usable requests, Output buffer busy signals 15-1 and 15-2 for inhibiting writing to the output buffer are output to output buffer unit 13b.
And the crossbar switch 12b. Such a situation is not assumed in FIG.

As described above, the input buffer unit 201
When the writing to the output buffer connected to the target buffer is prohibited, the writing from the crossbar switch 12 cannot be performed to the target output buffer. At that time, the crossbar switch 12 cannot transfer the request to be output to the target output buffer from the input buffer unit 11 to the output buffer unit 13. That is, the request that cannot be passed through the crossbar switch 12 is held in the input buffer unit 11 as it is.

As described above, the output buffer units 13b, 1
3c and 13d, writing to the output buffer connected to the input buffer unit 201 is prohibited.
At the next operation timing, the output buffer units 13a, 13
The instructions written in the buffers b, 13c, and 13d are input buffer units 201, 202, 203, one by one.
And 204, and the input buffer unit 11
Among the instructions stored in the a, 11b, 11c, and 11d, only the instruction to be output to the input buffer units 211, 221 and 231 is the crossbar switch 12a,
The data is transferred to output buffer units 13a, 13b, 13c, and 13d via 12b, 12c, and 12d, respectively. The result is shown in FIG.

In the state shown in FIG. 6, the output buffer 13a
The output buffer connected to the input buffer unit 201 includes:
There are still two requests addressed to output port "a". Also, the output buffer units 13b, 13c, and 13d
However, there is no request in the output buffer connected to the input buffer unit 201. Further, the input buffer units 11b, 11c, and 11d have the input buffer unit 2 of the output buffer units 13b, 13c, and 13d, respectively.
There is a request to write to the output buffer connected to 01. That is, in the state shown in FIG. 6, the output buffer busy signal generated in the state shown in FIG. 5 is maintained.

At the next operation timing, the crossbar switches 202, 212, 222, and 232 send the instructions stored in the input buffer sections 201, 211, 221 and 231 to the output buffer section in accordance with their respective destinations. 203, 213, 223 and 233. At the same time, the output buffer units 13a, 13b, 13c, and 13
The instruction written in each buffer of d is output to the input buffer units 201, 202, 203 and 204 one by one. At this time, the input buffer units 11a, 11b, 11
Among the requests stored in c and 11d,
Since there is no request to be transferred to the input buffer units 211, 221 and 231, the output buffer unit 13
Writing to a, 13b, 13c, and 13d is not performed. The above results are shown in FIG.

In the state of FIG. 7, the output buffer 13a
The number of requests written to the output buffer connected to the input buffer unit 201 is one. That is, at the next operation timing, this request is output to the next processing stage. Therefore, the output buffer busy signal generated in the state of FIG.
Output buffer busy generators 15b, 15c and 15d
Is not output, and writing of the output buffer units 13b, 13c, and 13d to the output buffer connected to the input buffer unit 201 is permitted.

Output buffer units 13b, 13c and 13
As a result, the request remaining in the input buffers 11b, 11c, and 11d at the next operation timing is changed to the crossbar switches 12b, 12d at the next operation timing.
output buffer units 13b, 13d by c and 12d
c, and 13d. At the same time, the request written to the output buffer of the output buffer unit 13a is written to the input buffer units 201 and 202.
Also, the input buffer units 201, 202, 203, and 2
The request written in 04 is operated by the crossbar switches 202, 212, 222 and 232.
Output buffer units 203 and 21 according to the respective destinations
3, 223, and 233. Furthermore,
The request written to the output buffer units 203, 213, 223, and 233 is output to each output port. FIG. 8 shows the result.

Thereafter, as in the conventional case, the state shown in FIG. 8 is sequentially changed to the states shown in FIGS. 9, 10, and 11.

As shown in FIG. 11, in the multiple crossbar device according to the present embodiment, the phenomenon of overtaking the preceding instruction of the succeeding instruction does not occur as in the conventional multiple crossbar device. That is, according to the multiplex crossbar device of the present embodiment, the requests are output to the output ports in the order of issuance, and the access order can be guaranteed.

Next, a second embodiment of the present invention will be described with reference to FIG.

The small-scale crossbar device 20 shown in FIG.
In addition to the configuration of the small-sized crossbar device 10, a decoding unit 21 and a busy generation instructing unit 22 are provided.

The decoding unit 21 determines the instruction type of the crossbar input request stored in the input buffer unit 11 and sends the instruction type information to the busy generation mode instruction unit 22.

The busy generation method instructing unit 22 determines a busy generation method based on the instruction type information sent from the decoding unit 21 and notifies the output buffer busy generation unit 15. Here, as the busy generation method, there are an order guarantee method for guaranteeing the access order as in the first embodiment, and a non-order guarantee method for preventing only the overflow of the output buffer unit 13 without guaranteeing the access order. is there.

Normally, when a memory access from the CPU to the main storage device is performed by a vector instruction, a head address and a distance between elements are specified, and the memory access is continuously performed to the equally-spaced memory area. In this case, unless the inter-element distance is 0, the same address is not accessed a plurality of times by this memory access instruction. When the memory access instruction is a read instruction (load instruction), there is no problem even if the order of the preceding instruction and the succeeding instruction for the same address is switched. Therefore, even in such a case,
In the multistage crossbar device, it is not necessary to guarantee the access order. Therefore, in the present embodiment, the decoding unit performs different operations depending on whether or not the instruction sequence has no problem even if the access order to the same output port (the output order of the requests) is different from the request issuance order. The instruction type is determined by 21 and the instruction type information is sent to the busy generation mode instruction unit 22. Busy generation method instruction unit 22
Instructs the output buffer busy generation unit 15 to perform an operation using the non-access order guarantee method when it is not necessary to guarantee the access order. As a result, although the access order is not guaranteed, high-speed processing can be performed and the performance can be improved.

The output buffer busy generation unit 15
When switching from the access order guarantee method to the non-access order guarantee method, the output buffer unit 1 of the own crossbar is used.
Until all of the requests written in No. 3 are lost and the maximum number of write request information sent from the other crossbar output buffer status monitoring unit 14 becomes all zero, writing to all output buffers of the output buffer unit 13 is performed. To generate an output buffer busy signal. This is to prevent a request determined not to require access order assurance from being output to an output port overtaking a previous request determined to require access order assurance.

Next, a third embodiment of the present invention will be described with reference to FIG.

The small-size crossbar device 30 shown in FIG.
The crossbar configuration information holding unit 31 is added to the second small scale crossbar device 20.

The crossbar configuration information holding unit 31 holds information such as the configuration of a multi-stage crossbar device using this small scale crossbar device and crossbar groups for which the order of requests must be guaranteed.

In the multistage crossbar device, when the physical connection is changed, or when the method of guaranteeing the access order by software such as the OS is changed, the crossbar group for which the order of the requests needs to be guaranteed. Will be changed. In some cases, preprocessing of input to each crossbar of the multi-stage crossbar device guarantees that a certain crossbar group and another crossbar group will not access the same address. In such a case, the information held in the crossbar configuration information holding unit 31 is used to change or select the small crossbar device monitored by the other crossbar output buffer state monitoring unit 14 without changing the physical connection. Is used.

For example, when the first to fourth small crossbar devices form one crossbar group, each small crossbar device monitors the state of the output buffer section of the other three small crossbar devices. Information is set in the crossbar configuration information holding unit 31 so as to perform the operation. In this state, the request input to the first and second small crossbar devices and the request input to the third and fourth small crossbar devices can access the same address only mutually exclusively. If this is guaranteed by the OS or the like, the crossbar group can be changed only by resetting the information in the crossbar configuration information holding unit 31 of each small scale crossbar device without changing the physical connection. . In other words, the first and second small-scale crossbar devices mutually monitor the status of the output buffer unit to guarantee the request order, and the third and fourth small-size crossbar devices also monitor the status of the output buffer unit. To guarantee the order of requests.

[0064]

According to the present invention, the other crossbar output buffer status monitoring means for monitoring the status of the output buffer section of another small crossbar device is provided in the small crossbar device constituting the multistage crossbar device. The order of requests issued at different timings can be guaranteed without performing complicated control.

Further, according to the present invention, high-speed processing becomes possible by determining the instruction type of the request held in the input buffer unit and performing the request order assurance operation.

[Brief description of the drawings]

FIG. 1 is a block diagram of a small-scale crossbar device according to an embodiment of the present invention.

FIG. 2 is a block diagram for explaining connection when configuring a multi-stage crossbar device using the small-scale crossbar device of FIG. 1;

FIG. 3 is a circuit diagram showing a configuration example of an output buffer busy generator of FIG. 1;

FIG. 4 is a diagram for explaining the operation of a multi-stage crossbar device using the small-scale crossbar device of FIG. 1;

5 is a diagram for explaining the operation of a multi-stage crossbar device using the small-scale crossbar device of FIG. 1;

FIG. 6 is a diagram for explaining the operation of a multi-stage crossbar device using the small-scale crossbar device of FIG. 1;

FIG. 7 is a diagram for explaining an operation of a multi-stage crossbar device using the small-scale crossbar device of FIG. 1;

FIG. 8 is a diagram for explaining the operation of a multi-stage crossbar device using the small-scale crossbar device of FIG. 1;

FIG. 9 is a diagram for explaining the operation of a multi-stage crossbar device using the small-scale crossbar device of FIG. 1;

FIG. 10 is a diagram for explaining the operation of a multistage crossbar device using the small-scale crossbar device of FIG. 1;

FIG. 11 is a diagram for explaining the operation of a multi-stage crossbar device using the small-scale crossbar device of FIG. 1;

FIG. 12 is a block diagram of a small scale crossbar device according to a second embodiment of the present invention.

FIG. 13 is a block diagram of a small-scale crossbar device according to a third embodiment of the present invention.

FIG. 14 is a block diagram illustrating a multi-stage crossbar device.

FIG. 15 shows a case where the request order is not guaranteed.
FIG. 5 is a diagram for explaining the operation of the multistage crossbar device of FIG.

FIG. 16 shows a case where the request order is not guaranteed.
FIG. 5 is a diagram for explaining the operation of the multistage crossbar device of FIG.

FIG. 14 illustrates a case where the request order is not guaranteed.
FIG. 5 is a diagram for explaining the operation of the multistage crossbar device of FIG.

FIG. 18 illustrates a case where the request order is not guaranteed.
FIG. 5 is a diagram for explaining the operation of the multistage crossbar device of FIG.

FIG. 19 is a diagram when request order guarantee is not performed.
FIG. 5 is a diagram for explaining the operation of the multistage crossbar device of FIG.

FIG. 20 is a diagram when request order guarantee is not performed.
FIG. 5 is a diagram for explaining the operation of the multistage crossbar device of FIG.

FIG. 21 illustrates a case where request order guarantee is not performed.
FIG. 5 is a diagram for explaining the operation of the multistage crossbar device of FIG.

FIG. 14 shows a case where the request order is not guaranteed.
FIG. 5 is a diagram for explaining the operation of the multistage crossbar device of FIG.

[Explanation of symbols]

 Reference Signs List 10 small-scale crossbar device 11 input buffer unit 12 crossbar switch 13 output buffer unit 14 other crossbar output buffer state monitoring unit 15 output buffer busy generation unit 20 small-scale crossbar device 21 decoding unit 22 busy generation method instruction unit 30 small-scale crossbar device 31 Crossbar configuration information holding unit 100 Small scale crossbar device 101 Input buffer unit 102 Crossbar switch 103 Output buffer unit 110 Small scale crossbar device 111 Input buffer unit 112 Crossbar switch 113 Output buffer unit 120 Small scale crossbar device 121 Input buffer unit 122 Crossbar switch 123 Output buffer unit 130 Small scale crossbar device 131 Input buffer unit 132 Crossbar switch 133 Output buffer unit 200 Small scale crossbar device 201 Input Buffer unit 202 crossbar switch 203 output buffer unit 210 small-scale crossbar device 211 input buffer unit 212 crossbar switch 213 output buffer unit 220 small-scale crossbar device 221 input buffer unit 222 crossbar switch 223 output buffer unit 230 small-scale crossbar device 231 input buffer unit 232 Crossbar switch 233 Output buffer

Claims (9)

[Claims] An input buffer connected to a plurality of input ports, an output buffer connected to a plurality of output ports, and a crossbar switch for transferring a request held in the input buffer to the output buffer. In the crossbar device having the following, the state of at least one other output buffer unit different from the externally connected output buffer unit is monitored, and the maximum value of the number of requests written to the other output buffer unit is monitored. A crossbar output buffer status monitoring unit that outputs monitoring information indicating the status of the input buffer unit and the output buffer unit based on the monitoring information and the statuses of the input buffer unit and the output buffer unit. An output buffer busy generation unit that stops transfer, and a crossbar device. 2. A decoding unit for decoding a request held in the input buffer unit, and whether the monitoring information is adopted in the output buffer busy generation unit according to the content of the request decoded by the decoding unit. 2. The crossbar device according to claim 1, further comprising: a busy generation method instruction unit for instructing whether or not the busy bar is present. 3. A crossbar configuration information holding section for holding setting information for designating another output buffer section monitored by the other crossbar output buffer state monitoring section, wherein the other crossbar output buffer state monitoring section includes: 3. The crossbar device according to claim 2, wherein only the status of another output buffer unit specified by the setting information is monitored. 4. The output buffer unit has an output buffer corresponding to the plurality of output ports on a one-to-one basis, and the output buffer busy generation unit stops transferring a request from the input buffer unit to the output buffer unit. Is performed for each output buffer.
Two or three crossbar devices. 5. An input buffer connected to a plurality of input ports, an output buffer connected to a plurality of output ports, and a crossbar switch for transferring a request held in the input buffer to the output buffer. In a multi-stage crossbar device in which a plurality of processing stages in which a plurality of crossbar devices are arranged are connected in multiple stages, each of the crossbar devices monitors a state of an output buffer unit of another crossbar device belonging to the same processing stage, and Another crossbar output buffer status monitoring unit that outputs monitoring information representing the maximum value of the number of requests written to the output buffer unit, based on the monitoring information, and the statuses of the input buffer unit and the output buffer unit. An output buffer busy generation unit for stopping transfer of a request from the input buffer unit to the output buffer unit; Multistage crossbar and wherein the digit. 6. In each of the crossbar devices, a decoding unit for decoding a request held in the input buffer unit, and an output buffer busy generation unit according to the content of the request decoded by the decoding unit. 6. The multi-stage crossbar device according to claim 5, further comprising: a busy generation method instruction unit that instructs whether to adopt the monitoring information. 7. Each of the crossbar devices is provided with a crossbar configuration information holding unit for holding setting information for designating another output buffer unit monitored by the other crossbar output buffer state monitoring unit, 7. The multi-stage crossbar device according to claim 6, wherein the buffer state monitoring unit monitors only the state of another output buffer unit specified by the setting information. 8. The output buffer unit of each of the crossbar devices has an output buffer corresponding to the plurality of output ports on a one-to-one basis. 8. The multi-stage crossbar device according to claim 5, wherein the transfer of the request to the multi-stage crossbar is stopped for each output buffer. 9. A plurality of CPUs, a plurality of access means for accessing a single main storage device in parallel, and said plurality of CPs
An information processing apparatus comprising: the multi-stage crossbar device according to claim 5, 6, 7, 7, or 8 connected between U and the plurality of access means.