JP2000174343A5 - - Google Patents
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- JP2000174343A5 JP2000174343A5 JP1999184602A JP18460299A JP2000174343A5 JP 2000174343 A5 JP2000174343 A5 JP 2000174343A5 JP 1999184602 A JP1999184602 A JP 1999184602A JP 18460299 A JP18460299 A JP 18460299A JP 2000174343 A5 JP2000174343 A5 JP 2000174343A5
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- JP
- Japan
- Prior art keywords
- nitride semiconductor
- mask pattern
- substrate
- producing
- nth
- Prior art date
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- 239000004065 semiconductor Substances 0.000 description 33
- TWXTWZIUMCFMSG-UHFFFAOYSA-N nitride(3-) Chemical compound [N-3] TWXTWZIUMCFMSG-UHFFFAOYSA-N 0.000 description 32
- 238000004519 manufacturing process Methods 0.000 description 17
- 239000000758 substrate Substances 0.000 description 14
- 239000000126 substance Substances 0.000 description 3
- 230000002401 inhibitory effect Effects 0.000 description 2
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Chemical compound [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910004541 SiN Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- -1 nitride compound Chemical class 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 229910052596 spinel Inorganic materials 0.000 description 1
- 239000011029 spinel Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
Description
【特許請求の範囲】
【請求項１】
基板上方に、成長抑制効果を有する物質からなる第ｎ（ただし、ｎは１以上の正数）のマスクパターンと第ｎのマスクパターンを覆うように窒化物半導体膜とを形成する第ｎ工程と、前記第ｎ工程によって形成された前記窒化物半導体膜上に成長抑制効果を有する物質からなる第ｎ＋１のマスクパターンと第ｎ＋１のマスクパターンを覆うように窒化物半導体膜とを形成する第ｎ＋１工程とを有することを特徴とする窒化物半導体の製造方法。
【請求項２】
第ｎ工程で形成される第ｎのマスクパターンと第ｎ＋１のマスクパターンが互いにねじれの関係にあることを特徴とする請求項１に記載の窒化物半導体の製造方法。
【請求項３】
前記第ｎのマスクパターンのストライプ方向と第ｎ＋１のマスクパターンのストライプ方向が互いに１２０度の角度差を持つことを特徴とする請求項１または２に記載の窒化物半導体の製造方法。
【請求項４】
前記第ｎのマスクパターンのストライプ方向と第ｎ＋１のマスクパターンのストライプ方向が互いに９０度の角度差を持つことを特徴とする請求項１または２に記載の窒化物半導体の製造方法。
【請求項５】
第ｎ＋１のマスクパターンのストライプ幅が、第ｎのマスクパターンのストライプ幅以上であることを特徴とする請求項１から４のいずれかに記載の窒化物半導体の製造方法。
【請求項６】
前記成長抑制効果を有する物質がＳｉＯ2、又は、ＳｉＮxであることを特徴とする請求項１から５のいずれかに記載の窒化物半導体の製造方法。
【請求項７】
前記第ｎのマスクパターンのストライプ方向が、窒化物半導体結晶の＜１−１００＞方向あるいは、＜１１−２０＞方向であることを特徴する請求項１から６のいずれかに記載の窒化物半導体の製造方法。
【請求項８】
前記第１のマスクパターン、第２のマスクパターン、第３のマスクパターンのストライプ方向は、窒化物半導体結晶の［１−１００］、［１０−１０］、［０１−１０］方向の組み合わせからなることを特徴する請求項３に記載の窒化物半導体の製造方法。
【請求項９】
第ｎ工程によって積層された窒化物半導体膜結晶がＡｌxＩｎyＧａzＮ（ｘ＋ｙ＋ｚ＝１；０≦ｘ≦１、０≦ｙ≦１、０≦ｚ≦１）であることを特徴とする請求項１から８のいずれかに記載の窒化物半導体の製造方法。
【請求項１０】
前記第ｎ工程によって積層された窒化物半導体膜、あるいは、前記第ｎ工程によって積層された窒化物半導体層上に積層する窒化物半導体膜が、５μｍ以上の膜厚を有する厚膜窒化物半導体膜であることを特徴とする請求項１から９のいずれかに記載の窒化物半導体の製造方法。
【請求項１１】
前記請求項１から１０のいずれかに記載の窒化物半導体の製造方法を用いて基板を含む窒化物半導体構造を形成し、前記窒化物半導体構造から少なくとも前記基板を除去することによって、窒化物半導体構造の一部を窒化物半導体基板とすることを特徴とする窒化物半導体の製造方法。
【請求項１２】
基板上方に、前記第ｎ＋１工程まで結晶成長させたとき、第１のマスクパターンから第ｎ＋１のマスクパターンが全体として基板を覆うことを特徴とする請求項１から１１のいずれかに記載の窒化物半導体の製造方法。
【請求項１３】
前記第１と第２のマスクパターンの、マスク幅／ピッチで定義されるマスク被覆率が、それぞれ、２０％から８０％であることを特徴とする請求項１から７のいずれかに記載の窒化物半導体の製造方法。
【請求項１４】
上記請求項１から１３のいずれかに記載の窒化物半導体の製造方法を用いて作製された第ｎ工程の窒化物半導体膜の上方に形成された光を発する活性層を有することを特徴とする発光素子。
【請求項１５】
前記基板は、サファイア基板、ＧａＮ基板、ＳｉＣ基板、スピネル基板、ＭｇＯ基板、Ｓｉ基板またはＧａＡｓ基板であることを特徴とする請求項１から１３のいずれかに記載の窒化物半導体の製造方法。
【請求項１６】
第１のマスクパターンのマスク被覆率が、第２のマスクパターンのマスク被覆率以下であることを特徴とする請求項１３に記載の窒化物半導体の製造方法。
[Claims]
[Claim 1]
The nth step of forming an nth (where n is a positive number of 1 or more) mask pattern made of a substance having a growth inhibitory effect and a nitride semiconductor film so as to cover the nth mask pattern on the substrate. The n + 1 step of forming the n + 1 mask pattern made of a substance having a growth inhibitory effect on the nitride semiconductor film formed by the nth step and the nitride semiconductor film so as to cover the n + 1 mask pattern. A method for producing a nitride semiconductor, which comprises.
2.
The method for producing a nitride semiconductor according to claim 1, wherein the nth mask pattern and the n + 1th mask pattern formed in the nth step have a twisting relationship with each other.
3.
The method for producing a nitride semiconductor according to claim 1 or 2, wherein the stripe direction of the nth mask pattern and the stripe direction of the n + 1 mask pattern have an angle difference of 120 degrees from each other.
4.
The method for producing a nitride semiconductor according to claim 1 or 2, wherein the stripe direction of the nth mask pattern and the stripe direction of the n + 1 mask pattern have an angle difference of 90 degrees from each other.
5.
The method for producing a nitride semiconductor according to any one of claims 1 to 4, wherein the stripe width of the n + 1 mask pattern is equal to or larger than the stripe width of the nth mask pattern.
6.
The method for producing a nitride semiconductor according to any one of claims 1 to 5, wherein the substance having a growth suppressing effect is SiO 2 or SiN x.
7.
The nitride semiconductor according to any one of claims 1 to 6, wherein the stripe direction of the nth mask pattern is the <1-100> direction or the <11-20> direction of the nitride semiconductor crystal. Manufacturing method.
8.
The stripe direction of the first mask pattern, the second mask pattern, and the third mask pattern is composed of a combination of the [1-100], [10-10], and [01-10] directions of the nitride semiconductor crystal. The method for producing a nitride semiconductor according to claim 3, wherein the method is characterized by the above.
9.
Characterized in that it is a; (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ z ≦ 1 x + y + z = 1) nitride was deposited by the n steps semiconductor film crystal Al x In y Ga z N The method for producing a nitride semiconductor according to any one of claims 1 to 8.
10.
The nitride semiconductor film laminated by the nth step or the nitride semiconductor film laminated on the nitride semiconductor layer laminated by the nth step is a thick nitride semiconductor film having a film thickness of 5 μm or more. The method for producing a nitride semiconductor according to any one of claims 1 to 9, wherein the nitride semiconductor is produced.
11.
By the forming of the nitride semiconductor structure including a substrate with a nitride semiconductor manufacturing method according to any one of claims 1 to 10, removing at least said substrate from said nitride semiconductor structure, nitride compound semiconductor A method for manufacturing a nitride semiconductor, characterized in that a part of the structure is a nitride semiconductor substrate.
12.
The nitride according to any one of claims 1 to 11, wherein when the crystal is grown on the substrate up to the n + 1 step, the first mask pattern to the n + 1 mask pattern covers the substrate as a whole. Semiconductor manufacturing method.
13.
The nitride according to any one of claims 1 to 7, wherein the mask coverage defined by the mask width / pitch of the first and second mask patterns is 20% to 80%, respectively. Manufacturing method of physical semiconductors.
14.
It is characterized by having a light-emitting active layer formed above the nitride semiconductor film of the nth step produced by using the method for producing a nitride semiconductor according to any one of claims 1 to 13. Light emitting element.
15.
The method for producing a nitride semiconductor according to any one of claims 1 to 13, wherein the substrate is a sapphire substrate, a GaN substrate, a SiC substrate, a spinel substrate, an MgO substrate, a Si substrate, or a GaAs substrate.
16.
The method for producing a nitride semiconductor according to claim 13, wherein the mask coverage of the first mask pattern is equal to or less than the mask coverage of the second mask pattern.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18460299A JP4255168B2 (en) | 1998-06-30 | 1999-06-30 | Nitride semiconductor manufacturing method and light emitting device |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18346898 | 1998-06-30 | ||
| JP10-183468 | 1998-06-30 | ||
| JP18460299A JP4255168B2 (en) | 1998-06-30 | 1999-06-30 | Nitride semiconductor manufacturing method and light emitting device |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2000174343A JP2000174343A (en) | 2000-06-23 |
| JP2000174343A5 true JP2000174343A5 (en) | 2006-01-26 |
| JP4255168B2 JP4255168B2 (en) | 2009-04-15 |
Family
ID=26501891
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18460299A Expired - Fee Related JP4255168B2 (en) | 1998-06-30 | 1999-06-30 | Nitride semiconductor manufacturing method and light emitting device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4255168B2 (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6335546B1 (en) * | 1998-07-31 | 2002-01-01 | Sharp Kabushiki Kaisha | Nitride semiconductor structure, method for producing a nitride semiconductor structure, and light emitting device |
| JP2003007999A (en) * | 2001-06-26 | 2003-01-10 | Sony Corp | Iii-v nitride-based compound semiconductor substrate, its manufacturing method, method of manufacturing semiconductor light emitting element, and method of manufacturing semiconductor device |
| CN101931039B (en) * | 2010-08-23 | 2012-07-25 | 安徽三安光电有限公司 | Gallium nitride based light emitting diode with double-layer staggered perforated holes and manufacturing process thereof |
| CN102723406B (en) * | 2011-03-29 | 2017-07-07 | 清华大学 | Semiconductor extension structure |
| WO2013114152A1 (en) * | 2012-01-31 | 2013-08-08 | Soitec | Photoactive devices with improved distribution of charge carriers, and methods of forming same |
| KR101523084B1 (en) * | 2013-10-31 | 2015-05-26 | 광주과학기술원 | SUBSTRATE FOR GROWTH, LIGHT EMITTING DIODE AND METHOD FOR MANUFACTURING GaN LIGHT EMITTING DIODE |
| CN106981415A (en) * | 2017-04-19 | 2017-07-25 | 华南理工大学 | The gallium nitride film and its nanometer epitaxial lateral overgrowth method of GaN HEMTs |
-
1999
- 1999-06-30 JP JP18460299A patent/JP4255168B2/en not_active Expired - Fee Related
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