JP2000173941A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP2000173941A JP2000173941A JP11343421A JP34342199A JP2000173941A JP 2000173941 A JP2000173941 A JP 2000173941A JP 11343421 A JP11343421 A JP 11343421A JP 34342199 A JP34342199 A JP 34342199A JP 2000173941 A JP2000173941 A JP 2000173941A
- Authority
- JP
- Japan
- Prior art keywords
- dopant
- gan
- semiconductor device
- use according
- acceptor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 25
- 239000002019 doping agent Substances 0.000 claims abstract description 20
- 239000012535 impurity Substances 0.000 claims abstract description 16
- 239000000463 material Substances 0.000 claims abstract description 14
- 238000004519 manufacturing process Methods 0.000 claims abstract description 4
- 229910052749 magnesium Inorganic materials 0.000 claims description 6
- 229910052790 beryllium Inorganic materials 0.000 claims description 5
- 229910052793 cadmium Inorganic materials 0.000 claims description 3
- 229910052738 indium Inorganic materials 0.000 claims description 3
- 229910052725 zinc Inorganic materials 0.000 claims description 2
- 238000000034 method Methods 0.000 claims 2
- 150000001875 compounds Chemical class 0.000 abstract description 5
- 239000000370 acceptor Substances 0.000 description 9
- 230000004913 activation Effects 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000011065 in-situ storage Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 150000002902 organometallic compounds Chemical class 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/2654—Bombardment with radiation with high-energy radiation producing ion implantation in AIIIBV compounds
- H01L21/26546—Bombardment with radiation with high-energy radiation producing ion implantation in AIIIBV compounds of electrically active species
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/207—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds further characterised by the doping material
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- High Energy & Nuclear Physics (AREA)
- Ceramic Engineering (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Manufacturing & Machinery (AREA)
- Led Devices (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は半導体装置に関し、
特にGaNを主成分とする化合物半導体のマルチプルド
ーピングに関する。The present invention relates to a semiconductor device,
In particular, it relates to multiple doping of a compound semiconductor containing GaN as a main component.
【0002】[0002]
【背景技術および発明が解決しようとする課題】GaN
を主成分とする発光装置の現在の問題は、p型のGaN
を主成分とする化合物半導体中の不純物のドーピングレ
ベルが低いこと、および移動度が小さいことである。BACKGROUND ART AND PROBLEMS TO BE SOLVED BY THE INVENTION
The current problem with light emitting devices based on
Is low and the mobility is low.
【0003】[0003]
【課題を解決するための手段】<この問題に対する我々
の理論的および実際的なアプローチ>GaNは高弾性率
を持つ非常に硬い物質である。この理由のために、不純
物と母格子原子の共有結合原子半径の差rに起因する不
純物に関係する弾性エネルギーが、不純物の溶解度を著
しく低下させたり、不純物を補償する空格子点の形成を
開始させたりし得る。SUMMARY OF THE INVENTION Our Theoretical and Practical Approach to this Problem GaN is a very hard material with a high modulus. For this reason, the elastic energy associated with the impurity due to the difference r in the covalent radius of the covalent bond between the impurity and the mother lattice atom can significantly reduce the solubility of the impurity or start forming vacancies to compensate for the impurity. Or you can let.
【0004】この望ましくない作用を克服するために、
我々は、反対符号のrを持つ不純物元素を用いるマルチ
プルドーピングを提案する。これは、より高いドーピン
グレベルとより小さい不純物の結合エネルギー(ドーピ
ングレベルがモット転移に近づくことによる)のため
に、不純物に関係する弾性エネルギーを低下させ、より
高い伝導率を得ることを可能にする。不純物の錯体に伴
うひずみエネルギーは、次式のように見積もることがで
きる。To overcome this undesirable effect,
We propose multiple doping using an impurity element having the opposite sign r. This makes it possible to lower the elastic energy associated with the impurities and obtain higher conductivity due to the higher doping levels and the binding energies of the smaller impurities (due to the doping levels approaching the Mott transition). . The strain energy associated with the complex of the impurity can be estimated as in the following equation.
【0005】[0005]
【数1】 (Equation 1)
【0006】ここで、Nは錯体中の不純物原子の数、r
iは不純物の共有結合半径、Eはヤング率、νはポアソ
ン比である。Here, N is the number of impurity atoms in the complex, r
i is the covalent radius of the impurity, E is Young's modulus, and ν is Poisson's ratio.
【0007】対応する溶解度の低下は次式に示す係数F
1で与えられる。[0007] The corresponding decrease in solubility is a factor F
It is given by 1.
【0008】F1 〜 exp(ΔE/kT) 空格子点によるアクセプタ補償の減少は次式に示す係数
F2で与えられる。F 1 -exp (ΔE / kT) The reduction of acceptor compensation due to vacancies is given by the coefficient F 2 shown in the following equation
【0009】F2 〜 exp(−ΔU/kT)+[1−exp
(U/kT)]NA/NA (uncomp) ここで、ΔUは、空格子点生成エネルギーの変化であ
り、次式で与えられる。F 2 -exp (-ΔU / kT) + [1-exp
(U / kT)] N A / N A (uncomp) where ΔU is a change in vacancy generation energy and is given by the following equation.
【0010】ΔU 〜 πEri(ri−ri (0))2(1−
ν)/(1−2ν)(3−ν) そして、NA はアクセプタの総数、NA (uncomp)=NA−
Nvは補償されていないアクセプタの数である。[0010] ΔU ~ πEr i (r i -r i (0)) 2 (1-
ν) / (1-2ν) (3-ν) N A is the total number of acceptors, and N A (uncomp) = N A −
N v is the number of uncompensated acceptors.
【0011】GaNでは、rGa=1.26Å,rN=
0.74Åである。800℃付近の成長温度での、使用
できるアクセプタ型ドーパントに対する弾性エネルギー
を表1に示す。In GaN, r Ga = 1.26Å, r N =
0.74 °. Table 1 shows the elastic energies for the acceptor-type dopants that can be used at a growth temperature around 800 ° C.
【0012】[0012]
【表1】 [Table 1]
【0013】使用できるドナー型ドーパントに対する弾
性エネルギーを表2に示す。Table 2 shows the elastic energies for the donor type dopants that can be used.
【0014】[0014]
【表2】 [Table 2]
【0015】このアプローチにおいて、我々は、良好な
伝導率を持つp型GaNの製造の問題は、ドーピング原
子の共有結合半径と母材原子の共有結合半径の大きな差
に原因があると考えることができる。In this approach, we believe that the problem of producing p-type GaN with good conductivity is due to the large difference between the covalent radius of the doping atoms and the covalent radius of the parent atom. it can.
【0016】この差が、高添加レベルにおける強いひず
み場の発生を引き起こす。転位の進行やショットキー欠
陥の発生によるひずみの緩和は、アクセプタを補償する
大きい空格子点濃度の発生の原因となる(この状況は大
きな不整合があるときのエピタキシャル成長にいくらか
類似している)。This difference causes the generation of a strong strain field at high loading levels. Relaxation of the strain due to the progression of dislocations and the generation of Schottky defects causes the generation of large vacancy concentrations that compensate for the acceptor (this situation is somewhat similar to epitaxial growth with large mismatch).
【0017】[0017]
【発明の実施の形態】本発明の1態様によれば、錯体の
平均共有結合半径を整合させるマルチプルドーピングの
使用が提供される。この結果は、 1.ひずみの低減およびドナー[n型GaN]またはア
クセプタ[p型GaN]の溶解度の増大。According to one aspect of the present invention, there is provided the use of multiple doping to match the average covalent radius of the complex. The results are: Reduce strain and increase solubility of donor [n-type GaN] or acceptor [p-type GaN].
【0018】2.結合長のより良い整合がドナー不純物
の周りの格子の非対称な緩和を減少させることによる、
ドナーにおける電子の結合エネルギーの低下。ホールと
アクセプタの間の結合エネルギーに対しても同じことが
成り立つ。2. Better matching of bond lengths by reducing asymmetric relaxation of the lattice around the donor impurity,
Decrease in electron binding energy at the donor. The same holds for the binding energy between the hole and the acceptor.
【0019】3.空格子点によるドナーまたはアクセプ
タ補償の低下。3. Reduction of donor or acceptor compensation due to vacancies.
【0020】本発明は、GaN,AlN,およびInN
を母材とするIII−V族の半導体装置の製造に使用する
ことができる。The present invention provides GaN, AlN, and InN
Can be used for the manufacture of a III-V group semiconductor device using as a base material.
【0021】GaNを母材とする半導体装置へのp型ド
ーピングにおいては、ドーパントは半導体物質に含まれ
る最下の1元素または複数の元素よりも1つ下のグルー
プから選択することができ、コドーパント(codopant)
は半導体物質に含まれる最下の1元素または複数の元素
と同じグループから選択できる。In p-type doping of a GaN-based semiconductor device, the dopant can be selected from one or more groups below the lowest element or elements contained in the semiconductor material. (Codopant)
Can be selected from the same group as the lowest element or elements in the semiconductor material.
【0022】GaNを母材とする半導体装置において
は、アクセプタはBe,Mg,ZnおよびCdのうちの
少なくとも1つを用いることができ、コドーパントは
B,AlおよびInのうちの少なくとも1つを用いるこ
とができる。In a semiconductor device using GaN as a base material, the acceptor can use at least one of Be, Mg, Zn and Cd, and the codopant uses at least one of B, Al and In. be able to.
【0023】GaNを母材とする半導体装置へのp型ド
ーピングには、ドーパントおよびコドーパントは共に半
導体物質に含まれる最下の1つまたは複数の元素より1
つ下のグループから選択できる。そのドーパントおよび
コドーパントはMg+BeおよびMg+Cdにすること
ができる。In p-type doping of a GaN-based semiconductor device, the dopant and the co-dopant are both one or more of the lowest one or more elements contained in the semiconductor material.
You can choose from the groups below. The dopant and co-dopant can be Mg + Be and Mg + Cd.
【0024】GaNを母材とする半導体装置へのn型ド
ーピングには、ドーパントはGeおよび2Ge+Znの
うちの1つでもよいし両方でもよい。For n-type doping of a semiconductor device using GaN as a base material, the dopant may be one or both of Ge and 2Ge + Zn.
【0025】各ドーパントの割合は、徐徐に変化する伝
導率、矩形波または正弦波で変調された伝導率、または
他の望ましい伝導率の分布を持つ層を形成するために、
伝導層の厚み中で変化させてもよい。The proportions of each dopant can be adjusted to form a layer having a gradually changing conductivity, a conductivity modulated with a square or sine wave, or any other desired distribution of conductivity.
It may be varied in the thickness of the conductive layer.
【0026】ドナー補償においては、補償されないドナ
ーの濃度の増加は次式に示す係数F 2で与えられる。In donor compensation, the uncompensated donor
The increase in the concentration of- TwoGiven by
【0027】F2 〜 exp(−ΔU/kT)+[1−exp
(−ΔU/kT)]ND/ND (uncom p) ここで、ΔUは空格子点生成エネルギーの変化、NDは
ドナーの総数、そして ND (uncomp)=ND−Nvは補償されていないドナーの数
である。F 2 -exp (-ΔU / kT) + [1-exp
(-ΔU / kT)] N D / N D (uncom p) where, .DELTA.U change in vacancy formation energy, N D is the total number of donors, and N D (uncomp) = N D -N v compensation The number of donors that have not been done.
【0028】したがって、このひずみエネルギーモデル
は、高効率のp型またはn型のGaNを母材とする化合
物半導体または他の広バンドギャップ材料のための新し
いマルチプルドーピングの配合表を作成するための非常
に簡単で有効な道具となる。Thus, this strain energy model is very useful for creating a new multiple doping recipe for highly efficient p-type or n-type GaN based compound semiconductors or other wide bandgap materials. It is a simple and effective tool.
【0029】本発明のもう1つの態様によれば、GaN
を母材とする化合物半導体へのp型ドーピングのための
好適な候補は、Mg+Al,Be+In,Mg+B,M
g+CdおよびMg+Beである。ドーピングは、イオ
ン注入、有機金属化合物を用いるインシツ(in situ)
ドーピングまたは熱拡散により行うことができる。これ
らのマルチプルドーピング工程の幾つかにおいては、ア
クセプタを最高度に活性化するために、ポスト・ドーピ
ング熱アニーリングが必要とされるかもしれない。According to another aspect of the invention, GaN
Suitable candidates for p-type doping into a compound semiconductor based on Mg + Al, Be + In, Mg + B, M
g + Cd and Mg + Be. Doping includes ion implantation and in situ using organometallic compounds
This can be done by doping or thermal diffusion. In some of these multiple doping steps, post doping thermal annealing may be required to maximize the activation of the acceptor.
【0030】本発明のもう1つの態様によれば、GaN
を母材とする化合物半導体へのn型ドーピングの好適な
候補はGeおよび2Ge+Znである。添加は、イオン
注入、有機金属化合物を用いるインシツ・ドーピングま
たは熱拡散により行うことができる。これらのマルチプ
ルドーピング工程の幾つかにおいては、ドナーを最高度
に活性化するために、ポスト・ドーピング熱アニーリン
グも必要とされるかもしれない。According to another aspect of the invention, GaN
Preferred candidates for n-type doping of a compound semiconductor based on Ge are Ge and 2Ge + Zn. The addition can be performed by ion implantation, in-situ doping using an organometallic compound, or thermal diffusion. In some of these multiple doping steps, post-doping thermal annealing may also be required to maximize donor activation.
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) (72)発明者 ステファン セン ティエン リー 台湾 台北 チェンカンロード レーン 325 アリー18 29号──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification FI FI Theme Court ゛ (Reference) (72) Inventor Stephen Sentien Lee Taiwan Taipei Chengkang Road Lane 325 Ali 18 29
Claims (8)
せ、ひずみを減少させドナーまたはアクセプタの溶解度
を増大させるように、反対符号のΔr(母材とドーパン
トの共有結合原子半径の差)を持つ前記不純物元素を用
いた、半導体装置の製造における複数のドーパントの使
用。1. To have an opposite sign of Δr (difference in covalent atomic radius between the parent material and the dopant) to match the average covalent radius of the impurity element, reduce strain and increase solubility of the donor or acceptor. Use of a plurality of dopants in manufacturing a semiconductor device using the impurity element.
るIII−V族の半導体装置の製造における請求項1に記
載の使用。2. Use according to claim 1, in the manufacture of III-V semiconductor devices based on GaN, AlN or InN.
ドーピングにおいて、ドーパントが半導体物質に含まれ
る最下の1元素または複数の元素よりも1つ下のグルー
プから選択され、コドーパント(codopant)が半導体物
質に含まれる最下の1元素または複数の元素と同じグル
ープから選択される請求項1または請求項2に記載の使
用。3. In a p-type doping of a GaN-based semiconductor device, the dopant is selected from a group one or more lower than the lowest element or elements contained in the semiconductor material, and is a codopant. 3) is selected from the same group as the bottom element or elements contained in the semiconductor material.
びCdのうちの少なくとも1つであり、コドーパントが
B,AlおよびInのうちの少なくとも1つである、G
aNを母材とする半導体装置への請求項1ないし請求項
3のいずれかに記載の使用。4. The method according to claim 1, wherein said acceptor is at least one of Be, Mg, Zn and Cd, and said co-dopant is at least one of B, Al and In.
The use according to any one of claims 1 to 3, for a semiconductor device using aN as a base material.
ドーピングにおいて、ドーパントおよびコドーパントが
いずれも半導体物質に含まれる最下の1元素または複数
の元素よりも1つ下のグループから選択される、請求項
1または請求項2に記載の使用。5. In p-type doping of a GaN-based semiconductor device, each of a dopant and a co-dopant is selected from a group one below the lowest element or elements contained in the semiconductor material. 3. Use according to claim 1 or claim 2.
が、Mg+BeおよびMg+Cdである、請求項5に記
載の使用。6. The use according to claim 5, wherein said dopant and said co-dopant are Mg + Be and Mg + Cd.
ドーピングにおいて、ドーピングがGeおよび2Ge+
Znのいずれかまたは両方によって行われる、請求項1
または請求項2に記載の使用。7. In n-type doping of a semiconductor device based on GaN, Ge and 2Ge +
2. The method according to claim 1, which is performed by either or both of Zn.
Or the use according to claim 2.
弦波で変調された伝導率、または他の望ましい伝導率分
布を持つ層を形成するように、各ドーパントの割合が伝
導層の厚み中で変えられていることを特徴とする、請求
項1ないし請求項7のいずれかに記載の使用。8. The proportion of each dopant in the thickness of the conductive layer so as to form a layer having a gradually changing conductivity, a conductivity modulated by a square wave or a sine wave, or any other desired conductivity distribution. 8. Use according to any of the preceding claims, characterized in that it has been changed by:
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9826519.2 | 1998-12-02 | ||
GBGB9826519.2A GB9826519D0 (en) | 1998-12-02 | 1998-12-02 | Semiconductor devices |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2000173941A true JP2000173941A (en) | 2000-06-23 |
Family
ID=10843534
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11343421A Pending JP2000173941A (en) | 1998-12-02 | 1999-12-02 | Semiconductor device |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP2000173941A (en) |
GB (2) | GB9826519D0 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104183793A (en) * | 2013-05-22 | 2014-12-03 | 海洋王照明科技股份有限公司 | Preparation method for organic light-emitting device |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3812519A (en) * | 1970-02-07 | 1974-05-21 | Tokyo Shibaura Electric Co | Silicon double doped with p and as or b and as |
US4111719A (en) * | 1976-12-06 | 1978-09-05 | International Business Machines Corporation | Minimization of misfit dislocations in silicon by double implantation of arsenic and germanium |
GB2086135B (en) * | 1980-09-30 | 1985-08-21 | Nippon Telegraph & Telephone | Electrode and semiconductor device provided with the electrode |
US4631234A (en) * | 1985-09-13 | 1986-12-23 | Texas Instruments Incorporated | Germanium hardened silicon substrate |
DE68906239T2 (en) * | 1988-10-27 | 1993-08-12 | Fujitsu Ltd | METHOD FOR PRODUCING A BIPOLAR TRANSISTOR WITH A HETEROVER TRANSITION. |
JP2809692B2 (en) * | 1989-04-28 | 1998-10-15 | 株式会社東芝 | Semiconductor light emitting device and method of manufacturing the same |
US5553566A (en) * | 1995-06-22 | 1996-09-10 | Motorola Inc. | Method of eliminating dislocations and lowering lattice strain for highly doped N+ substrates |
EP0807978A3 (en) * | 1996-05-10 | 1997-11-26 | Paul-Drude-Institut für Festkörperelektronik | A method of fabricating a layer of high p-type conductivity in a semiconductor component and a semiconductor component having such a layer |
-
1998
- 1998-12-02 GB GBGB9826519.2A patent/GB9826519D0/en not_active Ceased
-
1999
- 1999-12-02 JP JP11343421A patent/JP2000173941A/en active Pending
- 1999-12-02 GB GB9928532A patent/GB2344462B/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
GB9826519D0 (en) | 1999-01-27 |
GB9928532D0 (en) | 2000-02-02 |
GB2344462A (en) | 2000-06-07 |
GB2344462B (en) | 2001-05-16 |
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