JP2000165858A - Image reproducing device, method and medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To allow a single decoding system to decode a plurality of coded data. SOLUTION: A demultiplexer Demux 11 demultiplexes a received transport stream into coded data of each channel and they are stored in VBV buffers 1-1-1-n. A signal changeover device 12 controlled by a switch control device 23 sequentially select data of each channel and a variable length decoder 2 decodes them in time division. A signal changeover device 13 controlled by the switch controller 23 selects the decoded image data of each channel, the selected data are given to image memories 6-1-6-n of corresponding channels and stored in them. A plurality of image signals are read synchronously with each other by a display timing signal outputted from a display controller 22.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image reproducing apparatus, method, and medium, and more particularly, to synchronizing decoded image signals by inputting a plurality of image signals and decoding a plurality of image signals simultaneously. The present invention relates to an image reproducing apparatus and method, and a medium, which are configured to output the same.

[0002]

2. Description of the Related Art FIG. 1 shows an example of the configuration of an image reproducing apparatus. Encoded data encoded by the MPEG (Moving Picture Experts Group) method is converted to VBV (Video Buffering).
Verifier) is input to the buffer 1 and accumulated. The VBV buffer 1 is provided for continuously supplying constant data to the variable length decoder 2 when the encoded data has a variable rate. The variable length decoder 2 decodes the input coded data, outputs an image signal component to the inverse quantizer 3, and outputs a motion vector to the motion compensation predictor 7.

In the inverse quantizer 3, the input signal is inversely quantized. In the inverse DCT (IDCT) unit 4, the DCT (Discrete Cosine Transform) output from the inverse quantizer 3
m) The coefficients are inverse DCT processed. The motion compensation predictor 7 performs motion compensation on the already decoded image signal stored in the image memory 6 according to the motion vector, and generates a prediction signal. The output of the IDCT unit 4 is input to the adder 5,
It is added to the prediction signal output from the motion compensation predictor 7, decoded, and stored in the image memory 6. The image signal stored in the image memory 6 is read therefrom and output to a display unit (not shown) or the like.

[0004]

By the way, in the case of digital satellite broadcasting, a transmission channel corresponding to one transponder includes image signals of a plurality of (for example, three) channels. When simultaneously displaying the images of the three channels as moving images on one multi-screen, the decoding system of one channel shown in FIG. 1 needs three channels. As a result, the equipment becomes expensive,
There is a problem of increasing the size.

The present invention has been made in view of such a situation, and it is an object of the present invention to enable decoding of a plurality of image signals without complicating the configuration or increasing the size or cost of the apparatus. .

[0006]

According to a first aspect of the present invention, there is provided an image reproducing apparatus comprising: an input unit for inputting a plurality of image signals; and a first unit for independently storing the plurality of image signals input by the input unit. Storage means, first selection means for selecting a predetermined signal from a plurality of image signals stored in the first storage means, and decoding means for decoding the image signal selected by the first selection means; Including a second selection unit for selecting a predetermined image signal from image signals decoded by the decoding unit, and a second storage unit for storing the image signal selected by the second selection unit It is characterized by.

[0008] According to another aspect of the present invention, there is provided an image reproducing method comprising: an inputting step of inputting a plurality of image signals; a first storing step of independently storing the plurality of image signals input in the inputting step; A first selection step of selecting a predetermined signal from a plurality of image signals accumulated in the accumulation step, a decoding step of decoding the image signal selected in the first selection step, and a decoding step of And a second storage step of storing the image signal selected in the second selection step.

According to a ninth aspect of the present invention, there is provided a medium program, comprising: an input step of inputting a plurality of image signals; and a first step of independently storing the plurality of image signals input in the input step.
Accumulating step, a first selecting step of selecting a predetermined signal from the plurality of image signals accumulated in the first accumulating step, and a decoding step of decoding the image signal selected in the first selecting step And a second selecting step of selecting a predetermined image signal from the image signals decoded in the decoding step, and a second storing step of storing the image signal selected in the second selecting step. Executing the program.

[0009] The image reproducing apparatus according to claim 1, and claim 8.
In the image reproducing method described in the item (1) and the medium described in the item (9), a plurality of input image signals are respectively stored independently, and a predetermined one is selected from the stored plurality of image signals. The decoded image signal is decoded, and a predetermined image signal is selected from the decoded image signals and stored.

[0010]

FIG. 2 is a block diagram showing a configuration example of an image reproducing apparatus to which the present invention is applied. A transport stream in which image signals of a plurality of channels are multiplexed is input to a demultiplexer (hereinafter, referred to as Demux) 11. In the Demux 11, the image signal of each channel is separated, input to the corresponding VBV buffer 1-1 to VBV buffer 1-n of each channel, and accumulated. The image signals read from the VBV buffers 1-1 to 1-n are input to the signal switch 12 and selected based on a switch switching signal from the switch controller 23. The selected VBV buffer 1-i (i = 1, 2, 2)
,..., N) are input to the variable length decoder 2. Note that the signal switch 12 based on the switch switching signal
The operation of will be described later. The decoding controller 21 controls the VBV buffer 1
Based on the read pointer RP and the write pointer WP output from -1 to 1-n, the VBV buffers 1-1 to 1-n
Controls reading and writing of n.

The functions of the variable length decoder 2 to the motion compensation predictor 7 are the same as those described with reference to FIG.
The description is omitted. The decoded image signal is added to an adder 5
Are input to the signal switch 13 and output from the switch controller 23.
The image data is input to the corresponding one of the image memories 1 to 6-n. Each of the image memories 6-1 to 6-n stores a reference image for two frames composed of an I picture image or a P picture image and an image in a macroblock unit at the time of outputting a B picture in the MPEG system. Holds one field image used for conversion into a unit image. Image memory 6-1
The display timing of the image memory 6-n is controlled based on the display control signal from the display controller 22, and the image memory 6-n outputs an image signal. The image signals output from the image memories 6-1 to 6-n are transmitted to the signal switch 1 controlled by the switch switching signal output from the switch controller 23.
By 4, a channel of a predetermined channel is selected and input to the motion compensation predictor 7. Next, the operation will be described by taking as an example a case where an input transport stream includes an image signal of three channels. The transport stream input to Demux 11 is separated into three encoded data for each channel. The separated first channel data is input to the VBV buffer 1-1,
Stored. The data of the second channel or the third channel is input to the VBV buffer 1-2 or the VBV buffer 1-3 and stored. VBV buffer 1-1
The VBV buffer 1-3 outputs the stored encoded data to the signal switch 12.

In the signal switch 12, first, the encoded data of the first channel output from the VBV buffer 1-1 is selected by the switch switching signal from the switch controller 23 and input to the variable length decoder 2. You. The coded data of the first channel is decoded by the variable length decoder 2 to the motion compensation predictor 7 (this decoding process is the same as that described with reference to FIG. 1 and is omitted), and the signal switch 13 Is output to

In the signal switch 13, an image signal of the first channel is selected by a switch switching signal from the switch controller 23, and is output to the image memory 6-1 and stored. The encoded data of the second channel is decoded in the same manner as the data of the first channel, and is stored in the image memory 6-2 as an image signal. The encoded data of the third channel is decoded and stored in the image memory 6-3.

The display controller 22 simultaneously reads the image signals of the respective channels from the image memories 6-1 to 6-3 at a predetermined display timing. This image signal is synthesized by a circuit (not shown) at a subsequent stage so as to form an image of one screen, and is displayed on the display unit as a multi-screen.

When the image signal of the first channel is motion-compensated, it is already decoded in the signal switch 14 based on the switch control signal output from the switch controller 23 and stored in the image memory 6-1. The selected image signal is input to the motion compensation predictor 7. The same applies to the case where the image signal of the second or third channel is decoded.

As described above, the image reproducing apparatus to which the present invention is applied converts a plurality of encoded data into the signal
Then, the signals are time-division-divided and supplied to a decoding system (variable length decoder 2 to motion compensation predictor 7) for decoding. A plurality of decoded image signals are selected by a signal switch 13, and the image memory 6-1 is selected. The image signals are stored in the image memory 6-n, and the image signals are output from the image memories 6-1 to 6-n while synchronizing the plurality of image signals based on the display control signal from the display controller 22. I do.

Next, a decoding controller 21 for monitoring the memory state of the plurality of VBV buffers 1-1 to 1-n and controlling the writing and reading thereof, and a display control for controlling the display timing of a plurality of image signals. The function of the switch controller 23 for switching encoded data to be output to the encoder 22 and the variable length decoder 2 or for switching a decoded image signal will be further described.

First, the configuration of the decoding controller 21 will be described with reference to FIG. The decoding controller 21 controls the VBV buffer 1
-1 to VBV buffers 1-n include VBV buffer monitoring units 31-1 to 31-n that monitor the respective memory states and control writing and reading. The VBV buffer monitoring unit 31-1 includes a subtractor 50-1 for subtracting the read pointer RP from the write pointer WP, which is input from the VBV buffer 1-1, and a comparator 51- for comparing the subtraction result with a read stop setting value. 1 and a comparator 52-1 for comparing with a read skip setting value. The motion vector absolute value addition circuit 53-1 for adding the absolute value of the motion vector value in one video frame input from the variable length decoder 2 similarly adds the square value of the input motion vector. Motion vector square value addition circuit 54-1
Also have. The values output from the motion vector absolute value addition circuit 53-1 and the motion vector square value addition circuit 54-1 are output to the switch 55-1.

The switch 55-1 outputs a value selected by a controller (not shown) among the two input values to the comparator 56-1. The comparator 56-1 is
The data indicating the amount of motion input from the switch 55-1 is compared with the moving image recognition set value, and the comparison result is output to the switch 57-1. The comparison result output from the comparator 56-1 is used as a signal for controlling the switch 57-1. Based on the control signal, the switch 57-1 outputs a read stop signal from the comparator 51-1 or ,
The skip signal from the comparator 52-1 is transferred to the VBV buffer 1
Output for -1 to 1-n. Although not shown, the VBV buffer monitoring units 31-2 to 31-n have the same configuration as the VBV buffer monitoring unit 31-1.

The memory state of the VBV buffer 1-i includes a write pointer WP (Write Point) indicating a coded data write position input to the VBV buffer 1-i and a read pointer RP (Read Point) indicating a read position. Monitored by comparison.

FIG. 4 shows the memory state of the VBV buffer 1-1.
This will be described with reference to FIG. The VBV buffer 1-1 is configured as a ring memory. Now, it is assumed that the write pointer WP indicates the address 45 and the read pointer RP indicates the address 15. The amount of encoded data written at one time is 5 VBV buffer.
It is assumed to be equivalent to the address. In such a state,
When the first encoded data is input, this data is written from the address 45. When the writing is completed, the write pointer WP is moved to the address 50 next to the last address 49 of the first encoded data. You. Hereinafter, the same operation is repeated.

For the sake of simplicity, one read-out requires 5
Assuming that data for an address is read, when the first read is completed, the read pointer RP becomes
Moved to address 20. Hereinafter, the same operation is repeated.

Writing and reading are performed independently, and the read pointer RP and the write pointer WP are
It works to chase the other. Therefore, the read pointer RP and the write pointer WP of the VBV buffer 1-1 are
, The memory state can be monitored.

In FIG. 3, the difference (WP-RP) between the addresses of the read pointer RP and the write pointer WP is calculated by the subtracter 50-1 of the VBV buffer monitor 31-1.
The signals are input to the comparators 51-1 and 52-1. The comparator 51-1 compares the difference (WP-RP) with the read stop setting value. The comparator 51-1 calculates the difference (WP−
RP) is equal to or smaller than the read stop setting value (when the position of the read pointer RP approaches the position of the write pointer WP more than the threshold), a read stop signal is output to the VBV buffer 1-1. Also, in the comparator 52-1:
The difference (WP-RP) is compared with the read skip setting value. When the difference (WP-RP) is equal to or larger than the read skip setting value (when the position of the write pointer WP approaches the position of the read pointer RP by a threshold or more), the comparator 52-1 stores the difference in the VBV buffer 1-1. Outputs a read skip signal.

The motion vector absolute value addition circuit 53-1
The motion vector value output from the variable length decoder 2 is input,
The sum or partial sum of the absolute values of the motion vectors within one frame of the input video signal is calculated. The motion vector square value addition circuit 54-1 receives the motion vector value output from the variable length decoder 2 and calculates the sum or partial sum of the square values of the motion vector in one frame of the input video signal. I do. The values output from the motion vector absolute value addition circuit 53-1 and the motion vector square value addition circuit 54-1 are selected by the switch 55-1 and output to the comparator 56-1. The comparator 56-1 compares the value output from the switch 55-1 with a preset moving image recognition setting value, and determines that the motion vector calculation result is smaller than the moving image recognition setting value. Then, a signal for closing the switch 57-1 is output to the switch 57-1.

That is, it is determined whether the frame is a moving image or a still image based on the operation result of the motion vector in each frame of the input video signal. Only when it is determined that the frame is a still image, the switch 57-1 is closed and the comparator 57-1 is closed. The read-out stop signal or the read-out skip signal output from the comparator 52-1 and the read-out skip signal are transmitted to VBV buffers 1-1 to 1-
For n, skip and repeat of the input image signal are enabled. In this way, by selectively performing the skip or repeat processing only on the image determined to be a still image, it is possible to reduce the unnaturalness of the seam of the image.

Next, specific examples of the VBV buffers 1-1 to 1-n will be further described with reference to FIG. Since the VBV buffers 1-1 to 1-n basically perform the same processing, only the VBV buffer 1-1 will be described here. When the read stop signal is output, reading of the encoded data from the VBV buffer 1-1 corresponds to a state in which the read is advanced as compared with writing, for example, when the value of the write pointer WP is 45 and the read pointer RP Is 35, and the difference (WP-RP) is +10 (= 45−35), which is equal to or less than the read stop setting value (+10). At this time, the reading is stopped, the image of the same frame is read from the image memories 6-1 to 6-n, and a still image is displayed.

Conversely, when a read skip signal is output, it corresponds to a state in which reading of encoded data from the VBV buffer 1-1 is delayed compared to writing, and for example, the write pointer WP becomes 15 , The read pointer RP becomes 25, and the difference (WP-RP) becomes equal to or more than the read skip setting value (−10). At this time, writing is prioritized, and reading is performed so as to skip reproduction of an image for one frame.

Here, the read stop setting value and the read skip setting value have been described as +10 or -10, but the actual setting value is appropriately set based on the data length of the encoded data. That is, the VBV buffer monitoring unit 31-1
Determines whether the memory state of the VBV buffer 1-1 is normal by monitoring reading and writing of the encoded data from the VBV buffer 1-1.

Next, the display controller 22 will be described with reference to FIG. The display controller 22 controls the PTS (Presentation Time Stam) of each of the plurality of encoded data.
p) PT that inputs a signal and selects one of them
An S selector 61, an STC (System Time Clock) signal of a plurality of encoded data output from the Demux 11, and an STC selector 62 for selecting any one of them, and a PTS output from the PTS selector 61. A match detector 63 is provided for detecting a match between the signal and the STC signal output from the STC selector 62.

In response to a command from the user, the PTS selector 61 selects an arbitrary one of a plurality of encoded data, and the STC selector 62 selects a plurality of encoded data output from the Demux 11. Is selected (usually, the STC signal of the channel selected by the PTS selector 61 is selected). The coincidence detector 63
When the selected PTS and STC match, the display timing signal is output to the image memories 6-1 to 6-n. S
The TC signal indicates a reference time of a plurality of encoded data, and the PTS signal indicates a display time of a decoded image signal. Thereby, a plurality of image signals are output from the image memories 6-1 to 6-n in synchronization with the reference time of the display timing determined by the display controller 22.

As shown in FIG. 6, the display controller 22 can be composed of a clock generating circuit 71 and a frequency dividing circuit 72 for dividing the frequency of a reference clock output from the clock generating circuit 71. In this configuration example, the reference time of the display timing of the plurality of image signals is generated by dividing the reference clock output from the clock generation circuit 71 by an arbitrary value by the frequency dividing circuit 72.

The switch controller 23, based on the variable-length decoding status signal from the variable-length decoder 2, for example, switches the signal switches 12, 13 each time decoding of each encoded data is completed in macroblock units. And a switch switching signal for switching the input signal selections of and 14 in conjunction with each other.

Next, with reference to FIG. 7, a description will be given of a medium used to install a program for executing the above-described series of processing in a computer and make the computer executable.

The program is, as shown in FIG.
It can be provided to the user in a state where it is installed in a hard disk 82 as a recording medium built in the personal computer 81 in advance.

Alternatively, the program is as shown in FIG.
, The floppy disk 83, the CD-ROM 84,
It can be temporarily or permanently stored in a recording medium such as the MO disk 85, the DVD 86, the magnetic disk 87, and the semiconductor memory 88, and can be provided as package software.

Further, as shown in FIG. 7C, the program is transmitted from a download site 91 to the satellite 92 by radio.
Through the personal computer 93,
The data can be transferred to the personal computer 93 by wire or wireless via a network 94 such as a local area network or the Internet, and the personal computer 93 can download the data to a built-in hard disk or the like. The medium in the present specification means a broad concept including all these media.

[0038]

As described above, according to the image reproducing apparatus of claim 1, the image reproducing method of claim 8, and the medium of claim 9, a plurality of image signals are selected and stored. In addition, since decoding is performed, it is possible to suppress the configuration of the decoding system from becoming complicated, and to suppress an increase in the size or cost of the apparatus.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a conventional image reproducing apparatus.

FIG. 2 is a block diagram illustrating a configuration of an image reproducing apparatus to which the present invention has been applied.

FIG. 3 is a block diagram showing a configuration of a decoding controller 21 of FIG.

FIG. 4 is a diagram for explaining processing of a VBV buffer 1-1 in FIG. 2;

FIG. 5 is a block diagram illustrating a configuration of a display controller 22 of FIG. 2;

FIG. 6 is a block diagram showing another configuration of the display controller 22 in FIG. 2;

FIG. 7 is a diagram illustrating a medium.

[Explanation of symbols]

1-1 to 1-n VBV buffer, 2 variable length decoder, 6-1 to 6-n image memory, 11 Demu
x, 12, 13, 14 signal switcher, 21 decoding controller, 22 display controller, 23 switch controller,
31-1 to 31-n VBV buffer monitoring unit, 50-
1 subtractor, 51-1, 52-1 comparator, 61P
TS selector, 62 STC selector, 63 match detector, 71 clock generator, 72 frequency divider

Claims (9)

[Claims] An input unit that inputs a plurality of image signals; a first storage unit that independently stores the plurality of image signals input by the input unit; and an input unit that is stored in the first storage unit. First selecting means for selecting a predetermined signal from the plurality of image signals, decoding means for decoding the image signal selected by the first selecting means, and an image decoded by the decoding means. Image reproduction comprising: second selection means for selecting a predetermined image signal from signals; and second storage means for storing the image signal selected by the second selection means. apparatus. 2. The image reproducing apparatus according to claim 1, further comprising a display control unit that controls display of the image signal stored in the second storage unit. 3. The display control unit controls the display timing of all of the plurality of image signals based on a reference signal included in an arbitrary one of the plurality of image signals. The image reproducing device according to claim 2. 4. The image reproducing apparatus according to claim 2, wherein said display control means controls display timings of said plurality of image signals based on independent reference signals. 5. The image processing apparatus according to claim 1, further comprising an accumulation control unit that detects a state of writing and reading of the image signal by the first accumulation unit and controls the writing and reading. Image playback device. 6. The storage control means stops writing when the write point of the image signal in the first storage means approaches a read point by a predetermined threshold or more, and sets the read point to a write point at a predetermined threshold value. 6. The image reproducing apparatus according to claim 5, wherein the reading is stopped when approaching the above. 7. The storage control unit according to claim 5, wherein the storage control unit controls writing and reading of the first storage unit when it is determined that the image based on the image signal is a still image. Image playback device. 8. An inputting step of inputting a plurality of image signals, a first storing step of independently storing the plurality of image signals input in the inputting step, and a storing step of storing the plurality of image signals in the first storing step. A first selection step of selecting a predetermined signal from the plurality of image signals, a decoding step of decoding the image signal selected in the first selection step, and an image decoded in the decoding step. An image reproducing method comprising: a second selecting step of selecting a predetermined image signal from signals; and a second storing step of storing the image signal selected in the second selecting step. Method. 9. An inputting step of inputting a plurality of image signals, a first storing step of independently storing the plurality of image signals input in the inputting step, and a storing step of storing the image signals in the first storing step. A first selection step of selecting a predetermined signal from the plurality of image signals, a decoding step of decoding the image signal selected in the first selection step, and an image decoded in the decoding step. Executing a program including a second selecting step of selecting a predetermined image signal from the signals, and a second storing step of storing the image signal selected in the second selecting step. The medium to be.