JP2000150631A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To uniform the thickness of a gate oxide film and to increase reliability of the gate oxide film by forming side walls on side walls of a first insulating film, forming a concave part in a separation area between devices on a substrate and filling the inside of the concave part with a second insulating film. SOLUTION: Photoresist having open patterns above a separation area between devices on a silicon substrate is formed on an oxide film 2 and a polysilicon film is formed on the whole surface. The polysilicon film is etched in the depthwise direction of the silicon substrate 1 and side walls 4 are formed on side walls of the oxide film 2. Then a trench 5 is formed in the silicon substrate 1 in the separation area between devices. The shape of the top of the side walls 6 of the silicon substrate 1 near the boundary between the silicon substrate 1 and the trench 5 is made round. Then an oxide film 7 filling the concave part is formed on the whole surface. After that, the oxide film 7 and the oxide film 2 are removed by polishing until the silicon substrate 1 under the oxide film 2 is exposed. In this way, a separation oxide film 8 whose surface is flattened and which fills the trench 5 is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming an element isolation insulating film using a trench isolation technique.

[0002]

2. Description of the Related Art FIGS. 34 to 41 are sectional views showing a conventional method of forming an isolation insulating film using a trench isolation technique in the order of steps. First, on the silicon substrate 101, 50 to
A base oxide film 102 having a thickness of about 500 angstroms is formed by a thermal oxidation method or a CVD method. Thereafter, 500 to 2000
A nitride film 103 having a thickness of about angstrom;
It is formed by a CVD method or the like (FIG. 34).

Next, a silicon substrate 1 is formed on the nitride film 103.
A photoresist (not shown) having an opening pattern is formed above the element isolation region 01 by photolithography. Thereafter, using the photoresist as a mask, the nitride film 103 and the underlying oxide film 102 are etched in this order by an anisotropic dry etching method having a high etching rate in the depth direction of the silicon substrate 101. Thus, the silicon substrate 101 in the element isolation region is exposed.
Thereafter, the photoresist is removed (FIG. 35).

Next, using the nitride film 103 as a mask, the silicon substrate 101 is anisotropically dry-etched at a high etching rate in the depth direction of the silicon substrate 101.
Is etched to a depth of about 2000 to 4000 angstroms. As a result, a trench 104 is formed inside the silicon substrate 101 in the element isolation region.
6). This step may be performed by the same process steps as those for etching the nitride film 103 and the underlying oxide film 102.

Next, a buried oxide film 105 is formed on the entire surface of the structure obtained by the above steps by a CVD method (for example, a high-density plasma CVD method) (FIG. 37).

Next, chemical mechanical polishing (Chemical Mecha)
nical polishing (CMP) method.
The buried oxide film 105 is polished and removed until is exposed.
As a result, the surface is flattened, and the upper surface of the nitride film 103 and the upper surface of the buried oxide film 105 match (FIG. 38).

Next, the buried oxide film 105 is etched to a predetermined thickness in the depth direction of the silicon substrate 101 by an anisotropic dry etching method having a high etching rate, so that the isolation oxide film 1 is formed inside the trench 104.
06 is formed. Further, the nitride film 103 is removed by hot phosphoric acid or the like (FIG. 39).

Next, after the underlying oxide film 102 is removed with hydrofluoric acid or the like, a sacrificial oxide film 107 for protecting the surface of the silicon substrate 101 from damage due to ion implantation or the like is formed on the entire surface by a thermal oxidation method ( (FIG. 40). Thereafter, ions are implanted into the silicon substrate 101 through the sacrificial oxide film 107 to form wells and channels (not shown).

Next, after removing the sacrificial oxide film 107 with hydrofluoric acid or the like, a gate oxide film 108 is formed on the silicon substrate 101 by a thermal oxidation method, and a gate electrode 109 is formed on the gate oxide film 108 (FIG. 41).

[0010]

However, the underlying oxide film 1
02 and the sacrificial oxide film 107 are removed by hydrofluoric acid or the like, the isolation oxide film 106 is also removed.
A situation may occur in which the upper surface of the semiconductor substrate 06 falls below the upper surface of the silicon substrate 101 to generate a step. FIG. 42 is a sectional view showing such a situation. As a result of the step on the upper surface, a corner 110 is formed on the upper side wall of the silicon substrate 101 near the boundary between the silicon substrate 101 and the isolation oxide film 106.

FIG. 43 is a cross-sectional view showing a state in which a gate oxide film 108 and a gate electrode 109 are formed on a silicon substrate 101 in a situation where a step on the upper surface occurs. Since the thermal oxidation reaction hardly proceeds at the corner 110, the thickness of the gate oxide film 108 formed near the corner 110 is smaller than the thickness of the other parts as shown in FIG.

As described above, according to the conventional method of forming the inter-element isolation insulating film, when a step is formed between the upper surface of the inter-element isolation insulating film and the upper surface of the substrate, the substrate and the inter-element isolation insulating film are not separated. A corner is formed at the upper part of the side wall of the substrate near the boundary. And
The gate oxide film formed by thermal oxidation becomes thin near the corners, and dielectric breakdown easily occurs in this portion, so that there is a problem that the reliability of the gate oxide film is low.

The present invention has been made in order to solve such a problem. Even when a step is formed between the upper surface of the inter-element isolation insulating film and the upper surface of the substrate, the inter-element separation between the substrate and the element is prevented. A method of manufacturing a semiconductor device capable of increasing the reliability of a gate oxide film by making the thickness of the gate oxide film uniform by avoiding the occurrence of a corner on the upper portion of the side wall of the substrate near the boundary with the insulating film. It is intended for.

[0014]

Means for Solving the Problems Claim 1 of the present invention
(A) forming a first insulating film having an opening above an element isolation region of the substrate on the substrate; and (b) forming an amorphous film on the substrate. (C) etching the film in the depth direction of the substrate to form a sidewall on the side wall of the first insulating film; and (d) forming the sidewall and the substrate on the substrate. Forming a recess in the inter-element isolation region of the substrate by etching in the depth direction of the substrate, and (e) filling the inside of the recess with a second insulating film.

According to a second aspect of the present invention, a method of manufacturing a semiconductor device according to the first aspect is the method of manufacturing a semiconductor device according to the first aspect, wherein the method is performed before (f) step (d). Forming a third insulating film, which functions as an etching stopper when the side wall is etched in the step (d), on the substrate as a base of the side wall; (g) steps (d) and (e). ) And forming a thermal oxide film on the surface of the substrate exposed by the formation of the recess.

According to a third aspect of the present invention, in the method of manufacturing a semiconductor device, (a) a first insulating film having an opening above an element isolation region of the substrate is formed on the substrate. And (b) forming a film having an etching rate substantially equal to the etching rate of the substrate over the entire surface;
(C) forming a sidewall on the side wall of the first insulating film by etching the film in the depth direction of the substrate; and (d) etching the sidewall and the substrate in the depth direction of the substrate. Forming a recess in the element isolation region of the substrate, and (e) a second step which is performed prior to the step (d) and functions as an etching stopper when the sidewall is etched in the step (d).
(F) forming the insulating film on the substrate as a base of the sidewall, and (f) forming a thermal oxide film on the surface of the substrate exposed by forming the concave portion, which is performed subsequent to the step (d). (G) filling the inside of the concave portion in which the thermal oxide film is formed with a third insulating film.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 1 to 9 are sectional views showing a method for forming an element isolation insulating film according to the first embodiment of the present invention in the order of steps. First, the thermal oxidation method or C
An oxide film 2 having a thickness of about several hundreds to several thousand angstroms is formed on the upper surface of the silicon substrate 1 by the VD method (FIG. 1).

Next, a photoresist (not shown) having an opening pattern is formed on the oxide film 2 above the element isolation region of the silicon substrate 1 by photolithography. Thereafter, using the photoresist as a mask, the oxide film 2 is etched in the depth direction of the silicon substrate 1 by an anisotropic dry etching method having a high etching rate. Thereby, the silicon substrate 1 in the element isolation region is exposed.
Thereafter, the photoresist is removed (FIG. 2).

Next, a polysilicon film 3 having a thickness of about several hundreds to several hundreds of angstroms is formed by a CVD method or the like.
Is formed on the entire surface (FIG. 3). Here, the polysilicon film 3
Is substantially equal to the etching rate of the silicon substrate 1.

Next, the polysilicon film 3 is etched in the depth direction of the silicon substrate 1 by an anisotropic dry etching method having a high etching rate, so that the oxide film 2 is etched.
(FIG. 4). FIG.
As shown in FIG. 5, the upper part of the sidewall 4 has a rounded shape.

Next, using the oxide film 2 as a mask, the silicon substrate 1 is etched to a depth equal to the thickness of the oxide film 2 by an anisotropic dry etching method having a high etching rate in the depth direction of the silicon substrate 1. . However, this step may be performed by the same process step as the step of etching the polysilicon film 3. Thus, a trench 5 is formed inside the silicon substrate 1 in the element isolation region. At this time, the sidewall 4 and the silicon substrate 1 located below the sidewall 4 are also etched. However, since the etching rate of the sidewall 4 and the etching rate of the silicon substrate 1 are substantially equal, the silicon substrate 1 and the trench 5 are not etched. The shape of the upper part of the side wall portion 6 of the silicon substrate 1 near the boundary of (1) is rounded reflecting the shape of the sidewall 4 (FIG. 5).

Next, a CVD method (for example, high density plasma C
A buried oxide film 7 is formed on the entire surface by the VD method (FIG. 6).

Next, the buried oxide film 7 and the oxide film 2 are polished and removed by the CMP method until the silicon substrate 1 located under the oxide film 2 is exposed. Thereby, the surface is flattened, and an isolation oxide film 8 is obtained as a buried oxide film 7 filling the inside of the trench 5 (FIG. 7). Thereafter, a sacrificial oxide film 9 for protecting the surface of the silicon substrate 1 from damage due to ion implantation or the like is formed by a thermal oxidation method.
Is formed on the entire surface (FIG. 8). Thereafter, ions are implanted into the silicon substrate 1 through the sacrificial oxide film 9 to form wells and channels (not shown).

Next, after removing the sacrificial oxide film 9 with hydrofluoric acid or the like, a gate oxide film 10 is formed on the silicon substrate 1 by a thermal oxidation method, and a gate electrode 11 is formed on the gate oxide film 10. (FIG. 9).

As described above, according to the method for forming the element isolation insulating film according to the first embodiment, after the sidewall 4 is formed on the side wall of the oxide film 2, the sidewall 4 and the silicon substrate 1 are etched. Thereby, a trench 5 is formed. As a result, the shape of the upper part of the side wall part 6 of the silicon substrate 1 is rounded, reflecting the shape of the side wall 4.

When the sacrificial oxide film 9 is removed with hydrofluoric acid or the like, the isolation oxide film 8 is also removed, so that a step is formed between the upper surface of the silicon substrate 1 and the upper surface of the isolation oxide film 8. Can occur. FIG. 10 is a sectional view showing such a situation. However, according to the method for forming the element isolation insulating film according to the first embodiment, the upper portion of the side wall 6 of the silicon substrate 1 has a rounded shape. Therefore, even in such a situation, when the gate oxide film 10 is formed on the silicon substrate 1, the thermal oxidation reaction on the upper portion of the side wall 6 does not progress more easily than other portions. As a result, the thickness of the gate oxide film 10 becomes uniform.
In other words, it is possible to avoid the problem that the gate oxide film 10 on the side wall portion 6 becomes thin and dielectric breakdown easily occurs, and the reliability of the gate oxide film 10 can be improved.

Embodiment 2 FIG. In the method for forming the element isolation insulating film according to the first embodiment, after the sidewall 4 is formed by etching the polysilicon film 3 (FIG. 4), the sidewall 4 and the silicon substrate 1 are formed.
Was etched to form a trench 5 (FIG. 5). However, since there is a grain in the polysilicon, a situation arises in which etching for forming the trench 5 causes minute irregularities along the grain on the upper surface of the side wall 6 of the silicon substrate 1. FIG. 11 is a cross-sectional view showing such a situation. As a result, the gate oxide film 10
There is a concern that the film thickness becomes nonuniform, and that the implantation depth in the subsequent ion implantation process varies, which adversely affects the junction characteristics of the PN junction formed inside the silicon substrate 1. You. In the second embodiment, a method for forming an element isolation insulating film that can avoid such a problem is proposed.

12 to 15 are sectional views showing a method of forming an element isolation insulating film according to the second embodiment of the present invention in the order of steps. First, through the same steps as in the first embodiment,
A structure similar to the structure shown in FIG. 2 is obtained. Next, an amorphous silicon film 12 having a thickness of about several hundreds to several hundreds of angstroms is formed on the entire surface by a CVD method or the like (FIG. 12).

Next, by etching the amorphous silicon film 12 in the depth direction of the silicon substrate 1 by an anisotropic dry etching method having a high etching rate, a sidewall 13 is formed on the side wall of the oxide film 2 (FIG. 13). As shown in FIG.
The upper part has a rounded shape.

Next, using the oxide film 2 as a mask, the silicon substrate 1 is etched to a depth equal to the thickness of the oxide film 2 by an anisotropic dry etching method having a high etching rate in the depth direction of the silicon substrate 1. . However, this step may be performed by the same process step as the step of etching the amorphous silicon film 12. Thus, a trench 5 is formed inside the silicon substrate 1 in the element isolation region. At this time, the side wall 13 and the silicon substrate 1 located below the side wall 13 are also etched. However, since the etching rate of the side wall 13 and the etching rate of the silicon substrate 1 are almost equal, the silicon substrate 1 and the trench 5 are not etched. The shape of the upper part of the side wall portion 14 of the silicon substrate 1 near the boundary of (1) is rounded reflecting the shape of the side wall 13 (FIG. 14). Thereafter, through the same steps as in the first embodiment, a structure similar to the structure shown in FIG. 9 is obtained (FIG. 1).
5).

As described above, according to the method for forming the element isolation insulating film according to the second embodiment, after the amorphous silicon film 12 is etched to form the sidewalls 13 on the side walls of the oxide film 2, the side walls 13 are formed. 13
Then, the trench 5 is formed by etching the silicon substrate 1. Here, unlike polysilicon, there is no grain in amorphous silicon. Therefore, even when etching for forming the trench 5, fine irregularities along the grain may be generated on the upper surface of the side wall portion 14 of the silicon substrate 1. Instead, the rounded portion on the upper surface of the side wall portion 14 is kept in a smooth state. Therefore, there is no variation in the implantation depth in the subsequent ion implantation step, and the above-mentioned adverse effect of adversely affecting the junction characteristics of the PN junction formed inside the silicon substrate 1 can be avoided.

FIG. 16 is a cross-sectional view showing a state where a step is formed between the upper surface of silicon substrate 1 and the upper surface of isolation oxide film 8. Under such circumstances, the gate oxide film 1
Although 0 is also formed on the rounded portion of the upper surface of the side wall portion 14, since the rounded portion of the upper surface of the side wall portion 14 is kept in a smooth state, as shown in FIG. The thickness of the film 10 becomes uniform. That is, it is possible to avoid the above-described adverse effect that the thickness of the gate oxide film 10 becomes non-uniform due to the irregularities caused by the grains.

Embodiment 3 In the method of forming the element isolation insulating film according to the first and second embodiments, the trench 5 is formed by etching the silicon substrate 1 (FIGS. 5 and 14). In order to make the upper surfaces of the side walls 6 and 14 coincide with each other, it is necessary to etch the silicon substrate 1 to a depth equal to the thickness of the oxide film 2. However, depending on the purpose, there is a case where it is desired to form the trench 5 deeper than the thickness of the oxide film 2, and the etching time varies, so that the depth of the trench 5 becomes deeper than the thickness of the oxide film 2. A situation can happen. FIG. 17 is a sectional view showing such a situation. As a result of forming the trench 5 deeper than the film thickness of the oxide film 2 or the depth of the trench 5 becoming deeper than the film thickness of the oxide film 2 due to variation in etching time, the upper surfaces of the side wall portions 6 and 14 are A corner 15 is formed in the silicon substrate 1 so as to be lower than the upper surface of the silicon substrate 1. Therefore,
When the gate oxide film 10 is formed in such a state (FIGS. 9 and 15), the upper surface of the silicon substrate 1 and the isolation oxide film 8 are formed.
In the case where a step is formed between the gate oxide film 10 and the upper surface of the gate insulating film 10, the thickness of the gate oxide film 10 near the corner 15 becomes smaller than the thickness of the other portions. There is a concern that the method of forming the film cannot achieve the desired effect. In the third embodiment, a method for forming an inter-element isolation insulating film that can avoid such adverse effects is proposed.

FIGS. 18 to 23 are sectional views showing a method of forming an element isolation insulating film according to the third embodiment of the present invention in the order of steps. First, through the same steps as in the first embodiment,
A structure similar to the structure shown in FIG. 2 is obtained. Next, an oxide film 16 having a thickness of about 50 to 100 Å is formed on the entire surface by a CVD method or a thermal oxidation method.
Thereafter, an amorphous silicon film 12 having a thickness of about several hundreds to several thousand Angstroms is formed on the oxide film 16 by a CVD method or the like (FIG. 18). However, instead of forming the amorphous silicon film 12, the polysilicon film 3 may be formed in the same manner as in the method for forming the element isolation insulating film according to the first embodiment.

Next, by etching the amorphous silicon film 12 in the depth direction of the silicon substrate 1 by an anisotropic dry etching method having a high etching rate, side walls 17 are formed on the side walls of the oxide film 2. 19). As shown in FIG.
Will be formed on the oxide film 16.

Next, the oxide film 16 other than the portion underlying the side wall 17 is removed with hydrofluoric acid, so that the portion of the silicon substrate 1 where the oxide film 16 has been removed is removed.
(FIG. 20). However, the oxide film 16 may be removed by dry etching such as reactive ion etching.

Next, using the oxide film 2 as a mask, the silicon substrate 1 is etched in the depth direction of the silicon substrate 1 by an anisotropic dry etching method having a high etching rate, so that the inside of the silicon substrate 1 in the element isolation region is formed. Then, a trench 18 is formed (FIG. 21). At this time, the side wall 17 is also etched, but since the oxide film 16 serving as the base functions as an etching stopper, the silicon substrate 1 located below the oxide film 16 is not etched as it is. A deep trench 18 can be formed.

Next, by thermally oxidizing the surface of the silicon substrate 1 exposed by the formation of the trench 18, a thermal oxide film 20 is formed inside the trench 18. Thermal oxide film 2
0 is also formed below the oxide film 16, and as a result, the upper part of the side wall 19 of the silicon substrate 1 has a rounded shape (FIG. 22). At this time, the thickness of the thermal oxide film 20 is set to be equal to or smaller than the width of the sidewall 17. However, the thickness of the thermal oxide film 20 is changed to the gate oxide film 1
When the thickness is reduced to about 0, it is difficult to obtain the effect that the upper portion of the side wall 19 has a rounded shape. Thereafter, through the same steps as in the first embodiment, a structure similar to the structure shown in FIG. 9 is obtained (FIG. 23). Thereby, as shown in FIG. 23, isolation oxide film 8 including buried oxide film 7 and thermal oxide film 20 filling inside trench 18 is obtained.

As described above, according to the method for forming the element isolation insulating film according to the third embodiment, the trench 17 is formed after the sidewall 17 having the oxide film 16 as the base is formed on the side wall of the oxide film 2. To perform etching.
At this time, since the oxide film 16 functions as an etching stopper when the sidewall 17 is etched,
Even when the trench 18 is formed deeper than the oxide film 2 or when the etching time varies, the upper surface of the side wall 19 always coincides with the upper surface of the silicon substrate 1. Moreover, the formation of the thermal oxide film 20 allows the side wall 1
The upper part of 9 has a rounded shape.

FIG. 24 is a sectional view showing a state where a step is formed between the upper surface of the silicon substrate 1 and the upper surface of the isolation oxide film 8. Even in such a situation, since the upper surface of the side wall portion 19 coincides with the upper surface of the silicon substrate 1, the desired effects can be obtained by the method of forming the element isolation insulating film according to the first and second embodiments. Can be.

Embodiment 4 FIG. 25 to 32 are sectional views showing a method of forming an element isolation insulating film according to the fourth embodiment of the present invention in the order of steps. First, thermal oxidation or CVD
An oxide film 21 having a thickness of about 100 to 300 Å is formed on the upper surface of the silicon substrate 1 by a method. Thereafter, 500 to 2000 by a CVD method or the like.
A nitride film 22 having a thickness of about Å is formed on oxide film 21 (FIG. 25).

Next, a photoresist (not shown) having an opening pattern is formed on the nitride film 22 above the element isolation region of the silicon substrate 1 by photolithography.
Thereafter, using the photoresist as a mask, the nitride film 22 is etched in the depth direction of the silicon substrate 1 by an anisotropic dry etching method having a high etching rate.
As described above, the thickness of the oxide film 21 is 100 to 300 angstroms, and is somewhat thick. Therefore, the nitride film 2
Oxide film 21 is not completely etched even by overetching when etching 2. Thereafter, the photoresist is removed (FIG. 26).

Next, an amorphous silicon film 23 having a thickness of about several hundreds to several hundreds of angstroms is formed on the entire surface by a CVD method or the like (FIG. 27). The optimum thickness of the amorphous silicon film 23 may be selected according to the intended separation width. However, instead of the amorphous silicon film 23, the polysilicon film 3 may be formed as in the first embodiment.

Next, by etching the amorphous silicon film 23 in the depth direction of the silicon substrate 1 by an anisotropic dry etching method having a high etching rate, a sidewall 24 is formed on the side wall of the nitride film 22. 28). As shown in FIG.
Numeral 4 is formed on the oxide film 21, and the upper portion has a rounded shape.

Next, the silicon substrate 1 is exposed by removing the exposed oxide film 21 except for the portion serving as the base of the sidewall 24 with hydrofluoric acid (FIG. 29). However, the oxide film 21 may be removed by dry etching such as reactive ion etching.

Next, using the nitride film 22 as a mask, the silicon substrate 1 is etched in the depth direction of the silicon substrate 1 by an anisotropic dry etching method having a high etching rate, so that the silicon substrate 1 in the element isolation region is removed. A trench 25 is formed inside (FIG. 30). At this time, although the sidewall 24 is also etched, the silicon substrate 1 located below the oxide film 21 is not etched because the oxide film 21 serving as the base of the sidewall 24 functions as an etching stopper.

Next, by thermally oxidizing the surface of the silicon substrate 1 exposed by forming the trench 25, a thermal oxide film 26 is formed inside the trench 25. Thermal oxide film 2
6 is also formed below the oxide film 21. As a result, the upper part of the side wall 27 of the silicon substrate 1 has a rounded shape (FIG. 31).

Next, as shown in FIG. 6, after the buried oxide film 7 is formed on the entire surface by the CVD method, the buried oxide film 7 is polished and removed by the CMP method until the nitride film 22 is exposed. Is flattened. Next, the trench 25
Of the buried oxide film 7 located above the substrate is etched by hydrofluoric acid or reactive ion etching to a desired thickness, the nitride film 22 is removed by hot phosphoric acid or the like, and the oxide film 21 is hydrofluoric acid. And so on. Thereby, isolation oxide film 8 including buried oxide film 7 filling thermal trench 26 and thermal oxide film 26 is obtained. Thereafter, through the same steps as in the first embodiment, a structure similar to the structure shown in FIG. 9 is obtained (FIG. 32).

As described above, according to the method for forming the element isolation insulating film according to the fourth embodiment, the trench 24 is formed after the sidewall 24 having the oxide film 21 as the base is formed on the side wall of the nitride film 22. To perform etching.
At this time, since the oxide film 21 functions as an etching stopper when the sidewall 24 is etched,
Even when the trench 25 is formed deeper than the thickness of the nitride film 22 or when the etching time varies, the upper surface of the side wall portion 27 always coincides with the upper surface of the silicon substrate 1. Moreover, the formation of the thermal oxide film 26 allows the side wall 2 to be formed.
The upper part of 7 has a rounded shape.

FIG. 33 is a cross-sectional view showing a state in which a step is formed between the upper surface of silicon substrate 1 and the upper surface of isolation oxide film 8. Even in such a situation, since the upper surface of the side wall portion 27 coincides with the upper surface of the silicon substrate 1, the desired effects can be obtained by the method of forming the element isolation insulating film according to the first and second embodiments. Can be.

The method for forming an element isolation insulating film according to the first to fourth embodiments can be applied to, for example, a DRAM or the like, but is not limited thereto. It is needless to say that the present invention can be applied to all the semiconductor devices having the above.

[0052]

According to the first aspect of the present invention, after forming the sidewall on the side wall of the first insulating film, the recess is formed by etching the sidewall and the substrate. As a result, the shape of the upper portion of the side wall portion of the substrate near the boundary with the concave portion has a rounded shape reflecting the shape of the sidewall.

Further, since there is no grain in the amorphous film, no irregularities along the grain are formed on the upper surface of the side wall of the substrate even by the etching in the step (d). The rounded part is kept smooth.

According to the second aspect of the present invention, the thermal oxide film is formed in the step (g),
The upper part of the side wall of the substrate near the boundary with the recess has a rounded shape. In addition, the third insulating film functions as an etching stopper when the sidewall is etched in the step (d). Therefore, even when a concave portion deeper than the thickness of the first insulating film is formed, the upper surface of the side wall portion can be made to coincide with the upper surface of the substrate.

Further, according to the third aspect of the present invention, by forming the thermal oxide film in the step (f),
The upper part of the side wall of the substrate near the boundary with the recess has a rounded shape. Moreover, the second insulating film functions as an etching stopper when the sidewall is etched in the step (d). Therefore, even when a concave portion deeper than the thickness of the first insulating film is formed, the upper surface of the side wall portion can be made to coincide with the upper surface of the substrate.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a method for forming an element isolation insulating film according to a first embodiment of the present invention in the order of steps.

FIG. 2 is a cross-sectional view showing a method of forming an element isolation insulating film according to Embodiment 1 of the present invention in the order of steps.

FIG. 3 is a cross-sectional view illustrating a method of forming an element isolation insulating film according to Embodiment 1 of the present invention in the order of steps.

FIG. 4 is a cross-sectional view showing a method of forming an element isolation insulating film according to Embodiment 1 of the present invention in the order of steps.

FIG. 5 is a cross-sectional view illustrating a method of forming the element isolation insulating film according to the first embodiment of the present invention in the order of steps.

FIG. 6 is a cross-sectional view showing a method for forming the element isolation insulating film according to the first embodiment of the present invention in the order of steps.

FIG. 7 is a cross-sectional view illustrating a method of forming the element isolation insulating film according to the first embodiment of the present invention in the order of steps.

FIG. 8 is a cross-sectional view showing a method of forming the element isolation insulating film according to the first embodiment of the present invention in the order of steps.

FIG. 9 is a cross-sectional view illustrating a method of forming the element isolation insulating film according to the first embodiment of the present invention in the order of steps.

FIG. 10 is a cross-sectional view showing a state where a step is generated between the upper surface of the silicon substrate and the upper surface of the isolation oxide film.

FIG. 11 is a cross-sectional view showing a state in which irregularities are formed along the grains on the upper surface of the side wall of the silicon substrate.

FIG. 12 is a cross-sectional view illustrating a method of forming an element isolation insulating film according to Embodiment 2 of the present invention in the order of steps.

FIG. 13 is a cross-sectional view showing a method of forming an element isolation insulating film according to Embodiment 2 of the present invention in the order of steps.

FIG. 14 is a cross-sectional view showing a method of forming an element isolation insulating film according to Embodiment 2 of the present invention in the order of steps.

FIG. 15 is a cross-sectional view showing a method of forming an element isolation insulating film according to Embodiment 2 of the present invention in the order of steps.

FIG. 16 is a cross-sectional view showing a situation where a step is generated between the upper surface of the silicon substrate and the upper surface of the isolation oxide film.

FIG. 17 is a cross-sectional view showing a situation in which the upper surface of the side wall portion is lower than the upper surface of the silicon substrate, and a corner is formed in the silicon substrate.

FIG. 18 is a cross-sectional view showing a method of forming an element isolation insulating film according to Embodiment 3 of the present invention in the order of steps.

FIG. 19 is a cross-sectional view showing a method for forming the element isolation insulating film according to Embodiment 3 of the present invention in the order of steps.

FIG. 20 is a cross-sectional view showing a method of forming an element isolation insulating film according to Embodiment 3 of the present invention in the order of steps.

FIG. 21 is a cross-sectional view showing a method of forming an element isolation insulating film according to Embodiment 3 of the present invention in the order of steps.

FIG. 22 is a cross-sectional view showing a method of forming an element isolation insulating film according to Embodiment 3 of the present invention in the order of steps.

FIG. 23 is a cross-sectional view showing a method of forming an element isolation insulating film according to Embodiment 3 of the present invention in the order of steps.

FIG. 24 is a cross-sectional view showing a state where a step is generated between the upper surface of the silicon substrate and the upper surface of the isolation oxide film.

FIG. 25 is a cross-sectional view showing a method of forming the element isolation insulating film according to the fourth embodiment of the present invention in the order of steps.

FIG. 26 is a cross-sectional view showing a method for forming an element isolation insulating film according to Embodiment 4 of the present invention in the order of steps;

FIG. 27 is a cross-sectional view showing a method for forming the element isolation insulating film according to the fourth embodiment of the present invention in the order of steps.

FIG. 28 is a cross-sectional view showing a method of forming an element isolation insulating film according to Embodiment 4 of the present invention in the order of steps.

FIG. 29 is a cross-sectional view showing a method for forming the element isolation insulating film according to Embodiment 4 of the present invention in the order of steps.

FIG. 30 is a cross-sectional view showing a method of forming the element isolation insulating film according to the fourth embodiment of the present invention in the order of steps.

FIG. 31 is a cross-sectional view showing a method of forming the element isolation insulating film according to the fourth embodiment of the present invention in the order of steps.

FIG. 32 is a cross-sectional view showing a method for forming the element isolation insulating film according to the fourth embodiment of the present invention in the order of steps.

FIG. 33 is a cross-sectional view showing a state where a step is generated between the upper surface of the silicon substrate and the upper surface of the isolation oxide film.

FIG. 34 is a cross-sectional view showing a conventional method for forming an element isolation insulating film in the order of steps.

FIG. 35 is a cross-sectional view showing a conventional method for forming an element isolation insulating film in the order of steps.

FIG. 36 is a cross-sectional view showing a conventional method for forming an element isolation insulating film in the order of steps.

FIG. 37 is a cross-sectional view showing a conventional method for forming an element isolation insulating film in the order of steps.

FIG. 38 is a cross-sectional view showing a conventional method of forming an element isolation insulating film in the order of steps.

FIG. 39 is a cross-sectional view showing a conventional method of forming an element isolation insulating film in the order of steps.

FIG. 40 is a cross-sectional view showing a conventional method for forming an element isolation insulating film in the order of steps.

FIG. 41 is a cross-sectional view showing a conventional method of forming an element isolation insulating film in the order of steps.

FIG. 42 is a cross-sectional view showing a state where a step is formed between the upper surface of the isolation oxide film and the upper surface of the silicon substrate.

FIG. 43 is a cross-sectional view showing a state where a gate oxide film and a gate electrode are formed on a silicon substrate in a state where a step is formed on the upper surface.

[Explanation of symbols]

1 silicon substrate, 2, 16, 21 oxide film, 3 polysilicon film, 4, 13, 17, 24 side wall,
5, 18, 25 trench, 6, 14, 19, 27 sidewall, 7 buried oxide film, 8 isolation oxide film, 9 sacrificial oxide film, 10 gate oxide film, 12, 23 amorphous silicon film, 20, 26 thermal oxide film , 22 nitride film.

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Maiko Sakai 2-3-2 Marunouchi, Chiyoda-ku, Tokyo F-term (reference) 5F032 AA11 AA14 AA16 AA23 AA32 AA33 AA34 AA35 AA36 AA44 AA77 BA01 CA01 DA02 DA04 DA23 DA25

Claims (3)

[Claims] (A) forming a first insulating film having an opening above an element isolation region of the substrate on the substrate; and (b) forming an amorphous film on the entire surface. (C) forming a sidewall on a side wall of the first insulating film by etching the film in a depth direction of the substrate; and (d) forming the sidewall and the substrate on the side wall. A semiconductor device comprising: a step of forming a recess in the inter-element isolation region of the substrate by etching in a depth direction of the substrate; and (e) a step of filling the inside of the recess with a second insulating film. Manufacturing method. (F) forming a third insulating film which is performed before the step (d) and functions as an etching stopper when the side wall is etched in the step (d); (G) a step of forming a thermal oxide film on the surface of the substrate exposed between the steps (d) and (e), wherein the step is performed between the step (d) and the step (e). The method of manufacturing a semiconductor device according to claim 1, further comprising a step of forming. 3. A step of: (a) forming a first insulating film having an opening above an element isolation region of the substrate on the substrate; and (b) setting an etching rate substantially equal to an etching rate of the substrate. (C) forming a sidewall on the side wall of the first insulating film by etching the film in the depth direction of the substrate; and (d) etching the film in a depth direction of the substrate. Forming a recess in the inter-element isolation region of the substrate by etching the sidewall and the substrate in a depth direction of the substrate; and (e) performing a step before the step (d); Forming a second insulating film, which functions as an etching stopper when the side wall is etched in the step (d), on the substrate as a base of the side wall; Is executed subsequently to step (d), a step of forming a thermal oxide film on the surface of the substrate that has been exposed by the formation of the recess, the inside of the (g) the recess in which the thermal oxide film is formed third
Filling with an insulating film.