JP2000148577A - Method and device for controlling access - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the competition of accesses to a shared area in a state of asynchronous memory accesses to the shared area by plural processes. SOLUTION: A table management module E registers time attribute information in a management list E1. Then the module E acquires a prescribed period and access time in each process, prepares a time table by executing scheduling so as not to generate the competion of memory accesses to a shared area and sets up the time table in a time management module F. The module E receiving change timing informed of from the module F based on the time table applies a command for acquiring an access attribute to be set up from a structure corresponding to a specified process and setting up the attribute in a storage protection table to a storage protection module C.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an access control method for controlling access to a memory block in a computer capable of executing a plurality of processes asynchronously, and more particularly, to sharing a memory block among a plurality of processes. Access control method characterized by the configuration for

[0002]

2. Description of the Related Art Virtual storage is a storage method that enables the use of a storage area larger than the actual storage capacity of a main storage device. Specifically, a computer is provided with a secondary storage device having a larger storage capacity than its main storage device, and based on a read command and a write command, performs a mutual data transfer between the two in addition to its normal operation. It is not possible, and the storage area of the main storage device is divided into a plurality of replaceable pages and managed.

[0003] The management of pages is performed based on a page table representing the correspondence between the virtual address space accessible by the process and the memory space of the main storage device for each page. That is, when the storage capacity of the main storage device becomes insufficient at the time of data writing, the storage contents of an appropriate page are flushed to the secondary storage device, and the storage capacity of the page is secured as free space. Further, when reading of the data swept from the main storage device to the secondary storage device occurs, the data is read from the secondary storage device and loaded into any one of the pages.

In a computer that employs virtual storage as a storage method and enables simultaneous execution of a plurality of processes, an entry in a page table of a different process is set to the same physical address of a main storage device. The data loaded on the page specified by the physical address can be shared (shared) between a plurality of processes. A page shared by a plurality of processes is called a shared memory. In the main storage device, an area used as a shared memory is called a shared area.

[0005] The shared memory is effective when data having a large capacity, such as image data, is transferred between processes. When a shared memory is not used, a transmission path is formed in advance based on a message communication procedure between processes. Then, the data to be delivered from the transfer source process is transmitted to the transmission path, and is received by the transfer destination process. On the other hand, when the shared memory is used, the object is achieved by setting in advance a shared memory to be shared between processes related to data transfer and storing data to be transferred in the transfer source process in the shared memory. Therefore, the processing load can be reduced.

By the way, if the above-mentioned shared memory is used in a system in which a plurality of processes can access a memory asynchronously, a conflict in memory access occurs and a processing failure is caused. Exclusive control is performed as much as possible.

As an exclusive control method, for example, when a certain process accesses a shared area where a memory access is performed by another process, and when all competing memory accesses are read accesses, In general, a method is employed in which these processes are processed, and when the memory access being executed is a write access, the memory access of another process is made to wait until the execution of the process related to the write access ends. .

Further, in a situation where a delay in write access for updating data is allowed, in order to reduce the time for which a process related to read access waits,
Data to be written is temporarily stored in an area different from the shared area to be accessed, and when contention for memory access in the shared area is resolved, the stored data is written to the shared area. By
A method has been proposed that enables read access in a shared area even while write access is being performed.

[0009]

However, according to the first method, in a situation where another memory access competes with a write access to the shared area, the former process requires a lot of processing time. However, there is a problem that the latter process has to wait for a long time. Also,
According to the second method, every time a write access is performed, a process of writing data stored in an area for temporary storage to a shared area is required. For example, when the shared area is large, the writing process is required. Time matters.

The present invention has been made in view of such circumstances, and in a situation where a plurality of processes asynchronously access a memory to a shared area, instead of exclusive control, a period of memory access by each process is managed. By doing so, an object of the present invention is to provide an access control method and an access control device for solving contention of memory access.

[0011]

An access control method according to a first aspect of the present invention provides a method of controlling access to a memory block shared by a plurality of processes when a plurality of processes are repeatedly executed at a predetermined cycle for each process. An access control method for controlling, wherein a setting of an access time to a memory block is received for each process, and an access period to the memory block is set for each process based on a predetermined cycle and a set access time, and the setting is performed. The access to the memory block is controlled according to the set access period.

An access control device according to a second invention is an access control device for controlling access to a memory block shared by a plurality of processes when a plurality of processes are repeatedly executed at a predetermined cycle for each process. So,
Means for receiving the setting of the access time to the memory block for each process; means for setting the access period to the memory block for each process based on a predetermined cycle and the set access time; and Means for controlling access to the memory block.

FIG. 4 is a conceptual diagram showing the concept of access control according to the present invention. In the figure, A and B are user processes. The user processes A and B have virtual address spaces A1 and B1, respectively, and memory access to the virtual address spaces is performed via the storage protection module C. That is, the memory protection module C refers to the memory protection tables CA and CB, which are the respective page tables, for the memory access requested by the user processes A and B, and stores the target virtual address in the physical memory space D. Convert and perform the required memory access.

As shown in the figure, when the entry of the storage protection table CA and the entry of the storage protection table CB are associated with the same address, the page specified by this address is shared between the user process A and the user process B. Can be done. Furthermore, the memory protection table
In CA and CB, the following access attributes for pages shared with other processes, that is, writable / readable
(WRITE), read only (READ), inaccessible
(NO-ACCESS) can be set, and based on this, the access of each process to the page is controlled.

On the other hand, each time the user processes A and B need to set time attribute information including the cycle of the process, the access time to the memory block, the designation of the thread to be started and the access attribute, etc. Give to the management module E. Table management module E
Receives the time attribute information setting request as described above, and registers this in the management list E1. The management list E1 is
One structure is allocated to each process, time attribute information is stored, and this structure is listed. Further, the table management module E includes a management list E1 of time attribute information.
In response to the registration, a predetermined cycle and access time are obtained for each process, and scheduling is performed so that memory access in the shared area does not conflict, and a time table is created. Then, a command is given to the time management module F to set this time table.

The time management module F is supplied with a clock signal, and sends a change timing indicating that the time to change the access attribute of a required process to the table management module E according to the set time table F1. Notice. The table management module E that has received the notification of the change timing acquires the access attribute to be set from the structure corresponding to the specified process, and gives the storage protection module C a command to set this in the storage protection table. The storage protection module C that has received the storage protection table setting command updates the setting contents of the specified storage protection table. Thereafter, the access of each process is controlled according to the updated storage protection table.

FIG. 5 is an explanatory diagram for explaining an example of a time table set in the time management module F.
In the figure, (A) indicates that the cycle of the user process A is T1 and the access time is t1. Also (B)
Indicates that the cycle of the user process B is T2 and the access time is t2. The period T2 is twice as long as the period T1. (C) shows a time table obtained by performing scheduling for the user process A and the user process B. As shown in the figure, the user process A and the user process B in the period T2
Are assigned access times such that memory access is performed twice and once, respectively. The time management module F notifies the table management module E of a required change timing every time the assigned access time reaches the start time Ta, Tb, Tc,... According to the time table.

As described above, in the first invention and the second invention, a time table is created in advance so that memory access does not conflict in the shared area, and access is controlled in accordance with the time table. The problem can be solved.

[0019]

FIG. 1 is a block diagram showing a hardware configuration of a device according to the present invention. In FIG. 1, reference numeral 1 denotes a personal computer, which includes a display 2 using a liquid crystal display and a pointing device 3 using a mouse or a slide pad. The personal computer 1 also includes an I / O control unit 4 for controlling a signal provided from the pointing device 3, and the I / O control unit 4 provides the signal to the CPU 5 as a hardware interrupt signal. The CPU 5 has a memory 6 as a work memory, a VRAM 7 for storing display data corresponding to a display screen, and a display 2 for the display data.
Is connected to a display control unit 8 for controlling the display and a storage unit 9 for storing required setting information and a program, and executes processing in accordance with the processing procedure of the program based on a given hardware interrupt signal. .

FIG. 2 is a state transition diagram for explaining an operation sequence relating to scheduling of the apparatus of the present invention, and shows an execution state of a table management module included in a program executed by the CPU 5. In the initial state 11, the process waits until there is a request for setting the time attribute information. In the initial state 11, when a setting request is received, a scheduling process 12 based on a time attribute is performed,
Two processes are selected according to the result. That is, when the scheduling is successful, the registration process 13 of the time attribute information in the management list is performed. Further, when the scheduling fails, the failure notification processing 14 is performed for the process related to the setting request. In the registration process 13 in the management list, when the process is successful, the time table setting process 15
I do. When this succeeds, a notification process 16 of success is performed for the process related to the setting request. In the management list registration process 13 and the time table setting process 15, when the process fails, a failure notification process 14 is performed.

FIG. 3 is a flowchart showing an operation procedure relating to memory protection of the device of the present invention. The time management module that has received the clock specifies a required process based on the time schedule and notifies the table management module of the change timing (S1). The table management module that has received the notification of the change timing acquires the access attribute registered in the management list for the specified process, and sets the storage protection table (S2). Repeat the above procedure. Since the memory protection table is set in this way to control the memory access of each process,
Memory access conflicts can be resolved without using exclusive control.

[0022]

According to the access control method of the first invention and the access control device of the second invention as described above, in the situation where a plurality of processes asynchronously access a shared memory block, the access to the memory block is performed. An access period is set in advance for each process so that no conflict occurs, and access is controlled in accordance with the access period. Therefore, an excellent effect of efficient access control is achieved.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a hardware configuration of a device of the present invention.

FIG. 2 is a state transition diagram for explaining an operation sequence related to scheduling of the device of the present invention.

FIG. 3 is a flowchart showing an operation procedure relating to memory protection of the device of the present invention.

FIG. 4 is a conceptual diagram illustrating a concept of access control according to the present invention.

FIG. 5 is an explanatory diagram illustrating an example of a time table set in a time management module.

[Explanation of symbols]

 11 Initial state 12 Scheduling process based on time attribute 13 Registration process to management list 14 Failure notification process 15 Time table setting process 16 Success notification process

 ────────────────────────────────────────────────── ─── Continuing from the front page (72) Inventor Naoki Nishiguchi 4-1-1, Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa F-term in Fujitsu Limited (Reference) 5B005 JJ23 MM33 RR02 5B060 AA06 CA08 5B098 AA03 FF02 GA04 GD03 GD15 HH07

Claims (2)

[Claims] 1. An access control method for controlling access to a memory block shared by a plurality of processes when a plurality of processes are repeatedly executed at a predetermined cycle for each process. Setting of an access time to the memory block, setting an access period to the memory block in each process based on a predetermined cycle and the set access time, and controlling access to the memory block according to the set access period. An access control method, characterized in that: 2. An access control device for controlling access to a memory block shared by a plurality of processes when a plurality of processes are repeatedly executed at a predetermined cycle for each process, comprising: Means for receiving the setting of the access time to the memory block; means for setting the access period to the memory block for each process based on a predetermined cycle and the set access time; and An access control device, comprising: means for controlling access.