JP2000148078A - Video display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make a memory means replaceable and thereby share the other circuits. SOLUTION: This video display device is composed of a display means 30 having two-dimensional display elements 31, a video signal processing means 20 having a digital signal processor 24, a control means 40 having a memory means 41 incorporating a signal processing program to be loaded in the digital signal processor and a timing signal generating means 42 for generating a timing signal to be fed to the two-dimensional display elements and the digital signal processor. The memory means is replaced according to the number of pixels of the display element. Consequently, when a display element 31 with different number of pixels is used, the memory means is also replaced by the one corresponding to the number of pixels. Thus, it is possible to share the control means except for the signal processing means and the memory means.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video display device using a liquid crystal display device or the like. In detail, according to the number of pixels (resolution) of a liquid crystal display element or the like, only by replacing the memory means itself having a built-in signal processing program for signal processing, even if the number of pixels of the liquid crystal display element changes, It is possible to achieve common use of signal processing means and control means including a digital signal processor and the like.

[0002]

2. Description of the Related Art Recently, a small-sized image display device (a personal color image display device) using a liquid crystal display device or the like is provided on the back of an aircraft seat or on an armrest portion of a shinkansen. In the meantime, passengers can freely use the video display device to provide video services to passengers. For example, in an airplane, the image display device is attached to the back side of a seat so that images such as movies, animations, and news can be enjoyed during a flight.

In airplanes, etc., first class,
Grade (high or low resolution) of installed video display device according to the rank of business class, economy class, etc.
Attempts have been made to change this. Similarly, in the case of the Shinkansen, an attempt has been made to distinguish a green car from a general car and mount a video display device of a grade corresponding to each.

When changing the grade, the most popular method is to change the number of pixels, that is, the resolution, of a two-dimensional display element used, for example, a liquid crystal display element. For example, as a video display device mounted on a first-class seat, a high-class liquid crystal display element capable of obtaining the highest resolution is used, and as the grade decreases, a liquid crystal display element with a reduced resolution is used. By doing so, a video service corresponding to the grade can be realized.

[0005]

When a video display device corresponding to each grade is constructed as described above, it is conceivable to prepare a video display device for each grade.
When three liquid crystal display elements of different types are used as described above, three types of video signal processing means are prepared according to the respective liquid crystal display elements, and a control means having a processing program required for video signal processing is also provided. In this case, three types are prepared to constitute a dedicated video display device.

[0006] However, such exclusive use necessitates the design of a video display device in accordance with the grade and application, and it is obvious that the cost of the video display device is increased. Such different types do not mean that there is no part that can be shared. If they can be shared, only one type of circuit design is required for each type, and the circuit design time can be reduced.

Accordingly, the present invention has solved such a conventional problem. In particular, the present invention is applied to a plurality of types having different resolutions, in which parts which can be shared are shared as much as possible so as not to increase the cost. The present invention proposes a video display device that can be used.

[0008]

According to a first aspect of the present invention, there is provided an image display apparatus comprising: a display unit having a two-dimensional display element;
Video signal processing means having a signal processor;
The digital signal processor comprises memory means containing a signal processing program loaded therein, control means having the two-dimensional display element, timing signal generating means for generating a timing signal to be given to the digital signal processor, and the like. The memory means can be replaced according to the number of pixels of the display element.

In the present invention, the memory means containing the signal processing program is configured to be exchangeable, and the memory means is also exchanged according to the two-dimensional display element to be used.
With this configuration, even if the number of pixels of the liquid crystal display element, that is, the resolution changes, a signal processing unit that supplies a video signal,
The control means other than the memory means can be used for at least all types, so that the signal processing means and the control means can be shared.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of a video display device according to the present invention will be described in detail with reference to the drawings. FIG. 1 is a system diagram of a main part showing an embodiment of a video display device 10 according to the present invention. The video processing device 20 converts a video signal into a signal form suitable for a two-dimensional display element. It comprises a display means 30 having an element 31, and a control means 40 for controlling the signal processing means 20 and the display means 30. As the two-dimensional display element 31 provided in the display means 30, a liquid crystal display element (LCD)
Is exemplified.

The signal processing means 20 converts the video signal (color video signal) supplied to the terminal 21 into the video decoder 2.
2, in this example, a luminance signal Y and a pair of color difference signals R-
Y and BY are separated, and the separated luminance signal Y and color difference signals RY and BY are converted into digital signals of a predetermined number of bits by the AD converter 23, respectively.

The digitized luminance signal Y and color difference signals RY and BY are further supplied to a digital signal processor (DSP) 24 to be subjected to predetermined signal processing. The predetermined signal processing includes an IP conversion process, a pixel number conversion process, a matrix conversion process, a contour enhancement process, a γ (gamma) correction process, and the like for displaying an image on the liquid crystal display element 31.

Here, the IP conversion process is a process of converting the number of scanning lines, and is a process for converting an interlace signal into a progressive signal (sequential signal). In this conversion process, the field memory 25 is used as a working memory. The number-of-pixels conversion process is a process for converting the number of pixels into a number corresponding to the panel of the liquid crystal display element 31 to be used.

The digital signal processor 24 further performs contour emphasis processing on the luminance signal Y and the color difference signals RY and BY, and thereafter forms R, G, and B primary color signals, and thereafter performs γ correction processing. And other signal processing. The signal-processed RGB signals are supplied to an interface 32 constituting the display unit 30 as drive signals thereof. The interface 32 is for driving the liquid crystal display element 31, and is supplied with timing signals (not shown) such as horizontal and vertical synchronization signals Hsync and Vsync in addition to the RGB signals.

In this example, three types of liquid crystal display elements are prepared according to the difference in resolution. The first liquid crystal display element 31a has the highest resolution.
It is called a GA (extended graphics array) element. The second liquid crystal display element 31b is an element having an intermediate resolution and is hereinafter referred to as an SVGA (super video graphics array) element. The third liquid crystal display element 31c is the element having the lowest resolution among the rankings, and is hereinafter referred to as VG.
A (video graphics array) element.

As described above, the number of pixels, the dot clock frequency, and the like differ depending on the difference in resolution. An example is shown in (Table 1).

[0017]

[Table 1]

The signal processing means 20 and the display means 30 are supplied with a signal processing program, timing signals, and the like from the control means 40 in order to execute predetermined operations.
For this purpose, the control means 40 comprises a memory means 41, a timing signal generating means 42, an oscillating element 43 for obtaining a predetermined dot clock, and a CPU-based control section 44 for controlling these elements.

A signal processing program used in the digital signal processor 24 is stored in a memory means 41 using a semiconductor memory (such as a ROM).

Since the first to third display elements 31a to 31c have different numbers of pixels, it is necessary to change the signal processing program according to the display element 31 to be used. Therefore, a dedicated signal processing program suitable for the display element 31 to be used is stored in the memory means 41. An identification code for identifying which display element 31 is to be driven by the signal processing program is written in each memory means 41.

For example, when the memory means 41a stores a signal processing program used in the XGA element 31a, a 2-bit code "00" is written as an identification code ID. Hereinafter, similarly, the SVGA element 31
In the case of the memory means 41b storing the signal processing program to be used in b, the identification code ID is "0".
1 ”is written, and the VGA element 31c is written.
In the case of the memory means 41c storing the signal processing program to be used in the above, the identification code ID is "1".
A 2-bit code of "0" is written. This identification code ID is read by the control unit 44.

Further, since the basic clock for signal processing also varies with the difference in the number of pixels, as shown in (Table 1), the oscillating element 43 () obtains a dot clock suitable for the display element 31 to be used. 43a to 43c) are used.
The timing signal generating means 4 is
2, a predetermined timing signal is generated, and together with the dot clock, the digital signal processor 24 and the LC
The D interface 32 is provided. As the oscillation element 43, a crystal oscillator or the like can be used.

The control section 44 reads the identification code ID written in the memory means 41, and when the identification code ID is "00", selects the highest-speed oscillation element 43a and, based on this oscillation element 43a. Various timing signals are generated based on the generated dot clock.

Similarly, the identification code ID of the memory means 41
Is “01”, the medium-speed oscillator 43 b
Is selected, and various timing signals are generated based on the dot clock generated based on the oscillation element 43b. Then, if the identification code ID of the memory means 41 is "1"
When it is "0", the low-speed oscillation element 43c is selected, and various timing signals are generated based on the dot clock generated based on the oscillation element 43c.

FIG. 1 shows an example of this. FIG. 1 shows a case where the display element 31 is an XGA element 31a. Therefore, as shown in Table 1, the number of pixels is (1024 × 7).
68). Therefore, as the oscillation element 43a, 6
A dot clock frequency (oscillation frequency) of 5 MHz is used. At this time, the horizontal frequency is 48.363 kHz.
z and the vertical frequency is 60.003 Hz.

Similarly, since the number of pixels is (800 × 600), the SVGA element 31b uses a dot clock of 40 MHz, and the horizontal frequency is 3 at that time.
7.879 kHz, and the vertical frequency is 60.316 Hz. Since the VGA element 31c has (640 × 480) pixels, the dot clock frequency used is 25.1.
75MHz low, horizontal frequency is 31.469kHz,
The vertical frequency is 59.94 Hz.

In the digital signal processor 24, the scanning line number conversion processing, the pixel number conversion processing, and the like are executed in accordance with the procedure of the signal processing program based on the dot clock and the timing signal generated as described above. . Therefore, the signal processing program stored in the memory means 41 is downloaded to the digital signal processor 24 when the power is turned on.

The memory means 41 to be used is selected according to the number of pixels of the display element 31 to be used as described above, and in this example, the identification code ID written in the memory means 41 is used.
Is used to execute the process of selecting the oscillation element 43. Therefore, a dedicated memory means is prepared as the memory means 41.

Incidentally, the signal processing means 20 and the control means 40 shown in FIG. 1 can be mounted on the same substrate. FIG. 2 shows an embodiment of the present invention.
Is configured as a display panel 35, in which the interface 32 is also housed. A main board 36 is attached to the back side of the display panel 35. The signal processing unit 20 and the control unit 40 of FIG. 1 are mounted on the main board 36. The main board 36 and the display panel 35 are connected by signal lines. In this example, two connectors 26, 2
7 is used, which is a flexible cable line 28, 2
9, the display panel 35 and the main board 36 are connected to each other.

A socket 50 for the memory means 41 is provided on the main board 36 so that the memory means 41 can be freely replaced. In the figure, DIP (dual in
Since the memory means 41 of the (package) type is illustrated, the socket 50 is also a DIP type socket.

As described above, the video display device 10 having a desired resolution can be realized simply by replacing the display panel 35 with the memory means 41. The display element is not limited to a liquid crystal display element. The application is not limited to the use in the aircraft or the Shinkansen train.

[0032]

As described above, the present invention relates to a video display device which can be used for a plurality of types having different resolutions, and in particular, a portion which can be shared by arranging a memory means corresponding to a display element to be exchangeable. Is to share as much as possible so as not to increase the cost.

According to this, only the memory means is exchanged according to the two-dimensional display element to be used. In this way, even if the number of pixels of the liquid crystal display element, that is, the resolution changes, the control means except for the signal processing means and the memory means to which the video signal is supplied can be used for at least all types. Sharing of the processing means and the control means can be achieved. This has the feature that manufacturing costs and design costs can be significantly reduced.

Therefore, the video display device according to the present invention is extremely suitable for application to video services in aircraft, Shinkansen vehicles, and the like.

[Brief description of the drawings]

FIG. 1 is a system diagram of a main part showing an embodiment of a video display device according to the present invention.

FIG. 2 is a perspective view illustrating an example of a substrate configuration of the video display device.

[Explanation of symbols]

10 image display device, 20 signal processing means, 3
0: display means, 24: digital signal
Processor, 31 ... Liquid crystal display element, 41 ... Memory means, 43 ... Timing signal generation means, 43 ...
・ Oscillator

Continued on the front page F-term (reference) 2H088 EA23 HA06 MA20 5C080 AA10 BB05 CC03 DD30 EE29 EE30 FF09 GG02 GG08 GG10 GG12 JJ02 JJ06 5C082 AA03 BA02 BA12 BA34 BA35 BB03 BB15 BB22 BD02 BD09 DA81 DA

Claims (7)

[Claims] A display means having a two-dimensional display element; a video signal processing means having a digital signal processor; a memory means incorporating a signal processing program loaded into the digital signal processor; And a control means having a timing signal generating means for generating a timing signal to be given to the digital signal processor. The memory means can be replaced according to the number of pixels of the display element. An image display device characterized by the above-mentioned. 2. The image display device according to claim 1, wherein said two-dimensional display element is a liquid crystal display element. 3. The memory device according to claim 1, wherein identification data corresponding to the number of pixels of said display element is written into said memory means, and a signal processing program for driving said display element is written. Video display device. 4. The video display device according to claim 1, wherein said timing signal generating means is provided with a plurality of oscillation elements in accordance with a difference in the number of pixels of said display element. 5. The control means has a control unit constituted by a CPU, which reads the identification data of the memory means,
2. The video display device according to claim 1, wherein the oscillating element provided in the timing signal generating means is selected based on the identification data. 6. A digital signal processing program stored in said memory means in accordance with an instruction from said control section.
A timing signal downloaded by a signal processor and generated by a dot clock based on the selected oscillator element is supplied to the digital signal processor and the display means, respectively. Item 6. The video display device according to Item 5. 7. The signal processing means and the control means are mounted on the same board, and the board is provided with a socket for the memory means,
2. The video display device according to claim 1, wherein said memory means is replaceable.