JP2000134980A - Brushless motor-controlling device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a chip area with low loss by turning on a constant-current switch means according to current being shunted to a second diode. SOLUTION: For example, QUT and QUB are output-stage switching elements U-phase upper and lower arms and DUT and DUB are reflux diodes that are connected inversely in parallel with the QUT and QUB, respectively. When the DUT conducts electricity by a reflux current, the QUT is off. In this case, M3 (a region 3) is a constant-current-type switch and the voltage between the gate and source of M3 is reduced by the voltage drop of a resistor R8 that a source side is equipped with, thus suppressing current flowing through the M3. The current flowing through the M3 causes a voltage drop at a resistor R9 that is connected to the low-potential side of VCH, thus detecting the conduction of an upper arm diode according to the presence or absence of the voltage drop. The large portion of VC2 is applied to the high voltage of VCH between the drain and source of M3. In this case, by setting a constant current to a specific level or less, loss can be suppressed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a control device for a brushless motor, and more particularly to a magnetic pole position detection suitable for a one-chip inverter IC.

[0002]

2. Description of the Related Art A control device for a brushless motor drives each arm of an inverter circuit based on the detection of the position of a magnetic pole to supply a current to an armature winding. For position detection, information obtained by comparing the output voltage of the inverter circuit with the reference voltage is input to a microcomputer (hereinafter referred to as a microcomputer), and the microcomputer detects the position for a predetermined period from a time when the switching element of the inverter circuit is turned off. Mask the information. Such a conventional magnetic pole position detection method is disclosed in Japanese Patent Application Laid-Open No. 8-191590.
And many others. The period to be masked is the conduction period of the switching element of the inverter circuit and the free-wheeling diode connected in anti-parallel to the switching element of the inverter circuit. In the above-described conventional example, the microcomputer calculates the time at which the free-wheeling diode is estimated to be conductive. Was. Further, as disclosed in Japanese Patent Application Laid-Open No. 9-163788, there is a method in which a resistance voltage dividing means is provided at both ends of the freewheeling diode, and the conduction of the freewheeling diode is detected from the result of the voltage division.

[0003]

SUMMARY OF THE INVENTION A switching element of an inverter circuit, a control circuit for the switching element, and a free-wheeling diode are included in one.
We considered incorporating a magnetic pole position detection function into a one-chip inverter IC integrated on a chip IC. as a result,
Providing an inverter IC with microcomputer functions (memory means, CPU, etc.) required by JP-A-8-191590 is
The circuit scale of C becomes enormous, which is not an advantage. In particular, since the inverter IC has a large number of high-voltage switching elements, the semiconductor process is different from the microcomputer, and is not suitable for integration of a large-scale logic circuit. On the other hand, JP-A-9-163
When the resistance voltage dividing means disclosed in No. 788 is built in an IC,
IC loss increases. It is also conceivable to use an MΩ (mega ohm) resistor for voltage division in order to suppress the loss, but the MΩ resistor causes an increase in the IC chip area. As a result, none of the current technologies is suitable for inverter ICs.

An object of the present invention is to provide a magnetic pole position detecting function suitable for an inverter IC, which has low loss and does not cause an excessive increase in chip area.

[0005]

SUMMARY OF THE INVENTION The object of the present invention is to provide a brushless motor control device for estimating a magnetic pole position of a brushless motor by detecting an output voltage of an inverter, wherein an upper arm freewheeling diode and an anode terminal of the inverter are commonly connected. Achieved by providing a second diode means, turning on the constant current switch means according to the current shunted to the second diode, and changing the estimation result of the magnetic pole position according to the output of the constant current switch means. it can.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 shows a first embodiment of an inverter circuit having a magnetic pole position detecting function.

A region 1 surrounded by a dotted line in FIG. 1 is a circuit provided for each of the U, V, and W phases, and FIG. 1 shows the configuration of the U phase. Areas 2, 3, 4, 5, and 6 surrounded by chain lines are circuits related to magnetic pole position detection, and the circuits other than 2 to 6 are circuits provided in a conventional inverter IC. To explain the overall configuration, QUT and QUB are U
These are the output stage switching elements of the upper and lower arms, and use IGBTs here. DUT and DU
B is a freewheeling diode (formally a freewheeling diode) connected in antiparallel to the QUT and the QUB. Each of QUT, QUB, DUT, and DUB is a high-voltage element having a withstand voltage of 250 V or more, and each element in the drawing having the same withstand voltage is surrounded by a circuit symbol in a figure.
That is, M1 to M5 and HD1 are high-voltage elements.

First, a drive circuit related to magnetic pole position detection according to the present invention will be briefly described. QUT of upper arm is M
When 2 turns on, a gate current is supplied. When M4 turns on, an off-gate current flows and the QUT turns off. here,
The power supply VC2 for driving the upper arm is a high-voltage DC power supply VCH (A
The voltage is based on the high potential side of 140 V for a C100V system, and is charged to about 15 V by the charge pump circuit disclosed in US Pat. No. 5,280,228. M2 is transmitted by level-shifting the signal UT based on the low potential side of VCH by M5. Here, M5 is a constant current switch.
The voltage between the gate and source of M5 is reduced by the voltage drop of the resistor R7 provided on the source side, and the current flowing through M5 is suppressed. The current flowing through M5 causes a voltage drop across the resistor R5 connected to VC2, transmitting this signal to the gate of M2 via logic inverters A2 and A3. UT
If is high, the QUT is on; if low, the QUT is off.
On the other hand, the QUB of the lower arm inputs a signal UB based on the low potential side of VCH to a drive circuit composed of A5, M6 and M7.
B turns off.

Next, detection of the magnetic pole position will be described. The output voltage of the U phase has a value equal to the back electromotive force of the motor only during a period when the output stage elements of the QUT, QUB, DUT, and DUB are not conducting. The same applies to other phases. The magnetic pole position can be detected by comparing the output voltage (back electromotive force) with a predetermined voltage. In the area 2, the U-phase output voltage is divided by R1 and R2, and the result is passed through a filter F1 and then compared with a half of the DC high voltage VCH. The output of the comparator CM is input to a logic circuit composed of A4, N3 and N4. Here, when either the QUT or the QUB is on, the outputs of N3 and N4 both become High. When both the QUT and the QUB are off, if the divided value of the output voltage is greater than VCH / 2, N3 is Low and N4 is Hi.
gh, and conversely, if smaller than VCH / 2, N3 is High and N
4 becomes Low. As described above, while the QUT or QUB is on, the detection of the output voltage is masked using the drive signals UT and UB, and the output voltage determination value during the period when the QUT and QUB are off can be selected. . On the other hand, since the recirculation period of the diode cannot be determined from the drive signals UT and UB, it is necessary to estimate the conduction by a microcomputer or measure the voltage of the diode to detect conduction, as in the above-described conventional example. A feature of the present invention is to realize conduction detection of a diode suitable for an IC.

The dashed line regions 3 and 5 related to the detection of conduction of the upper arm diode according to the present invention will be described. When the DUT conducts due to the circulating current, a part of the circulating current flows through the built-in diode of M2 (M2 acts as a diode whose drain and source are a cathode and an anode, respectively, in which connection is made), and C1 To discharge the charge. Then, a High signal is given to the NOR circuit N2. On the other hand, since the QUT is off during the reflux period, the output of A2 applied to N2 is low, and as a result, the output of N2 becomes low. This signal is output from the NAND circuit N
It is conveyed to 1. Here, the recirculation detection signal S from the other phase
Assuming that V and SW are high, the output of N1 becomes high due to the U-phase circulation, and a low signal is transmitted to the gate of M3 via A1. Here, M3 is a constant current switch like M5, and the voltage between the gate and source of M3 is reduced by the voltage drop of the resistor R8 provided on the source side, thereby suppressing the current flowing through M3. The current flowing through M3 causes a voltage drop in the resistor R9 connected to the low potential side of VCH, and the conduction of the upper arm diode can be detected by the presence or absence of this voltage drop.

[0011] Between the drain and source of M3, 155V obtained by adding 15V of VC2 to the high voltage (140V) of VCH.
Is applied most of the time. Here, if the constant current is set to be equal to or less than 0.1 mA, the generated loss is 0.15.
The loss is 15 mW, assuming that W.times. (Duty ratio during the reflux period), and assuming that the duty ratio during the reflux period is 10%. This loss is sufficiently small for the allowable loss of about 5 W of the inverter IC. When the DUT recirculation period ends, the DUT
Is applied with a reverse voltage. At this time, DU is also applied to C1 and M1.
A value obtained by adding 15V of VC2 to the reverse voltage of T (about 70 to 140V) is applied. Most of this voltage is applied to M1, but M1 is a high-voltage element and there is no problem. An advantage of this method is that M3 is connected to the upper arm control power supply VC2 common to the U, V, and W phases, and the U, V, and W upper arms do not recirculate at the same time. The level shift used can be commonly used for the three phases. In addition, in the recirculation detection using M1 as a diode, the current does not flow when a reverse voltage is applied to the DUT, so that the loss is small as compared with the conventional resistance voltage division, and the chip area of M1 is several times smaller than the resistance of MΩ. it can.

The area for detecting conduction of the lower arm diode is 4. When DUB conducts, the cathode voltage of HD1 decreases, a voltage drop occurs in R4, and M9 is turned on. Since M10 is used as a MOS type resistor, M10
When the switch 9 is turned on, the signal extracted from the connection point between M9 and M10 becomes High (this signal is referred to as MUB). In addition, QU
When B is turned on, M8 is also turned on at the same time, shorting the gate and source of M9, and fixing M9 to the off state.

The U-phase magnetic pole position detection results are collected in a region 6. The OR circuit N5 has a signal MUB having passed through the filter F2.
And the chopper signal of the inverter (when this signal is High, the output stage element is turned on), and the state where either the MUB or the chopper signal is High is taken out.
The output of N5, the voltage drop of R9, and the output signals of N3 and N4 are input to OR circuits N6 and N7. QUT, QU
When at least one of the output stage elements of B, DUT, and DUB is conducting or the chopper signal is on, the outputs of N6 and N7 become High. In other states, if the divided value of the output voltage is larger than VCH / 2, N6 is Low and N7 is High.
On the contrary, if it is smaller than VCH / 2, N6 is High and N7
Becomes Low. When N6 becomes Low, flip-flop F
F is set and FF is reset when N7 goes low. Otherwise, the FF maintains the initial state. FF
180 is inverted every zero crossing of the back electromotive force.
Signal.

FIG. 2 shows a second embodiment of the present invention. FIG.
In this embodiment, the conduction of the upper arm freewheeling diode is detected in the regions 3 and 5. However, in the embodiment shown in FIG. The circuit configuration other than the region 7 in FIG.
The description is omitted, and the area 7 is described. When the DUT conducts due to the circulating current, a part of the circulating current is divided between the emitter and the base of the PNP transistor Q1, and the current Q1 is turned on using this current as the base current.
The FET of M11 is connected to the collector terminal of Q1, and M11 is turned on in a period other than the period in which QUT and QUB are turned on and the period in which the chopper signal is turned on. The source terminal of M11 is connected to VC via a resistor R10.
Connect to the low potential side of H. When Q1 is turned on, a part of the circulating current flows between the emitter and collector of Q1 and flows through the constant current switch M11. M11 reduces the gate-source voltage of M11 due to the voltage drop of the resistor R10 provided on the source side, and suppresses the current flowing to M11. Resistance R1
The voltage drop of 0 is inverted by the logic inverter A6,
Input to NAND circuit N8. When a circulating current is flowing through the DUT, the signal of A6 becomes Low and the output of N8 becomes Hi.
gh. Note that the output of N8 is connected to the resistor R9 shown in the area 6, and the determination of position detection in the area 6 is exactly the same as in FIG.

FIG. 3 is a time chart when the magnetic pole position detection according to the present invention is used. The time chart in FIG. 3 shows, from the top, the terminal voltages of the U, V, and W phases, the position detection signals, and the ON periods of the upper and lower arms IGBTs of the U, V, and W phases. As described in the embodiment of FIG. 1, the position detection signal compares the terminal voltage of each phase with the reference voltage of VCH / 2, and when the terminal voltage becomes higher than VCH / 2, the position detection signal becomes High. Become. The periods indicated by Td1 and Td2 in the drawing are periods in which the free-wheeling diodes of the lower arm and the upper arm are conducting, respectively. In this period, the terminal voltage is VCH
Even if it becomes smaller or larger than / 2, according to the detection circuit of the present invention, the position detection signal does not change. Similarly, the position detection signal does not change during the ON period of the chopper signal and the ON period of the upper and lower IGBTs. By delaying the phase of all the position detection signals thus obtained by 30 degrees, and further distributing this signal to the three-phase upper and lower arms according to a predetermined logic, the final phase upper and lower signals are obtained.

[0016]

According to the present invention, the magnetic pole position detection circuit can be incorporated in the inverter IC with low loss and the chip area can be reduced, so that the cost of the IC can be reduced.

[Brief description of the drawings]

FIG. 1 is a first embodiment of an inverter having a magnetic pole position detecting function.

FIG. 2 shows a second embodiment of upper arm recirculation detection.

FIG. 3 is a time chart of position detection.

[Explanation of symbols]

M1 to M11: MOSFET, Q1: PNP transistor, Q
UT, QUB: IGBT, DUT, DUB: freewheel diode, N1 to N7: logic circuit, A1 to A6: logic inverter, R1 to R9: resistor, ZD1 to ZD4 ...
Zener diode, HD1 ... Diode, F1, F2
…filter.

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Masahiro Iwamura 7-1-1, Omika-cho, Hitachi City, Ibaraki Prefecture F-term in Hitachi Research Laboratory, Hitachi Ltd. (Reference) 5H560 BB04 BB12 DA13 EB01 JJ02 RR10 SS02 TT04 TT07 TT08 TT10 UA02 UA06 XA03

Claims (3)

[Claims] 1. A brushless motor control device for detecting an output voltage of an inverter to estimate a magnetic pole position of a brushless motor, wherein a second diode means commonly connected to an upper arm freewheeling diode and an anode terminal of the inverter is provided. A brushless motor control device comprising: turning on a constant current switch according to a current shunted to the second diode; and changing an estimation result of the magnetic pole position according to an output of the constant current switch. . 2. The control circuit according to claim 1, wherein a cathode terminal of said second diode means is connected to a positive electrode of a control power supply having a negative electrode connected to a power supply line on the high potential side of said inverter via impedance means. Characteristic brushless motor control device. 3. The brushless motor control device according to claim 1, wherein an emitter-base junction of a PNP transistor is used as said second diode means.