JP2000122849A5 - - Google Patents

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Publication number
JP2000122849A5
JP2000122849A5 JP1999278473A JP27847399A JP2000122849A5 JP 2000122849 A5 JP2000122849 A5 JP 2000122849A5 JP 1999278473 A JP1999278473 A JP 1999278473A JP 27847399 A JP27847399 A JP 27847399A JP 2000122849 A5 JP2000122849 A5 JP 2000122849A5
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JP
Japan
Prior art keywords
floating
point
control information
status
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP1999278473A
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English (en)
Japanese (ja)
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JP2000122849A (ja
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Publication date
Priority claimed from US09/169,481 external-priority patent/US6151669A/en
Application filed filed Critical
Publication of JP2000122849A publication Critical patent/JP2000122849A/ja
Publication of JP2000122849A5 publication Critical patent/JP2000122849A5/ja
Withdrawn legal-status Critical Current

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JP11278473A 1998-10-10 1999-09-30 浮動小数点計算制御方法 Withdrawn JP2000122849A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/169,481 US6151669A (en) 1998-10-10 1998-10-10 Methods and apparatus for efficient control of floating-point status register
US169481 1998-10-10

Publications (2)

Publication Number Publication Date
JP2000122849A JP2000122849A (ja) 2000-04-28
JP2000122849A5 true JP2000122849A5 (https=) 2006-11-09

Family

ID=22615888

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11278473A Withdrawn JP2000122849A (ja) 1998-10-10 1999-09-30 浮動小数点計算制御方法

Country Status (2)

Country Link
US (1) US6151669A (https=)
JP (1) JP2000122849A (https=)

Families Citing this family (55)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6370639B1 (en) * 1998-10-10 2002-04-09 Institute For The Development Of Emerging Architectures L.L.C. Processor architecture having two or more floating-point status fields
US6453463B1 (en) * 1999-06-07 2002-09-17 Sun Microsystems, Inc. Method and apparatus for providing finer marking granularity for fields within objects
US6374345B1 (en) * 1999-07-22 2002-04-16 Advanced Micro Devices, Inc. Apparatus and method for handling tiny numbers using a super sticky bit in a microprocessor
US6484251B1 (en) * 1999-10-14 2002-11-19 International Business Machines Corporation Updating condition status register based on instruction specific modification information in set/clear pair upon instruction commit in out-of-order processor
US6604188B1 (en) 1999-10-20 2003-08-05 Transmeta Corporation Pipeline replay support for multi-cycle operations wherein all VLIW instructions are flushed upon detection of a multi-cycle atom operation in a VLIW instruction
US6728865B1 (en) 1999-10-20 2004-04-27 Transmeta Corporation Pipeline replay support for unaligned memory operations
US6571265B1 (en) * 1999-10-29 2003-05-27 Intel Corporation Mechanism to detect IEEE underflow exceptions on speculative floating-point operations
US6826682B1 (en) 2000-06-26 2004-11-30 Transmeta Corporation Floating point exception handling in pipelined processor using special instruction to detect generated exception and execute instructions singly from known correct state
US7366749B2 (en) * 2001-05-25 2008-04-29 Sun Microsystems, Inc. Floating point adder with embedded status information
US7016928B2 (en) * 2001-05-25 2006-03-21 Sun Microsystems, Inc. Floating point status information testing circuit
US7395297B2 (en) * 2001-05-25 2008-07-01 Sun Microsystems, Inc. Floating point system that represents status flag information within a floating point operand
US6993549B2 (en) * 2001-05-25 2006-01-31 Sun Microsystems, Inc. System and method for performing gloating point operations involving extended exponents
US6976050B2 (en) * 2001-05-25 2005-12-13 Sun Microsystems, Inc. System and method for extracting the high part of a floating point operand
US6970898B2 (en) * 2001-05-25 2005-11-29 Sun Microsystems, Inc. System and method for forcing floating point status information to selected values
US7069289B2 (en) * 2001-05-25 2006-06-27 Sun Microsystems, Inc. Floating point unit for detecting and representing inexact computations without flags or traps
US7831652B2 (en) * 2001-05-25 2010-11-09 Oracle America, Inc. Floating point multiplier with embedded status information
US7191202B2 (en) 2001-05-25 2007-03-13 Sun Microsystems, Inc. Comparator unit for comparing values of floating point operands
US7363337B2 (en) * 2001-05-25 2008-04-22 Sun Microsystems, Inc. Floating point divider with embedded status information
US7444367B2 (en) * 2001-05-25 2008-10-28 Sun Microsystems, Inc. Floating point status information accumulation circuit
US7228324B2 (en) * 2001-05-25 2007-06-05 Sun Microsystems, Inc. Circuit for selectively providing maximum or minimum of a pair of floating point operands
US6961744B2 (en) * 2001-05-25 2005-11-01 Sun Microsystems, Inc. System and method for generating an integer part of a logarithm of a floating point operand
US7133890B2 (en) * 2001-05-25 2006-11-07 Sun Microsystems, Inc. Total order comparator unit for comparing values of two floating point operands
US7613762B2 (en) * 2001-05-25 2009-11-03 Sun Microsystems, Inc. Floating point remainder with embedded status information
US7003540B2 (en) * 2001-05-25 2006-02-21 Sun Microsystems, Inc. Floating point multiplier for delimited operands
US7069288B2 (en) * 2001-05-25 2006-06-27 Sun Microsystems, Inc. Floating point system with improved support of interval arithmetic
US7430576B2 (en) * 2001-05-25 2008-09-30 Sun Microsystems, Inc. Floating point square root provider with embedded status information
US7219117B2 (en) * 2002-12-17 2007-05-15 Sun Microsystems, Inc. Methods and systems for computing floating-point intervals
US7236999B2 (en) * 2002-12-17 2007-06-26 Sun Microsystems, Inc. Methods and systems for computing the quotient of floating-point intervals
US7243216B1 (en) * 2003-04-25 2007-07-10 Advanced Micro Devices, Inc. Apparatus and method for updating a status register in an out of order execution pipeline based on most recently issued instruction information
US20040221274A1 (en) * 2003-05-02 2004-11-04 Bross Kevin W. Source-transparent endian translation
US20120059866A1 (en) * 2010-09-03 2012-03-08 Advanced Micro Devices, Inc. Method and apparatus for performing floating-point division
US9710270B2 (en) * 2010-12-20 2017-07-18 International Business Machines Corporation Exception control method, system, and program
US10437602B2 (en) 2012-06-15 2019-10-08 International Business Machines Corporation Program interruption filtering in transactional execution
US9367323B2 (en) 2012-06-15 2016-06-14 International Business Machines Corporation Processor assist facility
US9740549B2 (en) 2012-06-15 2017-08-22 International Business Machines Corporation Facilitating transaction completion subsequent to repeated aborts of the transaction
US9436477B2 (en) 2012-06-15 2016-09-06 International Business Machines Corporation Transaction abort instruction
US20130339680A1 (en) 2012-06-15 2013-12-19 International Business Machines Corporation Nontransactional store instruction
US9336046B2 (en) 2012-06-15 2016-05-10 International Business Machines Corporation Transaction abort processing
US9384004B2 (en) 2012-06-15 2016-07-05 International Business Machines Corporation Randomized testing within transactional execution
US8682877B2 (en) 2012-06-15 2014-03-25 International Business Machines Corporation Constrained transaction execution
US9442737B2 (en) 2012-06-15 2016-09-13 International Business Machines Corporation Restricting processing within a processor to facilitate transaction completion
US9317460B2 (en) 2012-06-15 2016-04-19 International Business Machines Corporation Program event recording within a transactional environment
US9361115B2 (en) 2012-06-15 2016-06-07 International Business Machines Corporation Saving/restoring selected registers in transactional processing
US9448796B2 (en) 2012-06-15 2016-09-20 International Business Machines Corporation Restricted instructions in transactional execution
US8688661B2 (en) 2012-06-15 2014-04-01 International Business Machines Corporation Transactional processing
US9348642B2 (en) 2012-06-15 2016-05-24 International Business Machines Corporation Transaction begin/end instructions
US9772854B2 (en) 2012-06-15 2017-09-26 International Business Machines Corporation Selectively controlling instruction execution in transactional processing
US10725739B2 (en) 2017-06-23 2020-07-28 International Business Machines Corporation Compiler controls for program language constructs
US10740067B2 (en) 2017-06-23 2020-08-11 International Business Machines Corporation Selective updating of floating point controls
US10310814B2 (en) * 2017-06-23 2019-06-04 International Business Machines Corporation Read and set floating point control register instruction
US10514913B2 (en) 2017-06-23 2019-12-24 International Business Machines Corporation Compiler controls for program regions
US10379851B2 (en) 2017-06-23 2019-08-13 International Business Machines Corporation Fine-grained management of exception enablement of floating point controls
US10684852B2 (en) 2017-06-23 2020-06-16 International Business Machines Corporation Employing prefixes to control floating point operations
US10481908B2 (en) 2017-06-23 2019-11-19 International Business Machines Corporation Predicted null updated
US10564931B1 (en) * 2018-04-05 2020-02-18 Apple Inc. Floating-point arithmetic operation range exception override circuit

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5696955A (en) * 1994-06-01 1997-12-09 Advanced Micro Devices, Inc. Floating point stack and exchange instruction
US5687359A (en) * 1995-03-31 1997-11-11 International Business Machines Corporation Floating point processor supporting hexadecimal and binary modes using common instructions with memory storing a pair of representations for each value
US5787026A (en) * 1995-12-20 1998-07-28 Intel Corporation Method and apparatus for providing memory access in a processor pipeline

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