JP2000114489A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a highly reliable stacked capacitor type semiconductor device. SOLUTION: After an access transistor 2, a bit line 6 and a first interlayer insulating film 4 are formed on a semiconductor substrate 1, a plug 8 for electrically connecting the access transistor 2 and a ferroelectric capacitor 9 is formed in a contact hole provided in a predetermined region in the first interlayer insulating film 4. Then, a lower electrode 10 comprising a laminated film, a ferroelectric film 11 and a first upper electrode 14 are laminated sequentially. Subsequently, after an insulating film for sidewall 16 comprising a silicon oxide film, etc., is formed on the entire wafer surface, the entire surface of the insulating film for sidewall is anisotropically etched to form a sidewall 16S. Finally, a second upper electrode 17 comprising Pt, etc., is formed to form the ferroelectric capacitor 9.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor device having a capacitor using a ferroelectric film and a method of manufacturing the same, and more particularly to a stacked capacitor type memory cell.

[0002]

2. Description of the Related Art In recent years, the development of digital technology and the high performance of portable devices have become remarkable, and there has been a strong demand from the market for high integration of nonvolatile semiconductor memory devices which can operate at low power consumption and at high speed. The ferroelectric material has a feature that information given by external electrolysis is stored at high speed by displacement of constituent atoms, and that information is kept stored even after the external electrolysis is stopped. An excellent semiconductor device can be realized by using a dielectric film.

A highly integrated semiconductor memory device having a stacked capacitor type memory cell structure using this ferroelectric material for a dielectric film of a capacitor (hereinafter referred to as a ferroelectric nonvolatile semiconductor memory device) is disclosed in Japanese Patent Application Laid-Open No. HEI 10-202566. No. 6,132,482, JP-A-9-116123, and the like.

Hereinafter, a conventional ferroelectric nonvolatile semiconductor memory device and a method of manufacturing the same will be described with reference to the drawings.

As shown in FIG. 6, a ferroelectric nonvolatile semiconductor memory device has an access transistor 2 formed on a semiconductor substrate 1 and a source portion 3 of the access transistor 2.
A bit line 6 electrically connected through a contact hole provided in the first interlayer insulating film 4 and the second interlayer insulating film 5, and a drain portion 7 of the access transistor 2;
And a ferroelectric capacitor 9 electrically connected through a plug 8. Here, a ferroelectric film 11 is formed on a lower electrode 10 of a ferroelectric capacitor 9, and a sidewall 1 made of an insulating film is formed on these side surfaces.
2 are provided. The upper electrode 13 is formed on the ferroelectric film 11 and the side walls 12 so as to directly cover them.

[0006]

However, in such a conventional example, the side wall 12 is formed by etching the lower electrode 10 and the ferroelectric film 11 of the ferroelectric capacitor 9 and forming an insulating film serving as the side wall 12. After the film is deposited on the entire surface by the CVD method, the entire surface of the insulating film is anisotropically etched to be formed on the side surfaces of the lower electrode 10 and the ferroelectric film 11. However, when such a method is used, the ferroelectric film 11, which is a metal oxide, is damaged over the entire surface at the time of anisotropic etching, and the composition shift and the disorder of the crystal structure are severely generated.

For example, when the ferroelectric film 11 is made of SrBi ₂ Ta ₂
When an O ₉ film is used and a silicon oxide film is used for the sidewalls 12 made of an insulating film, and when the silicon oxide film is anisotropically etched using an etching gas such as CF ₄ , anisotropic etching is performed. Upon completion, the ferroelectric film 11
Although the surface of the SrBi ₂ Ta ₂ O ₉ film is exposed, a silicon oxide film may remain on the ferroelectric film 11 at this time.

Here, the silicon oxide film is formed of the ferroelectric film 11.
When remaining on the upper surface, the upper electrode 13 / ferroelectric film 11 / lower electrode 10 should be originally formed. However, the upper electrode 13 / silicon oxide film / ferroelectric film 11 / lower electrode 10 is formed. The voltage applied between the upper electrode 13 and the lower electrode 10 is also distributed to the silicon oxide film connected in series with the ferroelectric film, and the voltage applied to the ferroelectric film 11 is reduced. The polarization inversion of No. 11 becomes insufficient, resulting in a characteristic defect that the residual charge amount decreases. For this reason, when etching the silicon oxide film, it is necessary to perform over-etching in accordance with the in-wafer variation in the etching rate of the silicon oxide film and the in-wafer variation in the deposition amount of the silicon oxide film. During this over-etching, the entire surface of the SrBi ₂ Ta ₂ O ₉ film, which is the ferroelectric film 11, is exposed to the etching plasma of the silicon oxide film, thereby causing oxygen deficiency. It has been confirmed by the inventor's experiment that the deficiency of the main component atoms also occurs.

This damage cannot be recovered by a subsequent heat treatment or the like, and a ferroelectric capacitor having excellent electric characteristics cannot be manufactured. As a result, there is a problem that a highly reliable ferroelectric nonvolatile semiconductor memory device cannot be realized.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and does not cause damage to a ferroelectric film even during anisotropic etching of an insulating film for forming a sidewall. It is an object of the present invention to realize a highly reliable semiconductor device by eliminating deterioration of electrical characteristics of a body film.

[0011]

According to a first aspect of the present invention, there is provided a semiconductor device having a capacitor comprising an upper electrode, an insulating film, and a lower electrode. A protective film for an insulating film, and a sidewall is provided on at least a side portion of the insulating film and the protective film for the insulating film.

According to a second aspect of the present invention, there is provided a semiconductor device having a capacitive element in which an insulating film interposed between an upper electrode and a lower electrode is formed of a ferroelectric film.
A ferroelectric film protective film is provided between the ferroelectric film and the upper electrode, and a sidewall is provided on at least a side portion of the ferroelectric film and the ferroelectric film protective film. It is a feature.

According to these structures, since the first upper electrode covers the surface of the ferroelectric film when the sidewall is formed, the surface of the ferroelectric film is not exposed to plasma, and an excellent ferroelectric film is formed. A ferroelectric capacitor having body characteristics and insulating characteristics can be obtained. Further, even if the first upper electrode is damaged during the formation of the sidewall, the electrode performance does not deteriorate because the second upper electrode is formed on the upper electrode.

According to a seventh aspect of the present invention, in the method of manufacturing a semiconductor device, the lower electrode, the ferroelectric film, and the ferroelectric protective film are sequentially formed, and then the sidewall is formed at least by the anisotropic etching. It is formed on the side of the dielectric film and the protective film for ferroelectric film, and an upper electrode is formed on the sidewall and the protective film for ferroelectric film.

According to a tenth aspect of the present invention, in the method of manufacturing a semiconductor device according to the seventh aspect, a sidewall is formed by anisotropic etching for forming the ferroelectric film and the ferroelectric film. After forming on the side of the protective film, before forming an upper electrode on the sidewalls and on the ferroelectric protective film, a step of removing etching residue on the surface of the ferroelectric film protective film is performed. It is characterized by having.

According to these methods, in addition to the above-mentioned functions and effects, it is possible to remove the etching residue remaining on the ferroelectric protective film before forming the upper electrode.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view of a main part of a semiconductor device according to an embodiment of the present invention, which is shown in FIGS.
5E to 5G are process cross-sectional views illustrating a method for manufacturing a semiconductor device in the embodiment of the present invention. In addition, FIG.
2 and 3, the same components as those in FIG. 6 will be described using the same reference numerals.

First, as shown in FIG. 2A, after forming an access transistor 2 as an integrated circuit on a semiconductor substrate 1, a bit line 6 made of a polycide film or the like is formed, and then the access transistor 2 and the bit line An interlayer insulating film 4 made of BPSG or the like is formed on 6. Thereafter, a contact hole is formed in a predetermined region of the first interlayer insulating film 4. Thereafter, a plug 8 for electrically connecting the access transistor 2 and the ferroelectric capacitor 9 is formed in the contact hole. The plug 8 embeds polycrystalline polysilicon, tungsten, or the like in the contact hole, and then removes the polycrystalline polysilicon, tungsten, or the like other than the contact hole by an etch-back method, a chemical mechanical polishing method, or the like.

Next, after a lower electrode 10 composed of a laminated film in which an adhesion layer, a barrier metal and Pt are laminated in this order is formed on the entire surface of the wafer to a thickness of about 200 nm, the ferroelectric film 11 composed of SrBi ₂ Ta ₂ O ₉ is spun. 150 by coating method, CVD method, etc.
It is formed on the order of nm. After that, the first upper electrode 14 made of Pt is formed by laminating about 50 nm.

Thereafter, as shown in FIG. 2B, the first upper electrode 14, the ferroelectric film 11 and the lower electrode 1 are formed using a lower electrode processing mask 15 made of a photoresist or the like.
0 is dry-etched using a mixed gas of, for example, Ar and Cl, and processed and formed into substantially the same shape.

Thereafter, as shown in FIG. 2C, after the lower electrode processing mask 15 made of a photoresist or the like is removed by ashing or the like, the side wall insulating film 16 made of a silicon oxide film or the like is removed to a thickness of, for example, 300 nm. It is formed on the entire surface of the wafer with a film thickness of the order.

Then, as shown in FIG. 2D, the sidewall insulating film 16 formed on the entire surface of the wafer is anisotropically etched on the entire surface by using an etching gas such as CF _4, so that the sidewall 16S is formed. To form

Thereafter, as shown in FIG. 3E, a second upper electrode 17 made of Pt or the like having a thickness of, for example, about 100 nm is formed on the entire surface of the wafer, and is then formed of a photoresist or the like for processing the upper electrode. A mask 18 is formed.

Thereafter, as shown in FIG. 3F, the second upper electrode is formed by dry etching using a mixed gas such as Ar and Cl using an upper electrode processing mask 18 made of photoresist or the like. 17 is formed so as to cover the entire ferroelectric film 11 or to cover the entire first electrode and the sidewall 16S formed on the ferroelectric film 11. Further, the second upper electrode 17
It is formed to be thicker than the first upper electrode 14. Thus, a ferroelectric capacitor is formed.

Finally, as shown in FIG. 3 (g), a second interlayer insulating film 5 is formed on the semiconductor substrate having the ferroelectric capacitor 18, and is formed in a predetermined region of the insulating film. After forming a wiring 19 made of an Al film or the like reaching the second upper electrode 17 and the bit line 6 via the contact hole, a silicon nitride film 20 or the like as a final protective film is formed to complete the semiconductor device.

FIG. 4 is a diagram comparing the hysteresis characteristics of the ferroelectric capacitor in the case where the semiconductor device according to the present embodiment is used (curve a) and in the case where the conventional semiconductor device is used (curve b). is there.

The method of measuring the data in FIG.
For example, by applying a pulse of an appropriate electric field between the upper electrode and the lower electrode of the ferroelectric capacitor by the Soyer tower method or the like, it is possible to evaluate the hysteresis characteristic of the accumulated electric charge-applied electric field.

As is apparent from FIG. 4, the electric field applied to the ferroelectric capacitor is 150 kV / cm to -150 k.
When applied in the range of V / cm, when the conventional semiconductor device was used, the applied electric field was 0 in the hysteresis characteristic.
The difference of the accumulated charge amount at kV / cm is about 11 μC / cm.
^In contrast, when the semiconductor device according to the embodiment of the present invention was used, the difference in the amount of accumulated charge was about 22 μC
/ Cm ^{2, which} is significantly improved. Therefore, it can be seen that the hysteresis characteristic of the ferroelectric capacitor according to the embodiment of the present invention has a larger accumulated charge amount and is superior in the storage characteristic as compared with the hysteresis characteristic of the conventional ferroelectric capacitor.

FIG. 5 compares the current-voltage characteristics of the ferroelectric capacitor when using the semiconductor device according to the present embodiment (curve c) and when using the conventional semiconductor device (curve d). FIG.

In the data measurement in FIG. 5, the current flowing through the ferroelectric capacitor was measured while increasing the voltage applied between the upper electrode and the lower electrode of the ferroelectric capacitor, and the current-voltage characteristics were evaluated. Things.

As apparent from FIG. 5, the ferroelectric capacitor
When an applied voltage of about 0 V to 6 V is applied to the
When a conventional semiconductor device is used, a current of 10^-3A /
cm ^TwoIn contrast to the above, the embodiment of the present invention
When the semiconductor device in the state is used, 10^-6A / c
m^TwoDoes not flow, and the leakage current when applying a voltage
It can be seen that the insulating properties are extremely small and show good insulating properties.

In the present embodiment, the ferroelectric film 11
Is used as an insulating film interposed between the upper electrodes 14 and 17 and the lower electrode 10, but good insulating properties can be obtained by using an insulating film made of a normal SiO ₂ film or the like instead of the ferroelectric film 11. Has the effect that can.

In the present embodiment, the ferroelectric film 11
As has used the SrBi ₂ Ta ₂ O _9, even SrBi ₂ Ta ₂ O ₉ with Nb in place of Ta, also those in a mixing ratio in the both, also, Sr, Bi,
Needless to say, a material having a different composition ratio such as Ta may be used, and the same effect can be obtained by using a ferroelectric material of another material such as a PZT film.

The ferroelectric film 11 is preferably a ferroelectric film having a bismuth layered perovskite structure.

In this embodiment, the case where the bit line 6 is formed below the ferroelectric capacitor has been described. However, the same applies to the case where the bit line 6 is formed above the ferroelectric capacitor. Needless to say, the effect is obtained.

In the present embodiment, a laminated film in which an adhesion layer, a barrier metal, and Pt are laminated in this order is used as the lower electrode 10, but a laminated film containing at least platinum or platinum and iridium oxide is used. The same effect can be obtained.

In this embodiment, Pt is used for the first upper electrode 14 and the second upper electrode 17,
The same effect can be obtained even if the first upper electrode 14 and the second upper electrode 17 are made of at least platinum or a stacked film containing platinum and iridium oxide.

In this embodiment, FIGS. 1 and 3
As shown in (g), the case where the wiring 19 made of an Al film or the like is connected to the second upper electrode 17 at one place is illustrated. Since the second upper electrode 17 electrically connects the plurality of ferroelectric capacitors, if the wiring 19 is connected to the second upper electrode 17 at one place, the wiring 19 is connected to the plurality of ferroelectric capacitors 9. Connected to. However, the wiring 19
May be connected to the upper electrode 17 at a plurality of locations.

The present invention is not limited to the numerical values described in the above embodiment, but preferably has the following ranges. -Thickness of lower electrode 10: 50 nm to 300 nm. -Thickness of ferroelectric film 11 made of SrBi ₂ Ta ₂ O ₉ :
50 nm to 300 nm. The thickness of the first upper electrode 14 made of Pt: 20 nm or more
100 nm.・ Insulating film 1 for sidewall made of silicon oxide film etc.
6, thickness: 100 nm to 500 nm. -Thickness of second upper electrode 17 made of Pt or the like: 50 nm
３００300 nm.

[0041]

As described above, according to the present invention, since the first upper electrode covers the surface of the ferroelectric film,
Even during the anisotropic etching of the insulating film for forming the sidewall, the surface of the ferroelectric film is not exposed to plasma and is not damaged. Therefore, according to the present invention, a ferroelectric capacitor having excellent ferroelectric characteristics and insulating characteristics can be obtained without deteriorating the electric characteristics of the ferroelectric film. It can be realized.

[Brief description of the drawings]

FIG. 1 is a sectional view of a main part of a semiconductor device according to an embodiment of the present invention;

FIG. 2 is a manufacturing process diagram of the semiconductor device according to the embodiment of the present invention;

FIG. 3 is a manufacturing process diagram of the semiconductor device.

FIG. 4 is a comparison diagram of hysteresis characteristics between a semiconductor device according to an embodiment of the present invention and a conventional semiconductor device.

FIG. 5 is a comparison diagram of current-voltage characteristics of a semiconductor device according to an embodiment of the present invention and a conventional semiconductor device.

FIG. 6 is a diagram showing a partial cross section of a conventional semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Access transistor 3 Source part 4 First interlayer insulating film 5 Second interlayer insulating film 6 Bit line 7 Drain part 8 Plug 9 Ferroelectric capacitor 10 Lower electrode 11 Ferroelectric film 14 First upper electrode 16S Side wall 17 Second upper electrode 19 Wiring 20 Protective film

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) H01L 29/788 29/792

Claims (10)

[Claims] 1. A semiconductor device having a capacitor comprising an upper electrode, an insulating film and a lower electrode, comprising a protective film for the insulating film between the insulating film and the upper electrode, wherein at least the insulating film and the protective film for the insulating film are provided. A semiconductor device in which a sidewall is provided on a side portion of a protective film. 2. A semiconductor device having a capacitive element in which an insulating film interposed between an upper electrode and a lower electrode includes a ferroelectric film, wherein a protective film for a ferroelectric film is provided between the ferroelectric film and the upper electrode. A semiconductor device comprising: a side wall provided at least on a side portion of the ferroelectric film and the protective film for the ferroelectric film. 3. The semiconductor device according to claim 2, wherein said protective film for a ferroelectric film is made of a conductive material. 4. The semiconductor device according to claim 3, wherein said protective film for a ferroelectric film is made of the same material as said upper electrode. 5. The semiconductor device according to claim 4, wherein said upper electrode is platinum or a laminated film of platinum and iridium oxide. 6. The semiconductor device according to claim 2, wherein said ferroelectric film has a bismuth layered perovskite structure. 7. After a lower electrode, a ferroelectric film and a ferroelectric protective film are sequentially formed, a sidewall is formed at least on the side of the ferroelectric film and the ferroelectric film protective film by anisotropic etching. And forming an upper electrode on the side wall and the ferroelectric protective film. 8. The semiconductor device according to claim 7, wherein the step of forming a ferroelectric film and a ferroelectric protective film in a predetermined shape on the lower electrode includes forming the lower electrode, and forming the ferroelectric film on the lower electrode. Forming a ferroelectric film and a ferroelectric protective film sequentially, and then patterning the lower electrode, the ferroelectric film and the ferroelectric protective film in substantially the same shape. Semiconductor device manufacturing method. 9. A first insulating film is formed on a substrate on which a semiconductor integrated circuit is formed, and a plug connected to a source region or a drain region of the semiconductor integrated circuit is connected to a predetermined portion of the first insulating film. Forming a lower electrode connected to the plug, forming a ferroelectric film and a ferroelectric protective film on the lower electrode in order, and then performing anisotropic etching on the lower electrode. A method for manufacturing a semiconductor device, wherein a sidewall is formed on a side portion of the ferroelectric film and the protective film for a ferroelectric film, and an upper electrode is formed on the sidewall and the protective film for a ferroelectric film. 10. A sidewall is formed on the side of the ferroelectric film and the protective film for a ferroelectric film by anisotropic etching, and then an upper portion is formed on the sidewall and on the protective film for a ferroelectric. The method of manufacturing a semiconductor device according to claim 7, further comprising removing an etching residue on a surface of the ferroelectric film protective film before forming the electrode.