JP2000105703A - Image forming device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To protect an image forming device at the time of program driving from an IC card by using the same boot programs on the IC card a flash ROM, etc. SOLUTION: The image forming device is equipped with a control board 102 which controls the whole device according to a control program, the flash ROM 20 which stores the control program, the IC card 107 which is freely attached to and detached from the device main body and stores the control program, etc., an IC card detection part 206 which detects the connection state of the IC card 107 and outputs a detection signal, and a specific SW 106 which selects the use of the IC card 107. When the select signal of the specific SW 106 is ON and the connection of the IC card 107 is detected, the control board 102 boots the program at the same boot part with a downloadable program stored on the IC card 107 and additional information regarding image formation and changes the execution area to an area on the flash ROM 204 after the boot area program execution is completed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image forming apparatus such as a copying machine, a facsimile, and a printer. More specifically, the same boot program is stored on an external storage device such as an IC card and a main storage device such as a flash ROM. The present invention relates to an image forming apparatus that is used to protect an apparatus at the time of occurrence of erroneous data boot or incomplete boot due to interruption of down / upload when driving a program from an external storage device.

[0002]

2. Description of the Related Art Conventionally, in an image forming apparatus such as a copying machine, a program for controlling the apparatus is stored in an EPROM.
And store it in the EPROM in the device.
The control is executed by reading out the program by the CPU. However, when the program is changed due to a bug, a design change, or the like, it is necessary to replace the EPROM in which the program is stored with the EPROM after the change. However, this EPROM replacement work requires E
The device must be disassembled to a level where the PROM can be replaced, and if the device is in a finished product or in a packaged state, the replacement operation takes an enormous amount of time.

[0003] In recent years, in order to reduce the above-mentioned replacement work, in many cases, flash ROMs hold programs. Therefore, when updating the program, the program may be downloaded from the external storage device such as an IC card to the flash ROM.
Work time for updating the program is greatly reduced.

When an IC card is used, a method of using the IC card as an optional program, such as adding a data table of a control program of a device main body on a flash ROM, has been considered. In this case, the user
By attaching and connecting the C card, it is possible to use additional functions other than the desired standard specifications.

[0005] It should be noted that IC cards can be connected to devices, and there are also IC cards that are identical in hardware.
In other words, the data stored in the IC card is not limited to driving the apparatus, but also includes a variety of data such as font data and additional data necessary for control.

[0006] Further, as a reference technical document for downloading a program or data stored in an external storage device and changing a control program of the device main body,
For example, JP-A-8-328427 and JP-A-10-108
An "image forming apparatus" disclosed in Japanese Patent Application Laid-Open No. 10-79979 is known.

[0007]

However, in the prior art as described above, an IC card which is not used for controlling the drive of the device matches a connection port of the device body and is erroneously inserted. When set, the data is different from the original data, and there is a problem that the device is damaged by erroneous data booted.

In the case of the "image forming apparatus" disclosed in the above-mentioned conventional publication, the power supply is shut off during downloading or uploading, and an incomplete program exists in an IC card or flash ROM. When the boot process is performed, there is a problem that the device is damaged.

The present invention has been made in view of the above, and has been made in consideration of an external storage means such as an IC card and a flash ROM.
It is a first object of the present invention to use the same boot program on the main body side storage means and realize device protection when the program is driven from the external storage means.

It is a second object of the present invention to protect a device and realize an efficient boot process even when booting is performed by an incomplete program caused by interruption of download / upload. .

[0011]

In order to achieve the above object, in the image forming apparatus according to the first aspect, a main body control means for controlling the entire apparatus based on a control program; A storage unit for storing the main unit, an external storage unit that is detachably attached to the apparatus main body and stores the control program and / or the option program, and a connection state of the external storage unit. In an image forming apparatus comprising: a detection unit that outputs a signal; and a selection unit that selects use of the external storage unit, the main body control unit determines that a selection signal from the selection unit is ON, and the detection unit outputs the external signal. If the connection of the storage means is detected, the same boot program and image form as the downloadable program stored on the external storage means Boot the additional information relating to, after completion of execution boot area program and changes the execution region to region on the main body side storage unit.

Further, the image forming apparatus according to the present invention further comprises display means for displaying and outputting the state of the apparatus, wherein the main body control means sets a selection signal from the selection means to ON, and When the detection means detects the connection of the external storage means, boots from a program stored in the external storage means, and changes the execution area to an area on the main body storage means after execution of the boot area program is completed. , A predetermined message is displayed on the display means.

Further, in the image forming apparatus according to the third aspect, the main body control unit may be configured to execute the operation when the selection signal from the selection unit is ON and the connection of the external storage unit is detected by the detection unit. In addition, when it is determined that the boot program of the main body side storage means does not match the boot program of the external storage means, a permanent loop process irrelevant to the operation of the image forming apparatus is executed.

Further, in the image forming apparatus according to the fourth aspect, a main body control means for controlling the entire apparatus based on a control program, a main body side storage means for storing the control program, and An external storage unit which is detachably mounted and stores the control program and / or the option program; a detection unit which detects a connection state of the external storage unit and outputs a detection signal; and a use of the external storage unit. Selecting means for selecting, when the selection signal from the selecting means is ON and the connection of the external storage means is detected by the detection means, Booting a program in a boot portion identical to the downloadable program stored on the device and additional information relating to image formation; After the execution of the area program, the execution area is changed to an area on the main body side storage means, and when it is determined that the boot program of the main body side storage means does not match the boot program of the external storage means at the time of the change, image forming An image forming apparatus that performs a permanent loop process irrelevant to the operation of the apparatus.

Further, in the image forming apparatus according to the fifth aspect, a main body control means for controlling the entire apparatus based on a control program, a main body side storage means for storing the control program, and An external storage unit which is detachably mounted and stores the control program and / or the option program; a detection unit which detects a connection state of the external storage unit and outputs a detection signal; and a use of the external storage unit. Selecting means for selecting, the main body control means determines that the selection signal of the selection means is ON, the apparatus power is turned on, and the connection of the external storage means is detected by the detection means. In the case, the same boot portion program as the downloadable program stored on the external storage means and an additional Boot the distribution, to determine the operable execution region if the external storage device or the main body side storage unit,
This is to change the execution area.

Further, in the image forming apparatus according to the present invention, the main body control means for controlling the entire apparatus based on the control program; the main body side storage means for storing the control program; An external storage unit which is detachably mounted and stores the control program and / or the option program; a detection unit which detects a connection state of the external storage unit and outputs a detection signal; and a use of the external storage unit. Selecting means for selecting, the main body control means detects that the selection signal of the selection means is OFF, the apparatus power is turned on, and the connection of the external storage means is detected by the detection means. If
The program of the same boot part as the downloadable program stored on the main body side storage means and the additional information relating to image formation are booted, and the operable execution of the external storage means or the main body side storage means is performed. The region is determined, and the execution region is changed.

Further, in the image forming apparatus according to the present invention, if the main body side storage means and the external storage means have no operable program, the main body control means performs the operation of the image forming apparatus. This is to execute processing of an unrelated permanent loop.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an image forming apparatus according to the present invention will be described in detail with reference to the accompanying drawings.

(Configuration Example 1) FIG. 1 is a block diagram showing a main configuration of an image forming apparatus according to an embodiment. The image forming apparatus 100 includes an image forming unit 101 that forms an image corresponding to image data by a predetermined image forming process (for example, an electrophotographic process, an inkjet, a thermal, or the like).
And a control board 102 as a main body control unit for executing control of the entire image forming apparatus 100 based on a predetermined control program, and a display unit such as an LCD. A display unit 103 for displaying a message or the like; a power supply 104 for supplying power to the image forming unit 101 and the control board 102;
The power supply SW 105 includes a power supply SW 105 for turning on / off the power supply 04 and a specific SW 106 as selection means for selectively turning on when the IC card 107 is used and outputting a signal XSW.

The image forming apparatus 100 includes a control board 1
The IC card 107 as an external storage means is inserted and connected via the external device 02 (see FIG. 3).
The IC card 107 stores a control program or an option program for booting into a flash ROM described later.

FIG. 2 is a block diagram showing the configuration of the control board 102 in FIG. In the figure, reference numeral 201 denotes a CPU that outputs a boot device selection signal to a peripheral control IC 202, and 202 denotes an output signal XSW of a specific SW 106.
And a boot device selection signal from the CPU 201 and a reset signal XRESET, I
Detection signals XCD1 and XCD from C card detection section 206
2 is a peripheral control IC that outputs a flash ROM selection signal to the flash ROM 204 and an IC card selection signal to the IC card connection unit 205 based on the C.I.

Reference numeral 203 denotes a reset signal XRESET.
IC is output to the CPU 201 and the peripheral control IC 202, 204 is a flash ROM as a main body side storage means for storing a control program of the CPU in the image forming apparatus 100, and 205 is an IC card connection for inserting and connecting the IC card 107. Reference numeral 206 denotes an IC card detection unit (see FIG. 3) as detection means for detecting the inserted state of the IC card 107 and outputting detection signals XCD1 and XCD2 to the peripheral control IC 202.

FIG. 3 shows the IC card detecting unit 2 in FIG.
FIG. 10 is an explanatory diagram showing a configuration example of a contact detection terminal No. 06 in an IC of the image forming apparatus 100 (system side).
This is to check whether the IC card 107 is correctly inserted into the card detection unit 206. In FIG.
The two terminals $ CD1 and $ CD2 of the IC card 107 are grounded to GND inside the card and pulled up to Vcc on the system side.
2 is detected to detect the state of card insertion from the system side.

FIG. 4 shows the peripheral control IC 20 according to the first configuration example.
FIG. 2 is a block diagram illustrating a configuration of a second boot device selection circuit. In the figure, reference numeral 401 denotes a logic gate for inputting the negative logic of the detection signals XCD1 and XCD2 output from the IC card detection unit 206 and outputting a negative logic AND output, and 402 denotes the signal XSW output from the specific SW 106 and the reset signal I
A logic gate for inputting the signal XRESET output from C203 with negative logic, and performing a negative logic AND processing output of the two signals; an inverter 403 for inputting the signal XSW and supplying the output to a logic gate 404; Is a logic gate for inputting the signal from the inverter 403 and the signal XRESET in negative logic, respectively, and performing a negative logic AND output. Reference numeral 405 denotes a PR terminal (PR
ESET), the output of the logic gate 404 is connected to the CLR terminal (CLEAR), and the output terminal ￣Q is supplied to the logic gate 406. The flip-flop 406 is a boot device selection signal and the logic gate 401, the flip-flop 405. Are output as negative logic inputs, perform a negative logic AND output, and output an IC card selection signal.

(Operation of Configuration Example 1) Next, the operation of the peripheral control IC 202 configured as described above will be described.
FIG. 5 is a timing chart showing the operation of the peripheral control IC 202. In the figure, (A) shows a reset IC 20
The signal XRESET, (B) output from the third SW is a specific SW
The signals XSW and (C) output from 106 are detection signals XCD1 and XCD output from IC card detection unit 206.
2, (D) is a boot device selection signal output from the CPU 201, and (E) is an IC card selection signal output from the logic gate 406.

In FIG. 4, detection signals XCD1 and XCD2 (see FIG. 5C) from the IC card detection unit 206 are supplied to the input terminals (negative logic inputs) of the logic gate 401, respectively. Is supplied to the logic gate 406. The logic gate 402 has a reset signal XRESET from the reset IC 203 (FIG. 5).
(A) and the input signal XSW (see FIG. 5B) of the specific SW 106 are input with negative logic, and the negative logic
The D output is provided to the PR terminal of flip-flop 405.

The logic gate 404 has a reset I
The reset signal XRESET from C203 and the input signal XSW of the specific SW 106 via the inverter 403 are input, and the AND output of the negative logic is input to the CLR terminal of the flip-flop 405. And flip
The output ￣Q of the flop 405 is supplied to the logic gate 406. On the other hand, the logic gate 406 has an input terminal (negative logic input).
Is supplied with a boot device selection signal from the CPU 201 (see FIG. 5D).

In the logic gate 406, the boot device selection signal and the IC card detection unit 2 from the logic gate 401
06 detection signals XCD1 and XCD2 output,
From the ￣Q output of the flop 405, AND output of negative logic is performed, and an IC card selection signal (see FIG. 5E) is output.

That is, the peripheral control IC 202 of FIG.
When the reset signal XRESET of the reset IC 203 is released and the output signal XSW of the specific SW 106 is not turned on, the operation is not performed. On the other hand, the reset IC 20
3, the reset signal XRESET is released and the specific S
When the output signal XSW of W106 is turned on and the IC card 107 is connected, a boot device selection signal from the CPU 201 is output as an IC card selection signal (chip select signal to the IC card 107).

Further, in addition, if the specific SW 106 is O
With the FF and the IC card 107 not connected,
When the power supply 104 is turned on, the peripheral control IC 202 outputs a flash ROM selection signal to the flash ROM 20.
4, the program on the flash ROM 204 is called by the CPU 201, and the CPU 201 starts operation (basic operation 1). On the other hand, when the power supply 104 is turned on while the specific SW 106 is ON and the IC card 107 is connected, an IC card selection signal is output to the IC card 107 by the peripheral control IC 202 and Is the CPU 20
1 and the CPU 201 starts operation (basic operation 2).

By the way, the state where the IC card 107 is not connected or the detection signal indicating the connection state of the two normally prepared IC cards 117 is ON, that is, incomplete connection Attempting to boot with the IC card 107 in this state may adversely affect the main body program and the device itself.

Therefore, in the following configuration example 2, the connection of the IC card 107 is not detected by the IC card detection unit 206 when the power supply 104 is turned on while operating the specific SW 106, in contrast to the above-described configuration example 1 and operation. In this case, an example of booting with a program on the flash ROM 204 will be described with reference to FIGS.

(Structure Example 2) FIG. 6 is a block diagram showing a boot device selection circuit structure of the peripheral control IC 202 according to Structure Example 2. This peripheral control IC 202 is different from FIG. 4 in that a detection signal XCD1 from the IC card detection unit 206,
XCD2 is input, and an inverter 601 supplying the output to a logic gate 602, a boot device selection signal, an output ￣Q of the flip-flop 405, and an output signal of the inverter 601 are input with negative logic, and a negative logic AND is input.
Perform processing. And a logic gate 602 for outputting a flash ROM selection signal. In addition,
The other components and their functions are the same as those in the configuration example 11, and thus are denoted by the same reference numerals as in FIG. 4 and description thereof is omitted.

(Operation of Configuration Example 2) Next, the operation of the peripheral control IC 202 configured as described above will be described.
FIG. 5 is a timing chart showing the operation of the peripheral control IC 202 according to the second embodiment. In the figure, (A)
Is the signal XRESE output from the reset IC 203
T and (B) are signals XS output from the specific SW 106
W and (C) are detection signals XCD1 and XCD2 output from the IC card detection unit 206, (D) is a boot device selection signal output from the CPU 201, and (E) is an IC card selection signal output from the logic gate 406. , (F) are flash ROM selection signals output from the logic gate 602.

In FIG. 6, detection signals XCD1 and XCD2 (see FIG. 7C) from the IC card detection section 206 are supplied to the input terminals (negative logic inputs) of the logic gate 401, respectively. Further, the negative logic AND processing output of the logic gate 401 is supplied to the logic gate 602 via the logic gate 406 and the inverter 601. The logic gate 402 includes a reset signal XRESE from the reset IC 203.
T (see FIG. 7A) and the input signal X of the specific SW 106
SW (see FIG. 7B) is input with negative logic, and an AND output of this negative logic is supplied to the PR terminal of the flip-flop 405.

The reset I is applied to the logic gate 404.
The reset signal XRESET from C203 and the input signal XSW of the specific SW 106 via the inverter 403 are input, and the AND output of the negative logic is input to the CLR terminal of the flip-flop 405. And flip
The output ￣Q of the flop 405 is supplied to the logic gate 406. On the other hand, the logic gate 406 has an input terminal (negative logic input).
Is supplied with a boot device selection signal from the CPU 201 (see FIG. 7D).

In the logic gate 406, the boot device selection signal and the IC card detection unit 2 from the logic gate 401
A negative logic AND output is performed based on the detection signals XCD1 and XCD06 output of # 06 and the ￣Q output of the flip-flop 405, and an IC card selection signal (see FIG. 7E) is output.

Further, the logic gate 602 includes a boot device selection signal, detection signals XCD1 and XCD2 via the inverter 601 and the output ￣Q of the flip-flop 405.
Are input with negative logic, and a flash ROM selection signal (see FIG. 7F) is output by AND output of the negative logic.

As described above, even when the specific SW 106 is turned on and the power supply 104 is turned on, if the IC card 107 is not completely connected to the IC card connection unit 205, the flash is forcibly performed. Boot from the ROM 204. That is, the peripheral control IC 202 of FIG. 6 outputs an IC card selection signal in the same manner as the operation of the configuration example 1, and the IC card 107 is completely connected to the IC card connection unit 20.
When the connection is not made to the IC card 107, the flash ROM selection signal is output without booting from the IC card 107, and the program on the flash ROM 204 is booted.

Therefore, in addition to the above effects, when the IC card 107 is not completely connected to the IC card connection unit 205, the flash RO
By booting the program of the M204, the flash ROM 204 can be protected and the flash ROM 204 of the image forming apparatus 100 can be reliably used.

Here, in the configuration example 2 and operation, the specific S
Even if W 106 is ON and power supply 104 is ON, if the IC card 107 is not completely connected to the IC card
An example of booting the program No. 4 and outputting an error message display on the display unit 103 will be described with reference to FIGS.

(Structure Example 3) FIG. 8 is a block diagram showing a boot device selection circuit structure of the peripheral control IC 202 according to Structure Example 3. This peripheral control IC 202 is different from FIG. 6 in that a detection signal XCD1 from the IC card detection unit 206,
2 and the output signal of the inverter 601 for supplying the output to the logic gate 602 and the flip-flop 4
05 and the negative signal of the negative logic
A logic gate 801 for performing D processing and outputting an error message display signal is added. The other components and their functions are the same as those of the configuration example 2, and thus are denoted by the same reference numerals as in FIG. 6, and description thereof will be omitted.

(Operation of Configuration Example 3) Next, the operation of the peripheral control IC 202 configured as described above will be described.
FIG. 9 is a timing chart illustrating the operation of the peripheral control IC 202 according to the third configuration example. In the figure, (A) shows a signal XRESET output from the reset IC 203,
(B) is a signal XSW output from the specific SW 106,
(C) is a detection signal XCD1, XCD2 output from the IC card detection unit 206, and (D) is an error message display signal. Note that other signals are the same as those in FIG.

In FIG. 8, detection signals XCD1 and XCD2 (see FIG. 9C) from the IC card detection unit 206 are supplied to the respective input terminals (negative logic inputs) of the logic gate 401. Further, the AND processing output of the negative logic of the logic gate 401 is supplied to the logic gate 602 and the logic gate 801 via the logic gate 406 and the inverter 601. The reset signal XRESET (see FIG. 9A) from the reset IC 203 and the input signal XSW of the specific SW 106 (see FIG. 9B) are input to the logic gate 402 with negative logic, and the negative logic AND output is provided. Is supplied to the PR terminal of the flip-flop 405.

The logic gate 404 has a reset I
The reset signal XRESET from C203 and the input signal XSW of the specific SW 106 via the inverter 403 are input, and the negative logical AND output thereof is input to the CLR terminal of the flip-flop 405. Then, the output ￣Q of the flip-flop 405 is supplied to the logic gate 406. On the other hand, a boot device selection signal from the CPU 201 is supplied to one of the input terminals (negative logic input) of the logic gate 406.

In the logic gate 406, the boot device selection signal and the IC card detection unit 2 from the logic gate 401
A negative logic AND output is performed based on the detection signals XCD1 and XCD06 output of No. 06 and the ￣Q output of the flip-flop 405 to output an IC card selection signal.

The logic gate 602 further includes a boot device selection signal, detection signals XCD1 and XCD2 via the inverter 601 and an output {Q} of the flip-flop 405.
Are input with negative logic, and a flash ROM selection signal is output by AND output of the negative logic. The logic gate 801 has a detection signal XC via the inverter 601.
D1 · 2 and the output ￣Q of the flip-flop 405 are input with negative logic, and an error message display signal (see FIG. 9D) is output by AND output of the negative logic.

As described above, even when the specific SW 106 is turned on and the power supply 104 is turned on, if the IC card 107 is not completely connected to the IC card connection unit 205, the flash is forcibly performed. Boot from the ROM 204. That is, the peripheral control IC 202 shown in FIG.
When the card 107 is not completely connected to the IC card connection unit 205, the CPU 107 does not boot from the IC card 107,
Outputs the flash ROM selection signal and outputs the flash ROM
Boot the program on 204. Further, an error message indicating that the IC card 107 is not completely connected to the IC card connection unit 205 is displayed on the display unit 103, and the user is prompted to reset the IC card 107.

Therefore, in addition to the effects described in the configuration example 1 and operation, the IC card 107 is completely
When the flash ROM 204 is not connected, the flash ROM 204 of the image forming apparatus 100 can be protected by booting the program of the flash ROM 204 of the image forming apparatus 100, and the flash ROM 204 of the image forming apparatus 100 can be used reliably. Further, the IC card 107 is completely
By displaying an error message indicating that the IC card 107 is not connected to the card connection unit 205 on the display unit 103, the user can accurately know that the IC card 107 is not correctly mounted, and quickly reset the IC card 107. it can.

Next, based on the configuration examples described above, operation processing examples 1 to 6 which are features of the present invention will be described.

(Example 1 of Operation Processing) FIG. 10 shows an example 1 of operation processing.
FIG. 11 is an explanatory diagram showing an example of a memory map of the flash ROM 204 according to the first embodiment.
It is explanatory drawing which shows the example of the memory map of 07. 10 and FIG. 11 show boot areas 10-1 and 11-1.
Are provided, and these two boot areas 10-1 and 11
The boot programs 10-6 and 11-6 in -1 are exactly the same.

Both the flash ROM 204 and the IC card 107 have the last fixed addresses 10-5 and 11 in the area.
-5, a code 10-3, 1 for discriminating the program
1-3 are provided. In this embodiment, as an example, in the case of the flash ROM 204, “PROGRA
M ”10-3, IC card 107 is“ OPTION ”1
A character string of 1-3 is written (anything can be discriminated). This character string is used to determine what kind of program is currently being executed.

The main program area 10-2 and the data area 11-2 have fixed address positions with reference to the heads of the boot areas 10-1 and 11-1, in this case, 0x0500.
(10-45, 11-4), flash ROM
204 and the boot area 10-1 in the IC card 107,
When the boot programs 10-6 and 11-6 of the 11-1 are executed, the fixed address position 0x0500 (10-45, 1-45) at the end of the boot programs 10-6 and 11-6.
The program jumps to 1-4).

FIG. 12 shows the CPU 2 of the image forming apparatus 100.
FIG. 11 is an explanatory diagram showing an address map of the flash R.
4 shows an address map when booting with the program of the OM 204. Here, the flash ROM 2
04 and the IC card 107 only, and the others are omitted. FIG. 13 is an explanatory diagram showing an address map when booting with a program in the IC card 107.

FIG. 13 is an explanatory diagram showing an address map when booting with a program in the IC card 107. In these two cases, the program boot areas 10-1 and 11-1 have addresses converted by hardware by the specific SW 106 and the IC card detection unit 206 (see the above-described basic operation 2).

Here, the state shown in FIG. 13 based on FIG. 12 is called a "swap state". The execution / non-execution of this swap is performed by controlling the peripheral control IC 202 based on a control request from the CPU 201 by a program. Also, the boot programs 10-6, 11-6
Is configured to be able to operate whether or not to be in the “swap state” by software during operation.

The boot programs 10-6 and 11-6 in the boot areas 10-1 and 11-1 correspond to the IC card 10
7 and the flash ROM 204 are all the same program. Therefore, even if the swap / swap is performed during the execution of the boot program, the CPU 201 can continue to execute the program normally.

Next, a first example of the operation processing according to the embodiment of the present invention will be described with reference to a flowchart shown in FIG. First, when the IC card 107 in FIG. 13 is connected to the image forming apparatus 100 and the power is turned on while pressing the specific SW 106 (S1401), the boot operation from the IC card 107 is started (swapped), and the boot program 11 is started. -6 is performed (S1402). In the program 11-6 in the boot area, the minimum necessary CP for operation is
Temporary initialization of the U register is performed (S1403).

Subsequently, it is determined whether or not the character string "PROGRAM" is described in the program determination code 11-3 or 10-3 (S1404). here,
If it is determined that the character string “PROGRAM” is not described, that is, if the program is not a program for operating the image forming apparatus 100, the address map in the image forming apparatus 100 is changed from the state of FIG. 13 to the state of FIG. To release the swap state (S1405). Then, the program jumps to the top address 10-4 of the main program area 10-2 (S1406).

On the other hand, when the character string “PROGRAM” is described in the program discrimination code 11-3 or 10-3, the main program area 10-
Jump to the top address 10-4 of the second (S140)
6).

(Operation Example 2) In the above operation, when the swap state is released from the swap state in the middle of the boot programs 10-6 and 11-6, the operator intends to boot with the IC card 107. Nevertheless, since the boot has been performed by the inappropriate IC card 107, the fact is displayed on the display unit 103. This operation will be further described with reference to FIG.

FIG. 15 is a flowchart showing an operation example 2 according to the embodiment of the present invention. Here, FIG.
4 is performed, and if it is determined in step S1504 that the character string “PROGRAM” is not described, that is, if the program is not a program for operating the image forming apparatus 100, the address map in the image forming apparatus 100 Is changed from the state of FIG. 13 to the state of FIG. 12 to release the swap state (S1505), and then, an attempt to boot with an inoperable IC card is displayed on the display unit 103 as an error message (S1507). . Thereafter, the process jumps to the top address 10-4 of the main program area 10-2 (S1506).

(Operation Processing Example 3) Next, considering a case where the boot programs 10-6 and 11-6 are not the same,
A corresponding example will be described. FIG. 16 shows an operation processing example 3
FIG. 17 is an explanatory diagram showing an example of a memory map of the flash ROM 204 according to the third embodiment.
It is explanatory drawing which shows the example of the memory map of 07. In both FIGS. 16 and 17, the version information 16-7 and 17-7 of the boot program is added, and the versions are compared to control whether or not to cause the swap state. An example of this control is shown in the flowchart of FIG. The memory address map of the image forming apparatus 100 is shown in FIG.
2 and FIG.

In FIG. 18, the IC card 10 shown in FIG.
7 is connected to the image forming apparatus 100 and the power is turned on while pressing the specific SW 106 (S1801), a boot operation from the IC card 107 is started (swapping), and the boot program 17-8 is executed ( S18
02). In the program 17-8 in the boot area, temporary initialization of the CPU register necessary for the minimum operation is performed (S1803).

Subsequently, the boot program version information 17-7 of the IC card 107 of FIG. 17 is compared with the boot program version information 16-7 of the flash ROM 204 of FIG. 16 (S1804). Here, if they match, the process proceeds to the next process. If they do not match, a permanent loop process in which nothing is performed (S180)
Enter 5).

(Example 4 of Operation Processing) Next, an example having the functions of the above-described operation processing examples 1 and 3 will be described. FIG. 19 shows a flash ROM according to the operation processing example 4.
FIG. 20 is an explanatory diagram illustrating an example of a memory map of the IC card 107 according to the fourth operation processing example. These two figures are a combination of the above-described FIGS. 10 and 16 and FIGS. 11 and 17. An example of this control is shown in the flowchart of FIG.
Note that the memory address map of the image forming apparatus 100 is the same as in FIGS.

In FIG. 21, the IC card 107 of the memory map shown in FIG. 20 is connected to the image forming apparatus 100,
When the power is turned on while pressing the specific SW 106 (S2
101), the boot operation from the IC card 107 is started (swapped), and the boot program 20-8 is executed (S2102). In the program 20-8 in the boot area, temporary initialization of the CPU register necessary for the minimum operation is performed (S2103).

Subsequently, the boot program version information 20-7 of the IC card 107 of FIG. 20 is compared with the boot program version information 19-7 of the flash ROM 204 of FIG. 19 (S2104). Here, if they match, the process proceeds to the next process. If they do not match, a permanent loop process in which nothing is performed (S210)
Enter 5).

Next, it is determined whether or not the character string "PROGRAM" is described in the program determination code 11-3 or 10-3 (S2106). here,
If it is determined that the character string “PROGRAM” is not described, that is, if the program is not a program for operating the image forming apparatus 100, the address map in the image forming apparatus 100 is changed from the state of FIG. 13 to the state of FIG. To release the swap state (S2107). Then, the process jumps to the head address 19-4 of the main program area 19-2 (S2108).

On the other hand, if the character string "PROGRAM" is described in the program discrimination code section 19-3 or 20-3, the main program area 19
Jump to the top address 10-4 of -2 (S21
08).

(Operation Example 5) A memory map corresponding to this operation example is shown in FIG.
Memory map) and FIGS. 12 and 13 (image forming apparatus address map), and the memory map of the IC card shown in FIG. 22 is used.

The boot program 22-6 in the boot area 22-1 in FIG. 22 is the boot program 1 in the boot area 10-1 in FIG. 10 (flash ROM memory map).
Exactly the same as 1-6. Flash ROM 20
4. The last fixed address 1 in the area for both the IC card 107
Codes 10-3 and 22-3 for discriminating a program are provided at 0-5 and 22-5.

In this embodiment, as an example, in the case of the flash ROM 204, “PROGRAM” 10-3,
"PROGRAM" 22-3 for IC card 107
Is written. This string is
Of course, other characters may be used as long as they can be distinguished. From this character string, it is determined what kind of program is currently being executed.

Main program area 10-2, 22-
2 is a fixed address position based on the head of the boot areas 10-1 and 22-1, here 0x0500, 10-4, 2-4
Place 2-4. Flash ROM 204 and IC card 1
When the boot programs 10-6 and 22-6 of the boot areas 10-1 and 22-1 in 2007 are executed, the fixed address 0 is provided at the end of the boot programs 10-6 and 22-6.
The program jumps to x0500, 10-4, and 22-4.

FIG. 23 is a flowchart showing a procedure of the operation processing example 5 according to the embodiment of the present invention. First, as described above, the IC card 1 in the memory map shown in FIG.
07 is connected to the image forming apparatus 100, and the power is turned on while pressing the specific SW 106 (S2301), the boot operation from the IC card 107 is started (swapping), and the boot program 22-6 is executed ( S23
02). In the program 22-6 in the boot area, temporary initialization of the CPU register necessary for the minimum operation is performed (S2303).

Subsequently, it is determined whether or not the character string "PROGRAM" is described in the program determination code 22-3 of the IC card 107 (S2304). If it is determined that the character string is described (in the case of a program for operating the image forming apparatus 100), the process jumps to the start address 22-4 of the main program area 22-2 (S2308) and proceeds to the next process. Transition.

On the other hand, in step S2304, "PRO" is added to the program discrimination code 22-3 of the IC card 107.
If it is determined that the character string of “GRAM” is not described (if the program is not a program for operating the image forming apparatus 100), it is further determined whether the character string of “PROGRAM” is described in the program determination code 10-3 of the flash ROM 204. It is determined whether or not it is (S2305).

Here, when it is determined that the character string "PROGRAM" is described in the program determination code 10-3 of the flash ROM 204 (the image forming apparatus 100
Of the image forming apparatus 100)
13 is changed from FIG. 13 to FIG. 12, the swap state is released (S2306), and step S230 is performed.
Proceed to 8.

On the other hand, if it is determined in step S2305 that the character string “PROGRAM” is not described in the program determination code 10-3 of the flash ROM 204 (if it is not a program for operating the image forming apparatus 100), there is nothing there. The process enters a permanent loop process (S2307).

(Operation Processing Example 6) Next, an operation processing example 6 under the same conditions as those of the respective memory maps described in the above-described operation processing example 5 will be described. FIG. 24 is a flowchart illustrating a procedure of the operation processing example 6 according to the embodiment of the present invention. First, as described above, the IC card 107 of the memory map shown in FIG. 22 is connected to the image forming apparatus 100, and the power is turned on while pressing the specific SW 106 (S240).
1) The boot operation from the flash ROM 204 of the main body is started (not swapped), and the boot program 10
-6 is performed (S2402). In the program 22-6 in the boot area, temporary initialization of the CPU register necessary for the minimum operation is performed (S2403).

Subsequently, it is determined whether or not the character string "PROGRAM" is described in the program determination code 10-3 of the flash ROM 204 (S2404). If it is determined that the character string is described (in the case of a program for operating the image forming apparatus 100), the process jumps to the start address 10-4 of the main program area 10-2 (S2408) and proceeds to the next process. Transition.

On the other hand, if it is determined in step S2404 that the character string "PROGRAM" is not described in the program determination code 10-3 of the flash ROM 204 (if the program is not a program for operating the image forming apparatus 100), the IC card It is determined whether or not the character string “PROGRAM” is described in the program determination code 22-3 of 107 (S2405).

Here, when it is determined that the character string “PROGRAM” is described in the program identification code 22-3 of the IC card 107 (in the case of a program for operating the image forming apparatus 100), 13 is changed from the state shown in FIG. 12 to the state shown in FIG. 13, the swap state is released (S2406), and the process proceeds to step S2408.

On the other hand, in step S2405, "PRO" is added to the program discrimination code 22-3 of the IC card 107.
If it is determined that the character string “GRAM” is not described (if the program is not a program for operating the image forming apparatus 100), the process enters a permanent loop process in which no processing is performed (S2407).

[0085]

As described above, according to the image forming apparatus of the present invention, the external storage means is connected to the main body, and the power supply of the main body is turned on while operating the selecting means (specific SW). In this case, since the boot from the program on the external storage means is performed, even if the original operation program of the image forming apparatus is not stored in the external storage means, the apparatus can be protected and operated by the processing of the boot program. It is possible to do.

Further, according to the image forming apparatus of the present invention, the apparatus is protected and operates when booted by external storage means that does not contain the original operation program of the image forming apparatus. In addition to this, it is possible to notify the user to that effect by display information.

According to the image forming apparatus of the present invention, the external storage means is connected to the main body, and the external storage means is turned on when the main body power is turned on while operating the selection means (specific SW). Since the program is booted from the above program, even if the original operation program of the image forming apparatus is not stored in the external storage means, the apparatus can be protected by the processing of the boot program.

Further, according to the image forming apparatus of the present invention (claim 4), the functions of claims 1 and 3 are also provided, so that the effects of claims 1 and 3 can be obtained.

Further, according to the image forming apparatus of the present invention (claim 5), when the program in the main body side storage means or the external storage means is abnormal, that is, the boot program is normal but the main program thereafter. In an inappropriate / incomplete state, even if the program in the external storage means is incomplete, the program is changed to the execution area of the operable main body storage means, so that the failure caused by the interruption of download / upload is not possible. Even when booted with a complete program, the device can be protected and a more efficient boot process is realized.

Further, according to the image forming apparatus of the present invention (claim 6), when the program in the main body side storage means or the external storage means is abnormal, that is, the boot program is normal but the main program thereafter. In an inappropriate / incomplete state, even if the program in the main body side storage means is incomplete, the program is changed to the execution area of the operable external storage means, so that the interruption caused by the interruption of the download / upload is not possible. Even when booted with a complete program, the device can be protected and a more efficient boot process is realized.

According to the image forming apparatus of the present invention (claim 7), if the program in the main body side storage means or the external storage means is incomplete in claim 5 or 6, the boot program processing is performed. Can be protected.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a main configuration of an image forming apparatus according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a control board in FIG.

FIG. 3 is an explanatory diagram showing a configuration example of a contact detection terminal of an IC card detection unit in FIG. 2;

FIG. 4 is a block diagram showing a configuration of a boot device selection circuit of the peripheral control IC according to Configuration Example 1;

FIG. 5 is a timing chart showing the operation of the peripheral control IC according to Configuration Example 1.

FIG. 6 is a block diagram showing a configuration of a boot device selection circuit of a peripheral control IC according to Configuration Example 2;

FIG. 7 is a timing chart showing the operation of the peripheral control IC according to Configuration Example 2.

FIG. 8 is a block diagram showing a configuration of a boot device selection circuit of a peripheral control IC according to Configuration Example 3;

FIG. 9 is a timing chart showing the operation of the peripheral control IC according to Configuration Example 3;

FIG. 10 is an explanatory diagram illustrating an example of a memory map of a flash ROM according to an operation processing example 1;

FIG. 11 is an explanatory diagram illustrating an example of a memory map of the IC card according to the operation processing example 1;

FIG. 12 is an explanatory diagram illustrating a CPU address map of the image forming apparatus.

FIG. 13 is an explanatory diagram showing an address map when booting with a program in an IC card.

FIG. 14 is a flowchart illustrating a procedure of an operation processing example 1 according to the embodiment of the present invention.

FIG. 15 is a flowchart showing a procedure of an operation processing example 2 according to the embodiment of the present invention.

FIG. 16 is an explanatory diagram illustrating an example of a memory map of a flash ROM according to an operation processing example 3;

FIG. 17 is an explanatory diagram showing an example of a memory map of an IC card according to an operation processing example 3;

FIG. 18 is a flowchart illustrating a procedure of an operation processing example 3 according to the embodiment of the present invention.

FIG. 19 is an explanatory diagram illustrating an example of a memory map of a flash ROM according to an operation processing example 4;

FIG. 20 is an explanatory diagram illustrating an example of a memory map of an IC card according to a third operation processing example;

FIG. 21 is a flowchart showing a procedure of an operation processing example 4 according to the embodiment of the present invention.

FIG. 22 is an explanatory diagram showing an example of a memory map of an IC card according to operation processing examples 5 and 6.

FIG. 23 is a flowchart showing a procedure of an operation processing example 5 according to the embodiment of the present invention.

FIG. 24 is a flowchart illustrating a procedure of an operation processing example 6 according to the embodiment of the present invention.

[Explanation of symbols]

 REFERENCE SIGNS LIST 100 image forming apparatus 101 image forming section 102 control board 106 specific SW 107 IC card 201 CPU 202 peripheral control IC 203 reset IC 204 flash ROM 205 card connection section 206 card detection section

Claims (7)

[Claims] 1. A main body control means for controlling the entire apparatus based on a control program, a main body side storage means for storing the control program, and a control program and / or an optional program which are detachably attached to the main body of the apparatus. An external storage unit for storing the external storage unit, a detection unit for detecting a connection state of the external storage unit and outputting a detection signal, and a selection unit for selecting use of the external storage unit. The main body control means determines that the selection signal from the selection means is O
N, when the connection of the external storage means is detected by the detection means, the same boot part program as the downloadable program stored on the external storage means and additional information relating to image formation are booted. And
An image forming apparatus, wherein after execution of a boot area program is completed, an execution area is changed to an area on the main body side storage means. 2. The apparatus according to claim 1, further comprising a display unit for displaying and outputting an apparatus state, wherein the main body control unit detects that a selection signal from the selection unit is ON and the connection of the external storage unit is detected by the detection unit. If the boot area is changed from the program stored in the external storage means to the area on the main body side storage means after execution of the boot area program, a predetermined message is displayed on the display means. The image forming apparatus according to claim 1, wherein: 3. When the selection signal from the selection unit is turned on and the connection of the external storage unit is detected by the detection unit, the main body control unit stores the boot program in the main body side storage unit and the external program. 2. The image forming apparatus according to claim 1, wherein a permanent loop process irrelevant to the operation of the image forming apparatus is executed when it is determined that the boot program does not match the boot program in the storage unit. 4. A main body control means for controlling the whole apparatus based on a control program, a main body side storage means for storing the control program, and a control program and / or an optional program which are detachably attached to the main body of the apparatus. An external storage unit for storing the external storage unit, a detection unit for detecting a connection state of the external storage unit and outputting a detection signal, and a selection unit for selecting use of the external storage unit. The main body control means determines that the selection signal from the selection means is O
N, when the connection of the external storage means is detected by the detection means, the same boot part program as the downloadable program stored on the external storage means and additional information relating to image formation are booted. And
After the execution of the boot area program, the execution area is changed to an area on the main body side storage means, and when the boot program of the main body side storage means and the boot program of the external storage means do not match at the time of the change, the image is displayed. An image forming apparatus that executes a permanent loop process irrelevant to the operation of the forming apparatus. 5. A main body control means for controlling the whole apparatus based on a control program, a main body side storage means for storing the control program, and a control program and / or an optional program which are detachably attached to the main body of the apparatus. An external storage unit for storing the external storage unit, a detection unit for detecting a connection state of the external storage unit and outputting a detection signal, and a selection unit for selecting use of the external storage unit. When the selection signal of the selection unit is turned on and the device power is turned on, and the connection of the external storage unit is detected by the detection unit, the main body control unit can download the data stored on the external storage unit. Booting the program in the same boot portion as the main program and additional information relating to image formation, and Determining an operable execution regions or storage means, the image forming apparatus characterized by changing the execution regions. 6. A main body control means for controlling the entire apparatus based on a control program, a main body side storage means for storing the control program, and a control program and / or an optional program which are detachably attached to the main body of the apparatus. An external storage unit for storing the external storage unit, a detection unit for detecting a connection state of the external storage unit and outputting a detection signal, and a selection unit for selecting use of the external storage unit. The main body control means turns off the selection signal of the selection means;
And when the power of the apparatus is turned on and the connection of the external storage means is detected by the detection means, the program and the image forming of the same boot portion as the downloadable program stored on the main body side storage means are involved. An image forming apparatus which boots additional information, determines an operable execution area of the external storage means or the main body side storage means, and changes the execution area. 7. The image forming apparatus according to claim 1, wherein the main body control unit executes a permanent loop process irrelevant to the operation of the image forming apparatus when there is no operable program in the main body side storage unit and the external storage unit. The image forming apparatus according to claim 5, wherein: