JP2000089771A - Phase switching device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a digital signal processed phase switching device reducing the occurrence of an abnormal sound at time of phase switching and always keeping phase switching operation and responsiveness on acoustic feeling. SOLUTION: This device is provided with a digital signal processor(DSP) 104 containing a multiplication processing part 111 switching an input digital audio signal becoming a phase switching object to a positive phase or an opposite phase, a detection processing part 112 detecting the amplitude state of the input digital audio signal and a coefficient renewal processing part 113 controlled by the detection processing part 112 and renewing a multiplication processing coefficient based on the multiplication processing part 111 at the timing dependent on the detected amplitude state. Then, the digital signal processor(DSP) 104 is constituted so that its phase switching is controlled by a control part 110 based on a phase switching key 109.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase switching device, and more particularly to a phase switching device for switching the phase of an output signal to a normal phase or a reverse phase with respect to an input signal by digital signal processing as a phase switching function in various audio devices. About.

[0002]

2. Description of the Related Art A conventional phase switching device of this type will be described below with reference to the drawings. FIG. 8 is a main block diagram showing an example of a conventional phase switching device, and FIG. 9 is a waveform conceptual diagram showing occurrence of abnormal noise when the phase switching device shown in FIG. 8 switches phases. The device shown in FIG. 8 is a phase switching device in which the phase switching function is realized as multiplication processing by digital signal processing. In the figure, reference numeral 801 denotes a digital signal processor (hereinafter referred to as DSP) having a multiplication processing unit;
02 is a control unit such as a microcomputer for controlling the DSP 801;
A phase switching key 803 can select a normal phase or a reverse phase.

In this apparatus, a DSP 801 having 24-bit fixed-point coefficients is used, and a control unit 802 is used.
Defines a coefficient value for each positive or negative phase, and in digital signal processing, a negative-phase signal is obtained by multiplying by -1 as is well known.

[0004] In the case of normal phase, 1: coefficient value = 7ffffhh In the case of reverse phase, 1: coefficient value = 800000h When the phase is switched by the operation of the phase switching key 803 by the user, the control unit 802 uses the key information to correct the phase. Phase or opposite phase, and the corresponding coefficient value of 1 or -1
The data is transferred to the multiplication processing unit in SP801. The multiplication unit multiplies the input signal by the transferred coefficient to switch the phase between the normal phase and the negative phase and output the same.

[0005]

However, in such a configuration, since the input signal waveform and the phase switching timing by the operation of the user have no relation at all, for example, as shown in FIG. If the phase switching operation is performed at the time, the waveform becomes largely discontinuous, and there is a problem that abnormal noise (noise) is sensed at the time of switching in terms of hearing.

SUMMARY OF THE INVENTION The present invention is to solve the above-mentioned conventional problems, and it is possible to reduce the occurrence of abnormal noise at the time of phase switching and to maintain the phase switching operation and audibility at any time. It is an object to provide a phase switching device by processing.

[0007]

According to the present invention, there is provided a phase switching apparatus, comprising: a multiplication processing means for switching an input digital audio signal to be phase-switched between a normal phase and a negative phase; and detecting an amplitude state of the input digital audio signal. A digital signal processor comprising: a detection processing unit; and a coefficient signal processing unit which is controlled by the detection processing unit and updates a multiplication processing coefficient based on the multiplication processing unit at a timing depending on the detected amplitude state. In the signal processor, the phase switching is controlled by the phase switching instruction means.

According to the present invention, it is possible to reduce the occurrence of abnormal noise at the time of phase switching and to maintain the phase switching operation and responsiveness at any time.

[0009]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a block diagram showing an example of application of a phase switching device according to the present invention to a sound processor in each embodiment. In this case, the sound processor processes musical instruments, voices, and the like. This is an apparatus commonly used in Embodiments 2 and 3 to be described later.

In FIG. 1, reference numeral 101 denotes a sound source for outputting an analog audio signal, which is converted into a digital signal by an LPF 102 and an AD converter 103. In the case of a digital audio signal source, the LPF 102
And AD103 are unnecessary. Reference numeral 104 denotes a DSP for performing digital signal processing, which has 24-bit fixed-point coefficients. The internal processing includes a multiplication processing unit 111 for calculating whether the phase of the output signal is positive or negative, and the amplitude status of the input signal. And a coefficient update processing unit 113 that updates the coefficient depending on whether the phase is normal or reverse. 114 is a multiplier, and 115 and 116 are coefficient storage memories. The input signal is multiplied by the coefficient of the multiplication coefficient storage memory 115 by the multiplier 114, and it is calculated whether the phase of the output signal is positive or negative. This output is DA
After being supplied to the converter 105 and converted into an analog audio signal by the LPF 106, the analog audio signal is output from the speaker 108 by the amplifier 107. Reference numeral 109 denotes a phase switching key which is operated by the user and serves as a phase switching instruction means, and determines whether the phase is normal or reverse. 110 is DSP104
, And controls the detection processing unit 112 and the desired coefficient storage memory 116 in accordance with the operation of the phase switching key 109. The sampling frequency in this device is 48 kHz.

In this embodiment, the detection processing means in the detection processing unit 112 of the sound processor shown in FIG. 1 is specified for threshold level detection processing and time management processing. A series of operations when switching from the normal phase to the reverse phase will be described.

First, in the normal phase, the value of the multiplication coefficient storage memory is 7FFFFFh, and the multiplier 114 multiplies the input signal to obtain an output signal having no phase change (positive phase with respect to the input signal). ing. FIG. 2 is a signal processing flow diagram within one sampling cycle of the DSP according to the first embodiment of the phase switching device of the present invention. When the user operates the phase switching key 109 to reverse the phase, the control unit 110 sets the switching flag. Is transferred to the detection processing unit 112 in the DSP, and 800000h as the desired coefficient value is transferred to the desired coefficient storage memory 116 in the DSP 104. In this way, when the switching flag in the detection processing unit 112 becomes 1, the detection processing of the input signal is started as shown in FIG. First, the amplitude of an input signal is converted into an absolute value to be an input signal level, and a magnitude with a predetermined threshold value is determined. A value of about −40 dB with respect to the maximum level of the signal. This threshold should be adjustable by the user,
Optimal effects are easily obtained for the sound source to be handled. If the input signal level is greater than the threshold, the amplitude is relatively large,
At the time of phase switching, it is determined that there is a possibility of occurrence of abnormal noise, the timeout counter is updated by +1 and compared with a predetermined timeout value.

This timeout value is a value obtained by converting the timeout time into the number of sampling cycles, and the timeout time is set to a half cycle of a 20 Hz sine wave = 25 ms, that is, the timeout value = 1200 sampling cycles.
A minimum level is reliably detected for an input signal having a frequency of 20 Hz or more. If this time-out value can be adjusted by the user, it is easier to obtain the optimum effect for the sound source to be handled.

If the time-out counter is equal to the time-out value, it is determined that 25 ms has elapsed since the start of detection, and the coefficient update permission flag is set to 1 in order to forcibly execute the phase switching. The timeout counter is cleared to 0 for detection. If the timeout counter has not reached the timeout value, it is determined that the time is within 25 ms from the start of detection, and the coefficient update permission flag is set to 0.

On the other hand, if the input signal level is smaller than the threshold value, it is determined that there is no possibility that abnormal noise will occur even if the phase is switched, and the coefficient update permission flag is set to 1 to perform the phase switching. The detection process is completed by clearing the timeout counter to 0 for the next detection.

Next, when the coefficient update permission flag is 1 in the coefficient update processing unit 113, the coefficient 80000 transferred to the desired coefficient storage memory 116 by the control unit 110 is used.
0h is copied and stored in the multiplication coefficient storage memory 116 that stores the coefficients used by the multiplier 114. When the coefficient update permission flag is 0, the coefficient is not updated.

Finally, the multiplier 114 of the multiplication processing unit 111
, The values of the input signal and the multiplication coefficient storage memory.
800000h is multiplied, that is, an output signal whose phase is inverted (opposite to the input signal) is obtained.

FIG. 3 is a waveform conceptual diagram at the time of switching when a sine wave is used as an input signal in the first embodiment of the phase switching device of the present invention. FIG. As described above, the signals after the sampling point below the threshold value are out of phase, and this change point is judged to be sufficiently small in terms of hearing, so that phase switching can be performed without generating abnormal noise. it can.

In the threshold level detection process, the level of the input signal can be monitored with a time accuracy of one sampling period (about 20 μs in the case of 48 kHz sampling). When it is determined that the signal is sufficiently small in terms of hearing, the phase switches from normal phase to reverse phase or from reverse phase to normal phase. In terms of hearing, abnormal noise (noise) is rarely detected at the time of switching.

As described above, according to the present embodiment, the signals after the sampling point which is equal to or less than the threshold value have opposite phases, and this change point is judged to be sufficiently small in terms of hearing. Phase switching without occurrence can be performed.

(Embodiment 2) In this embodiment, the detection processing means in the detection processing unit 112 of the sound processor shown in FIG. 1 is specified as a zero-cross detection process and a time management process. Similarly, a series of operations in the case where the phase is switched from the normal phase to the reverse phase by operating the phase switching key 109 will be mainly described with respect to the detection processing unit 112 which is different from the first embodiment.

FIG. 4 is a flowchart of signal processing within one sampling period of the DSP according to the second embodiment of the phase switching device of the present invention, and FIG. 5 obtains a zero cross determination value in the second embodiment of the phase switching device of the present invention. FIG. 2 is a signal block diagram for the operation. First, as shown in FIG. 4, when the switching flag becomes 1 in the detection processing unit 112, the detection processing of the amplitude of the input signal is started. Next, as shown in FIG. 5, the amplitude of the input signal in the current sampling cycle is multiplied by the amplitude of the input signal one sampling cycle before to obtain a zero-cross determination value, and the sign thereof is determined. When the amplitude state of the input signal satisfies the digital signal processing (Equation 1), it is determined to be a zero crossing time.

[0024]

## EQU1 ## The signal amplitude value of the current sampling cycle.times.the signal amplitude value of one sampling cycle before.ltoreq.0, that is, the timing at which the signal waveform crosses the zero-amplitude axis may be detected. Is relatively large, it is determined that there is a possibility of occurrence of abnormal noise at the time of phase switching, the timeout counter is updated by +1 and compared with a predetermined timeout value.

This timeout value is a value obtained by converting the timeout time into the number of sampling periods, and the timeout time can be determined from the lower limit detection frequency by (Equation 2).

[0026]

## EQU2 ## Timeout time = 1 / lower limit frequency / 2 In this case, assuming that the lower limit frequency is 20 Hz, timeout time = 1/20 Hz / 2 = 25 ms timeout value = 25 ms.times.48 kHz = 1200 sampling period. A zero-cross timing is reliably detected for an input signal of a frequency. If this time-out value can be adjusted by the user, it is easier to obtain the optimal effect for the sound source to be handled.

If the timeout counter is equal to the timeout value, it is determined that 25 ms has elapsed from the start of detection, and the coefficient update permission flag is set to 1 in order to forcibly perform phase switching, and the next detection is performed. Therefore, the timeout counter is cleared to 0. If the time-out counter and the time-out value have not been reached, it is determined that it is within 25 ms from the start of detection, and the coefficient update permission flag is set to 0.

On the other hand, when the zero-cross judgment value is equal to or less than zero, it is the timing of the zero-cross, and since the amplitude is relatively small, it is determined that there is no possibility that abnormal noise will occur even when the phase is switched. In order to execute, the coefficient update permission flag is set to 1 and the timeout counter is cleared to 0 for the next detection, and the detection processing is completed. After this detection processing, the coefficient update processing unit 113 and the multiplication processing unit 111
, The same processing as in the first embodiment is performed.

FIG. 6 is a conceptual diagram of waveforms at the time of switching when a sine wave is used as an input signal in the second embodiment of the phase switching device of the present invention. Since this change point is determined to be sufficiently close to the zero axis and sufficiently small in terms of audibility, phase switching can be performed without generating abnormal noise.

In the above-mentioned zero cross detection processing, 1
Since the zero crossing of the waveform can be monitored with the time accuracy of the sampling cycle, the amplitude of the input signal is small at the time of zero crossing during normal sound or music playback, and the rectangular wave changes from the maximum positive value to the maximum negative value. In such a case, the switching of the phase from the normal phase to the negative phase or from the negative phase to the normal phase at the time of the zero crossing does not cause a large discontinuity in the output signal waveform as compared with the case where there is no detection processing. In terms of hearing, abnormal noise (noise) is rarely detected at the time of switching.

Further, by providing a time management means for managing a time-out period in the detection processing, in the case of a DC-like input signal having no level below the threshold value, the amplitude of the AC signal-like zero axis is reduced by the offset of the DC signal component. Is different from the original zero axis (zero in digital signal processing), and the phase switching is reliably performed in any input signal state such as an input signal having no zero cross.

The timeout period determines the lower limit frequency of the input signal at which the zero-cross detection is valid during the zero-cross detection processing. That is, for example,
When the input signal is a sine wave of 20 Hz, 1/1 of one cycle
Zero crossing occurs once every 25 ms, which is 2. In other words, by setting the timeout time to 25 ms, phase switching synchronized with zero-cross can always be realized for input signals of 20 Hz or more, and for input signals of 20 Hz or less, phase switching is realized 25 ms after detection starts. it can.

As described above, according to the present embodiment, the signals after the sampling point that is equal to or less than the threshold value are out of phase, and this change point is sufficiently close to the zero axis and sufficiently small in terms of hearing. Since the determination is made, phase switching without generation of abnormal noise can be performed.

(Embodiment 3) In this embodiment, the detection processing means in the detection processing unit 112 of the sound processor shown in FIG. 1 is specified as a threshold detection process, a zero-cross detection process, and a time management process. Since the individual processing operations of these processes are the same as those in the first and second embodiments, the points of their combination will be mainly described.

FIG. 7 is a flow chart of signal processing within one sampling cycle of the DSP according to the third embodiment of the phase switching apparatus of the present invention. First, as shown in FIG.
In step 2, the amplitude of the input signal is detected, but threshold detection processing and zero-cross detection processing are performed on the same input signal within the same sampling period. When it is determined that there is no possibility of the coefficient update, the coefficient update permission flag is set to 1. That is, the logical sum of the two detection results is obtained. As a result, it is possible to improve the detection accuracy of the amplitude of the input signal and reduce the probability of occurrence of abnormal noise at the time of forced switching due to timeout.
Note that the coefficient update permission flag can be set to 1 only when it is determined that there is no possibility of occurrence of abnormal noise even when the two detection results of the threshold value detection processing and the zero-cross detection processing are both switched in phase. In this case, the logical product of the two detection results is calculated, and similarly to the case of calculating the logical sum of the two detection results, it is possible to reduce the abnormal noise occurrence probability at the time of forced switching due to timeout.

As described above, according to the present embodiment, the threshold detection process and the zero-cross detection process are performed on the same input signal within the same sampling period, and one or both of these processes are phase-switched. Is performed, the coefficient update permission flag is set to 1 when it is determined that there is no possibility of occurrence of abnormal noise. In other words, the logical sum or the logical product of the two detection results is obtained to obtain the input. It is possible to improve the detection accuracy of the amplitude of the signal, reduce the probability of occurrence of abnormal noise at the time of forced switching due to timeout, and perform phase switching without generation of abnormal noise.

It should be noted that the threshold value and the timeout value described in the first to third embodiments are not limited to these values, but can be adjusted. , Various functions other than the phase switching (variable gain, variable frequency characteristics, addition of reverberation, etc.) can also be realized. High sound quality, miniaturization, and cost reduction can be realized.

[0038]

As described above, according to the present invention, the occurrence of abnormal noise is reduced by performing the phase switching processing depending on the amplitude of the input signal, and the phase switching operation and audibility are maintained. This has the advantageous effect that it can be performed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an example of application of a phase switching device of the present invention to a sound processor in each embodiment.

FIG. 2 is a signal processing flow diagram within one sampling cycle of a DSP according to the first embodiment of the phase switching device of the present invention.

FIG. 3 is a conceptual waveform diagram at the time of switching when a sine wave is used as an input signal in the first embodiment of the phase switching device of the present invention.

FIG. 4 is a signal processing flow diagram in one sampling cycle of a DSP according to a second embodiment of the phase switching device of the present invention.

FIG. 5 is a signal block diagram for obtaining a zero-crossing determination value in a second embodiment of the phase switching device of the present invention.

FIG. 6 is a conceptual waveform diagram at the time of switching when a sine wave is used as an input signal in Embodiment 2 of the phase switching device of the present invention.

FIG. 7 is a signal processing flow diagram in one sampling cycle of a DSP according to a third embodiment of the present invention;

FIG. 8 is a main block diagram showing an example of a conventional phase switching device.

FIG. 9 is a waveform conceptual diagram showing the generation of abnormal noise at the time of phase switching of the conventional phase switching device.

[Explanation of symbols]

 Reference Signs List 101 sound source 102, 106 LPF 103 AD converter 104 digital signal processor (DSP) 105 DA converter 107 amplifier 108 speaker 109 phase switching key 110 control unit 111 multiplication processing unit 112 detection processing unit 113 coefficient update processing unit 114 multipliers 115, 116 coefficients Storage memory

Claims (5)

[Claims] 1. A multiplication processing means for switching an input digital audio signal to be phase-switched between a normal phase and a negative phase, a detection processing means for detecting an amplitude state of the input digital audio signal, and a control means controlled by the detection processing means. And a digital signal processor including a coefficient update processing means for updating a multiplication coefficient based on the multiplication processing means at a timing depending on the detected amplitude state. The digital signal processor switches its phase by a phase switching instruction means. A phase switching device characterized by being controlled. 2. The detection processing means controls the coefficient updating processing means to update the multiplication processing coefficient at a timing at which the input digital audio signal to be phase-switched is equal to or less than a threshold value which is judged to be sufficiently small in audibility. The phase switching device according to claim 1, wherein: 3. The detection processing means controls the coefficient update processing means so as to update the multiplication processing coefficient at a timing when an input digital audio signal to be phase-switched crosses the zero amplitude axis in an AC signal manner. The phase switching device according to claim 1. 4. The detection processing means includes a timing at which an input digital audio signal to be phase-switched is equal to or less than a threshold value that is judged to be sufficiently small in audibility and / or the input digital audio signal has an amplitude of zero as an AC signal. 2. The phase switching device according to claim 1, wherein the coefficient update processing means is controlled so as to update the multiplication coefficient at a timing of crossing the axis. 5. The detection processing means further comprises time management processing means for managing the time from the start of detection to the forced coefficient update processing in order to forcibly perform the coefficient update processing. The phase switching device according to any one of claims 1 to 4.