JP2000078513A - Image display device and digital camera - Google Patents

Abstract

PROBLEM TO BE SOLVED: To display a photographed still picture on a display device without needing a display use buffer memory. SOLUTION: A still picture of an XGA size photographed by a CCD 2 is written in a DRAM 9 via a memory controller 5, an encoder/decoder 15 compresses the picture by means of the JPEG and the compressed image is recorded in an external storage medium 11. The CCD 2 outputs a line interleaved output (1024×256) at a rate of 50 fields per second in the E to E mode to decide a field angle and an area to display 960×240 pixels is segmented by aborting edge parts of the image in this output. An LCD 8 has a display area of 1056×240. A difference from number of pixels in the horizontal direction is corrected by an aspect conversion section 16. An output of the aspect conversion section 16 is displayed on the LCD 8 not through a display use buffer memory.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an image display device for displaying a photographed image and a digital camera device.

[0002]

2. Description of the Related Art Digital cameras that record digital image information on recording media such as floppy disks and semiconductor memories have become widespread. A digital camera is configured to convert a captured image into a digital image signal, compress the digital image signal, and record the compressed image information on a recording medium. A digital camera uses a high-resolution image sensor having a large number of pixels, for example, a CCD in order to improve the quality of a recorded still image. In addition, CCD (Charge
A display unit that displays a captured image of a coupled device, for example, L
It usually has a CD (Liquid Crystal display).

FIG. 8 shows an entire configuration of an example of a digital camera device to which the present invention can be applied. Lens part 1 and C
An imaging unit is configured by the CD2. A control signal from the CPU 12 is supplied to the lens unit 1, and an automatic aperture control operation and an automatic focus control operation are performed. The CCD 2 can be switched between an operation mode for reading all pixels (photographing mode) and an operation mode for thinning out lines (EtoE mode) for outputting a signal in which the number of lines is reduced to ３ by a control signal from the CPU 12. Have been. The number of pixels of the CCD 2 is 1024 (lines) × 768 (pixels) (XGA (eX
tended GraphicsArray)). In the EtoE mode, the CCD2 is driven by a clock having a frequency of 10.58 MHz.
Is driven.

[0004] In the EtoE mode, the data of the photographed image is not taken into the recording medium (DRAM 9), and the display unit (LC
This mode is displayed in D8). In the EtoE mode, the angle of view is determined during shooting, and the focus, exposure, and white balance are appropriately adjusted. That is, in the shooting mode, the state of checking the subject before pressing the shutter is EtoE.
Mode. In the EtoE mode, the CCD 2 performs an imaging operation by thinning out lines, and an 1024 × 256 imaging signal is obtained. As an example, in the imaging mode, an imaging signal of 10 fields per second is output, and in the EtoE mode, an imaging signal of 30 fields per second is output.

[0005] The output signal of the CCD 2 is supplied to a sample hold and A / D converter 3, and the sample hold and A / D converter 3 generates a digital image signal of 10 bits per sample. Sample hold and A / D
The conversion unit 3 has a configuration of a correlated double sampling circuit,
Noise removal, waveform shaping, and compensation for defective pixels are performed.

The digital image pickup signal is transmitted to the camera signal processing unit 4
Supplied to The camera signal processing unit 4 includes a digital clamp circuit, a luminance signal processing circuit, a color signal processing circuit, a contour correction circuit, a defect compensation circuit, an automatic aperture control circuit, an automatic focus control circuit, an automatic white balance correction circuit, and the like.
The camera signal processing unit 4 generates a digital image signal in the form of a component signal composed of a luminance signal and a color difference signal converted from the RGB signals.

Each component of the digital image signal from the camera signal processing unit 4 is supplied to a memory controller 5. The display buffer memory 6 and the bus 14 of the CPU 12 are connected to the memory controller 5. The buffer memory 6 generates an RGB signal by processing the component signal, and converts the RGB signal into a D signal.
Output to the / A converter 7. An analog signal from the D / A converter 7 is supplied to the LCD 8. Further, the buffer memory 6 outputs the RGB signals at a timing corresponding to the display timing of the LCD 8.

[0008] A DRAM (Dynamic Ran)
dom Access Memory) 9, a CPU 12, an encoder / decoder 15, and an interface 10. D
The RAM 9 is controlled by an address signal and a control signal supplied from the memory controller 5 or the CPU 12.

An encoder / decoder 15 compresses (encodes) or expands (decodes) image data. For example, JPEG (Joint Photographic Experts Group) is used. However, encoding / decoding according to the JPEG standard may be performed by software processing of the CPU 12.

The interface 10 is connected to the external storage medium 1
1 and an interface between the CPU 12. As the external storage medium, a disk-shaped recording medium such as a floppy disk, a memory card, or the like can be used. Furthermore, CP
An operation signal from the operation input unit 13 is supplied to U12. The operation input unit 13 includes a shutter button and other various switches operated by the photographer. Operation input unit 13
Detects an operation of a button, a switch, or the like, and sends the detected signal to the CPU 12 as an operation signal.

In the EtoE mode, C through the lens unit 1
The video signal formed on CD2 is operated by EtoE mode operation.
An image pickup signal (1024 × 2
56) is output. A digital component signal from the camera signal processing unit 4 is supplied to the memory controller 5. The digital component signal is written into the display buffer memory 6 through the memory controller 5.
Then, the data is read out from the buffer memory 6 at a double speed in accordance with the NTSC synchronization system (1024 × 240, 60 fields / second) for display on the LCD 8, and is displayed as an analog signal by the D / A converter 7.

In the XGA image capturing mode, when the CPU 12 detects that the shutter of the operation input unit 13 is pressed, the CCD 2 is set from the EtoE mode to the photographing mode, and (1024 × 768, 10 fields / sec).
XGA still image signal is generated. DM using the address generated by the address generator of the memory controller 5
A (Direct Memory Access) operation directly writes still image data to the DRAM 9. Then, the image in the DRAM 9 is transferred to the encoder / decoder 15 (or the CPU 12).
Performs JPEG compression and writes it to the external storage medium 11 via the interface 10.

The image (XG) recorded on the external storage medium 11
At the time of reproduction for reproducing A), JPEG compressed data is read from the external storage medium 11 via the interface 10,
Write to DRAM9. The data is read out by the DMA method using the address created by the address generation unit of the memory controller 5, decompressed by JPEG by the encoder / decoder 15, transferred to the buffer memory 6, and displayed. In this case, in the memory controller 5, EtoE
The number of pixels is converted to the same 1024 × 256 image as in the mode, and written to the buffer memory 6 at 30 fields / second.
In order to display on the LCD 8, the NTSC synchronization system (1024
(× 240, 60 fields / sec), read out from the buffer memory 6 at double speed, and converted into an analog signal by the D / A converter 7 and displayed.

In the above-described conventional digital camera, E
A display buffer memory 6 is provided for displaying an image photographed in the toE mode on the LCD 8. The display buffer memory 6 needs a capacity of at least one field for processing at a field double speed.
4 × 240 bytes (effective display area) has a capacity of 4 Mbits.

[0015]

In the above-mentioned conventional digital camera, a buffer memory 6 having a capacity of at least one field is required in order to convert a captured image of the CCD 2 into an NTSC image and display it. Therefore, the cost increases by the amount of the buffer memory 6, the power consumption in the EtoE mode increases, and further, when the zoom magnification is high, the time lag between the zoom operation and the displayed image is reduced. 6 and the operability of the angle of view adjustment is deteriorated.

Accordingly, it is an object of the present invention to provide an image display device and a digital camera device which can solve the above-mentioned conventional problems.

[0017]

According to a first aspect of the present invention, there is provided an image display apparatus for displaying a captured image, wherein the number of pixels differs from that of a standard television system. An imaging unit capable of switching between a first mode for outputting an imaging signal corresponding to the entire information and a second mode for outputting an imaging signal in which imaging information is reduced or increased, and a standard television system. Synchronous specifications,
Or display means that can be driven by a similar synchronous specification,
Memory means for storing an image signal output in the first mode of the imaging means; number of vertical lines of the image signal output in the second mode of the imaging means; And a correcting means for correcting an aspect shift caused by a difference from the number of lines.

According to a second aspect of the present invention, there is provided an image display apparatus for displaying a photographed image, comprising a first mode in which the number of pixels is different from that of a standard television system and an image signal corresponding to the entire image information is output. An imaging unit capable of switching between a second mode for outputting an imaging signal in which imaging information is reduced or increased, and a standard television system synchronous specification or a similar synchronous specification capable of being driven, Display means having a holding function, a memory means for storing an image pickup signal output in the first mode of the image pickup means, and the number of lines in the vertical direction of the image pickup signal output in the second mode of the image pickup means And the aspect deviation caused by the difference between the number of lines in the vertical direction of the input signal of the display means is corrected by selecting the data holding clock of the display means. An image display device according to symptoms.

According to a third aspect of the present invention, there is provided a digital camera apparatus in which a photographed image is recorded as a digital signal on a recording medium, the number of pixels being different from that of a standard television system, and corresponding to the entire image information. An imaging unit capable of switching between a first mode for outputting a signal and a second mode for outputting an imaging signal in which imaging information is reduced or increased, and a signal processing unit for processing an imaging signal from the imaging unit Encoding means for compressing and encoding a digital image signal output from the signal processing means when the imaging means is operated in the first mode, and generating encoded data; and loading of the encoded data into the memory means Control means for controlling the operation, synchronization specifications of the standard television system,
Or display means that can be driven by a similar synchronous specification,
When the imaging means is operated in the second mode, an aspect shift resulting from a difference between the number of vertical lines of the digital image signal output from the signal processing means and the number of vertical lines of the input signal of the display means. Correction means, a storage medium for storing data stored in the memory means, a storage medium driving means, and an operation means including a shutter button. In the monitor mode of the photographed image, the second mode of the imaging means is provided. A digital camera device characterized by displaying an image signal obtained by processing the image pickup signal output by the signal processing means and the correction means by the display means.

According to a fourth aspect of the present invention, there is provided a digital camera apparatus in which a photographed image is recorded on a recording medium as a digital signal. An imaging unit capable of switching between a first mode for outputting a signal and a second mode for outputting an imaging signal in which imaging information is reduced or increased, and a signal processing unit for processing an imaging signal from the imaging unit Encoding means for compressing and encoding a digital image signal output from the signal processing means when the imaging means is operated in the first mode, and generating encoded data; and loading of the encoded data into the memory means Control means for controlling the operation, synchronization specifications of the standard television system,
Or display means having a data holding function, a storage medium for storing data stored in the memory means, a storage medium drive means, and an operation means including a shutter button. In the image monitor mode, an aspect shift caused by a difference between the number of vertical lines of the imaging signal output in the second mode of the imaging unit and the number of vertical lines of the input signal of the display unit is determined by the display unit. A digital camera device wherein the correction is performed by selecting a data holding clock.

According to the present invention, unlike a conventional image display device and a digital camera, it is not necessary to interpose a display buffer memory when displaying an image photographed by the imaging means on the display device. Therefore, operability can be improved by reducing the cost of the buffer memory, reducing the power consumption, and reducing the delay time.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a digital camera according to the present invention will be described below with reference to the drawings.
FIG. 1 shows the overall configuration of this embodiment. One embodiment is similar to the digital camera shown in FIG.
The CCD 2 has the number of pixels of XGA (1024 × 768). The CCD 2 has an operation mode (photographing mode) for reading all pixels and a line thinning for outputting a signal in which the number of lines is reduced to １ ／. The operation mode (EtoE mode) can be switched by a control signal from the CPU 12. By switching the operation mode of the CCD 2 to the EtoE mode, operations such as zooming, automatic control of the aperture,
The response speed of the automatic control of exposure and the automatic control of white balance can be increased, the operability can be improved, the field rate increases, and it becomes easier to display an image on the LCD 8.

The general synchronous specification of the CCD of the XGA standard is that not only in the photographing mode but also in the EtoE mode.
Unlike the SC system / PAL system synchronization specification, 264 h / v × 50 f / s = 13.2 kHz (fh) (1) Here, 264 h / v indicates that the total number of lines per field is 264, and 50 f / s
Represents 50 fields per second, and fh represents the horizontal frequency.

In this embodiment, in the EtoE mode,
The CCD 2 is driven by a clock having a frequency of 16.764 MHz. This clock frequency is 5/3 times the frequency (10.588 MHz) in FIG. That is, FIG.
In this case, unlike the case of outputting an image of 30 fields per second, in this embodiment, the CCD 2 outputs an (1024 × 264) image at 50 fields per second in the EtoE mode.

In the EtoE mode, C through the lens unit 1
The video signal formed on the CD 2 is processed by the camera signal processing unit 4.
It is used for processing such as automatic aperture control, automatic focus control, and automatic white balance correction.
A digital image signal is generated in the form of a component signal composed of a luminance signal and a color difference signal converted from the GB signal. The digital component signal from the camera signal processor 4 enters the aspect converter 16 via the memory controller 5.

As will be described later, the aspect conversion section 16 corrects an aspect deviation caused by a difference between the number of vertical lines of the image signal output in the EtoE mode and the number of vertical lines of the input signal of the LCD 8. I do. The output signal of the aspect conversion unit 16 is converted into an analog signal by the D / A converter 7, input to the LCD 8, and displayed. L
CD8 is a standard television signal (NTSC, PAL,
VGA (Video Graphics Array, 640 × 480) can be displayed.

In the XGA image capturing mode of this embodiment, when the CPU 12 detects that the shutter of the operation input unit 13 has been pressed, the CCD 2 is set to the photographing mode, and (1024 × 768, 10 fields) / Sec). Memory controller 5
Takes the right to use the bus from the CPU 12 and uses the address generated by the address generator of the memory controller 5
By the MA operation, the photographed image data is directly written in the DRAM 9. Then, the image in the DRAM 9 is JPEG-compressed by the encoder / decoder 15 (or the CPU 12), and written into the external storage medium 11 via the interface 10.

The image (XG) recorded on the external storage medium 11
At the time of reproduction for reproducing A), JPEG compressed data is read from the external storage medium 11 via the interface 10,
The data is temporarily stored in the DRAM 9. Then, using the address created by the address generator of the memory controller 5, the DM
A, the data is read out by the method of
(Or the CPU 12) performs JPEG expansion, and then a 1024 × 768 image is written into the DRAM 9. After writing to the DRAM 9, the CPU 12 passes the right to use the bus to the memory controller 5.

The memory controller 5 generates a read address and reads image data from the DRAM 9 in synchronization with display timing by the DMA method. At this time, DR
An image (1024 × 25) in which a read address for AM9 is generated every third address and the number of vertical lines is thinned to に
6) is read from the DRAM 9. Image data read from the DRAM 9 by line thinning is supplied to the D / A converter 7 through the memory controller 5 and the aspect converter 16. Then, it is displayed on the LCD 8. The operation of photographing and confirming the image stored in the DRAM 9 may be performed after photographing.

The LCD 8 is, for example, an NTSC standard LCD.
The synchronous specification is as follows: 262.5 h / v × 60 f / s = 17.73 kHz (fh) (2) Here, 262.5h / v indicates that the total number of lines per field is 262.5, and
0f / s represents 60 fields per second, and f
h represents the horizontal frequency.

As described above, the embodiment of the present invention differs from the conventional configuration in that the buffer memory 6 for display is omitted and the aspect conversion section 16 is provided. As can be seen from Expressions (1) and (2), the synchronization specifications of the CCD 2 and the LCD 8 are different. When the display buffer memory 6 is omitted and the digital image signal from the camera signal processing section 4 is directly supplied to the LCD 8 for display, the specification is almost the same as the synchronous specification of the CCD 2 shown in Expression (1). The LCD 8 is driven.

Specifically, the clock frequency of the LCD 8 is lowered, and the horizontal frequency fh is set to the value of the equation (1) (13.2 kHz).
In accordance with z), change the field frequency from 60 Hz to 50 Hz. As described above, it is usually possible to change the horizontal frequency and the field frequency of the LCD 8.
That is, as can be seen by comparing Expressions (1) and (2), the number of lines (264 h / v) of the CCD 2
It is only 1.5 h / v more than the number of lines of 8 (262.5 h / v). This difference is of a degree that the LCD 8 allows. For example, in consideration of fluctuations in the horizontal frequency of a reproduction signal during variable-speed reproduction of a VTR, a normal LCD has ±
It has a permissible range of about 1.7% line number fluctuation.
Also, the LCD can display not only the NTSC signal but also the PAL signal.
Changing from Hz to 50 Hz is within the specification of the LCD 8.

The flow of image processing in the EtoE mode according to one embodiment of the present invention will be described with reference to FIG. As shown in FIG. 2A, in the captured image area (1270 × 264) of the CCD 2 in the EtoE mode, the effective image area is (10
24 × 256). As shown in FIG. 2B, except for the upper, lower, left and right end portions in the effective image area,
An area of (960 × 240) is cut out as a display target.
This is to match the number of lines (240 lines) of the LCD 8 of the NTSC standard. That is, the number of lines in the vertical direction of the image signal is adjusted to the number of lines of the LCD 8. In order to keep the aspect ratio (the ratio between the height and width of the screen) constant, the number of pixels in the horizontal direction is cut out as 960 pixels out of 1024 pixels in accordance with the ratio of 256 lines to 240 lines. This processing is performed by the camera signal processing 4 or the memory controller 5.

On the other hand, as shown in FIG.
The display target is 1056 pixels, which is 83% of the 1270 pixels in one line. Therefore, the display target (960 × 240) cut out as shown in FIG.
8, there is a problem that an image reduced to 960/1056 = 91% is displayed. Therefore, in this embodiment, the aspect conversion unit 16 is provided to perform the expansion processing only in the horizontal direction (10:11).

FIG. 3 shows an example of the configuration of the aspect conversion section 16. Data from the memory controller 5 is supplied to a FIFO (First In First Out Memory) indicated by 21. The FIFO 21 has 96 stages. FIFO2
1 is supplied with a pixel clock, a write address, and a read address. Also, the FIFO is used every one horizontal period.
21 is reset. As actual hardware,
The FIFO 21 can be configured by the RAM.

FIG. 4 shows a write operation and a read operation of the FIFO 21. The read address is delayed at a rate of 10% with respect to the write address, and data before interpolation of 960 pixels to 1056 pixels is formed on the time axis. More specifically, the process of reading pixel data at the same read address is repeated at a rate of once every ten times. 1056-960
= 96, the FIFO 21 requires 96 stages of capacity.

The image data read from the FIFO 21 is supplied to an interpolation filter. The interpolation filter includes a one-pixel delay element 22 and multipliers 23 and 2 connected to taps derived from the input and output of the delay element 22, respectively.
4 and an adder 2 for adding the outputs of the multipliers 23 and 24
5 and a coefficient generator 26 for generating coefficients for the multipliers 23 and 24. The coefficient generator 26
A read address for the FIFO 21 is supplied, and an appropriate coefficient is supplied to the multipliers 23 and 24 according to the pixel position in the horizontal direction. With this interpolation filter, 2
Decompression data is formed based on the weighted average between points.

Next, another embodiment of the present invention will be described. In another embodiment, an aspect conversion unit is omitted by using a data holding display device as a display device. That is, the function of the interpolation filter is omitted in the data holding display device. As an example of the data holding display device, a TFT (Thin Film Transister) -LCD that can be used in another embodiment will be described with reference to FIG.

In FIG. 5, reference numeral 31 denotes a timing generator.
A horizontal synchronization signal Hsync and a vertical synchronization signal Vsync are supplied. Horizontal sync signal Hsync and vertical sync signal Vsync
Is synchronized with the video signal supplied to the LCD 8. The timing generator 31 has a PLL configuration and generates a clock CK having a frequency 510 times the frequency of the PLL, a horizontal timing signal HD whose timing has been adjusted, and a vertical timing signal VD in synchronization with the horizontal synchronization signal. These timing signals HD and VD are supplied to the controller 22. The controller 32 generates drive signals for the row driver 33 and the column driver 34, for which the necessary timing has been adjusted.

The frequency of the clock CK is 13.2 kHz
× 510 = 6.756 MHz, the frequency of the horizontal timing signal HD is 13.2 kHz, and the frequency of the vertical timing signal VD is 50 Hz. This frequency is
This is the same as that of the above-described embodiment.

The displayed video signals (analog luminance signal Y and analog color difference signal C) are supplied to an RGB decoder 35. The RGB decoder 35 generates an RGB analog output adjusted to a required polarity and signal level, and outputs TF
It is supplied to the T-type LCD panel 36. LCD panel 36
Are the signal line from the row driver 33 and the column driver 3
The transistors provided at the intersections (indicated by circles) with the signal lines from No. 4 hold the analog voltage from the RGB decoder 35 in the capacitor, and the brightness is displayed according to the voltage.

The row driver 33 sequentially activates signal lines in the horizontal direction. Row signal line is 1 to 364
When the column signal lines are sequentially driven, the active column signal line is advanced by one in the vertical direction. The transistor at the intersection of the active signal lines is turned on, and the position is displayed. The signal voltage is held by the capacitor, and becomes a display level of brightness according to the signal voltage. That is,
The LCD panel 36 has a memory function. Aspect conversion is performed using this property. Therefore, as in the overall configuration shown in FIG. 6, in another embodiment, the aspect conversion section 16 of one embodiment is omitted, and the digital image signal passed through the memory controller 5 is transmitted to the LCD via the D / A converter 7.
8 directly.

The time relationship between the LCD 8 and the video signal in another embodiment will be further described with reference to FIG. In FIG. 7, reference numeral 41 denotes the maximum size of an image from the CCD 2 (XGA: 1270 × 264). In this case, the length of one horizontal period is 57.47 μsec (= 510CK)
(Clock)). Reference numeral 42 denotes an effective image size (960 × 2) cut out according to the NTSC effective display area.
40). This is the same size as one embodiment. In this case, the length of one horizontal period is 57.05 μsec. The effective image size is displayed on the LCD 8 without performing the aspect conversion. The effective display area of the LCD 8 is 4
The vertical direction is 220 lines and the length of one horizontal period is 56.82 μsec (= 384 clocks).
It is. This display is a vertically long display, and is not a normal display.

The number of vertical lines of the effective image size and the LCD
Comparing with the number of vertical lines in the effective display area of No. 8 is 22
The display area is cut out at a ratio of 0/240. When this ratio is also applied to the horizontal direction, 57.47 μsec
(= 510CK), a period of 52.30 μsec should correspond to the entire horizontal area. This period is 384
In order to make a clock, the clock frequency is corrected so that 57.47 μsec corresponds to 554 clocks. As a result, the effective display area of the LCD 8 is indicated by 44, and a normal image having undergone the aspect conversion is displayed on the panel of the LCD 8.

The clock frequency of the LCD 8 can be easily corrected by changing the frequency multiplication ratio of the PLL of the timing generator 35. That is, a multiplication ratio for displaying an NTSC image on the timing generator 35 and a multiplication ratio for displaying the output of the CCD 2 are prepared in advance, and the multiplication ratio is switched according to the application.

In the above description, the TFT type LCD is used, but the present invention can be applied to other data holding type display devices.

According to the present invention, as the image size to be taken into the memory, a size other than XGA, for example, VGA (Vi
deo Graphics Array, 640x480), CIF (Common Inter
mediate Format, 320x240) and QCIF (Quater C
IF, 160 × 120) can also be applied to a device having a function of taking in. In addition, not only still images, but also videos are taken and displayed,
The present invention is also applicable to an apparatus having a function capable of recording. Further, the present invention can be applied to an apparatus having a function of recording audio information in addition to image information. Further, as the external storage medium 11 in the above embodiments, various removable media, disk media such as a floppy disk and the like can be used. The present invention is also effective when transmitting captured image data to a communication path such as a network, RS232C, or non-contact IrDA, without being limited to a storage medium.

[0048]

As described above, according to the present invention, the buffer memory conventionally required to absorb the difference between the synchronization specification of the image pickup device and the synchronization specification of the display device can be omitted. Therefore, cost reduction and power consumption reduction of the buffer memory can be achieved. Further, when the zoom magnification is high, there is an advantage that the time lag between the zoom operation and the displayed image is increased by the buffer memory, and the operability for adjusting the angle of view does not deteriorate.

[Brief description of the drawings]

FIG. 1 is a block diagram of one embodiment of the present invention.

FIG. 2 is a schematic diagram illustrating an aspect conversion process according to an embodiment of the present invention.

FIG. 3 is a block diagram illustrating an example of an aspect conversion unit.

FIG. 4 is a schematic diagram used to describe the operation of an aspect conversion unit.

FIG. 5 is a block diagram of an example of an LCD that can be used in another embodiment of the present invention.

FIG. 6 is a block diagram of another embodiment of the present invention.

FIG. 7 is a schematic diagram used for describing another embodiment of the present invention.

FIG. 8 is a block diagram of an example of a digital camera to which the present invention can be applied.

[Description of Signs] 2 ... CCD, 4 ... Camera signal processing unit, 5 ...
Memory controller, 8 ... LCD, 9 ... DRA
M, 11: external storage medium, 12: CPU, 13
... Operation input unit, 16 ... Aspect conversion unit

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2H054 AA01 5C022 AA13 AB00 AB12 AB22 AB36 AB64 AB65 AB67 AC03 AC12 AC32 AC42 AC52 AC69 5C053 FA05 FA08 FA23 FA27 GA11 GA14 GB21 GB27 GB36 JA27 JA28 KA01 KA08 KA11 KA18 KA24 KA22

Claims (5)

[Claims] 1. An image display apparatus for displaying a captured image, comprising: a first mode for outputting an image signal having a different number of pixels from a standard television system and corresponding to the entire image information; Or, an imaging unit capable of switching between a second mode for outputting an increased imaging signal, a display unit that can be driven by the standard television system synchronous specification, or a similar synchronous specification, Memory means for storing an image signal output in a first mode of the means; number of vertical lines of the image signal output in a second mode of the image means; An image display device comprising: a correction unit configured to correct a deviation of an aspect caused by a difference from the number of lines in the direction. 2. An image display apparatus for displaying a photographed image, comprising: a first mode for outputting an image signal corresponding to the entire image information, the number of pixels being different from that of a standard television system; Or, an imaging means capable of switching between a second mode for outputting an increased imaging signal, and a data holding function which can be driven by the synchronous specification of the standard television system or a similar synchronous specification. Display means, a memory means for storing an image signal output in the first mode of the image pickup means, a number of vertical lines of the image signal output in the second mode of the image pickup means, An aspect shift caused by a difference from the number of lines of the input signal of the display means in the vertical direction is corrected by selecting a data holding clock of the display means. An image display device comprising and. 3. A digital camera device in which a captured image is recorded as a digital signal on a recording medium, wherein the number of pixels is different from that of a standard television system, and an image signal corresponding to the entire image information is output. An imaging unit capable of switching between a first mode and a second mode for outputting an imaging signal in which imaging information is reduced or increased; a signal processing unit for processing an imaging signal from the imaging unit; Encoding means for compressing and encoding a digital image signal output from the signal processing means to generate encoded data when the means is operated in a first mode; and loading the encoded data into memory means Control means for controlling the same; display means which can be driven by the standard television system synchronous specification or similar synchronous specification; and the imaging means Is operated in the second mode, the aspect shift resulting from the difference between the number of vertical lines of the digital image signal output from the signal processing means and the number of vertical lines of the input signal of the display means. Correction means, a storage medium for storing data stored in the memory means, a storage medium driving means, and an operation means including a shutter button. A digital camera device which displays an image signal obtained by processing the image pickup signal output in the above mode by the signal processing means and the correction means on the display means. 4. A digital camera device in which a captured image is recorded as a digital signal on a recording medium, wherein the number of pixels is different from that of a standard television system and an image signal corresponding to the entire image information is output. An imaging unit capable of switching between a first mode and a second mode for outputting an imaging signal in which imaging information is reduced or increased; a signal processing unit for processing an imaging signal from the imaging unit; Encoding means for compressing and encoding a digital image signal output from the signal processing means to generate encoded data when the means is operated in a first mode; and loading the encoded data into memory means Control means for controlling the standard television system, and can be driven by the synchronous specification of the standard television system or a similar synchronous specification, and has a data holding function. Indicating means, a storage medium for storing data stored in the memory means, a storage medium driving means, and an operation means including a shutter button. In the monitor mode of the photographed image, the second mode of the imaging means is used. Aspect deviation caused by a difference between the number of vertical lines of the output imaging signal and the number of vertical lines of the input signal of the display means is corrected by selecting a data holding clock of the display means. A digital camera device characterized by the following. 5. The apparatus according to claim 1, wherein the standard television system is one of NTSC, PAL, and VGA.