JP2000069418A - Pixel number converter and digital camera device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the scale of circuit and to relieve the load of software processing in the case of converting the number of horizontal and vertical pixels of an image. SOLUTION: A memory controller 5 converts the number of pixels of a photographed image of a CCD 2 and applies joint photographic experts group JPEG compression to the image, a DRAM 9 stores it or an external storage medium 11 records the image. The DRAM 9 stores JPEG data reproduced from the external storage medium 11, applies JPEG expansion to the data and an LCD 8 displays the expanded image via the memory controller 5 and a buffer memory 6. In the case of receiving the photographed image, the memory controller 5 uses an arithmetic circuit of a horizontal pixel number conversion section 51 to conduct horizontal pixel number conversion and the vertical line number of the image is converted by a software stored in a CPU 12. A CCD 2 generates a photographing output whose line number is interleaved in the monitor use E to E mode. The switching of the mode of the CCD 2 is used for conversion of pixel numbers. In the case of confirmation reproduction and of the reproduction, the number of lines is converted by interleaving read addresses from the DRAM 9.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a pixel number conversion device and a digital camera device capable of taking a photographed image into a storage medium at a set resolution or size.

[0002]

2. Description of the Related Art Digital cameras that record digital image information on recording media such as floppy disks and semiconductor memories have become widespread. A digital camera is configured to convert a captured image into a digital image signal, compress the digital image signal, and record the compressed image information on a recording medium. A digital camera uses a high-resolution image sensor having a large number of pixels, for example, a CCD in order to improve the quality of a recorded still image. However, the amount of image data obtained from a high-resolution CCD increases, and even if the data is compressed, the number of images that can be recorded on an external storage medium (floppy disk, memory card, or the like) having a limited capacity decreases. Therefore, when shooting a stationary object, CC
A mode for compressing and storing the imaging output of D.
2. Description of the Related Art There has been known a digital camera capable of converting an image pickup output into a signal having a small number of pixels and selecting a mode in which the converted image signal is compressed and stored.

Further, the digital camera can be extended not only to recording of a still image but also to recording of a moving image. However, in the case of a moving image, the data amount is considerably larger than that of a still image, so that it is necessary to further reduce the number of pixels and reduce the image size. Not only for moving images, but also for still images, there are cases where it is desired to reduce the image size in the case of attaching a moving image file to a homepage or an e-mail.

As described above, it is useful that an image capturing device such as a digital camera has a function of capturing an image having a smaller number of pixels than the number of pixels of the CCD. 2. Description of the Related Art A conventional digital camera uses an arithmetic circuit as one configuration for performing processing (pixel number conversion) for changing the resolution and size of an image signal captured by a CCD. As another, there is a software processing which will be described later.

Hereinafter, a digital camera having such conventional pixel number conversion processing will be described. As an example,
CCD is XGA (eXtended Graphics Array, 1024x768)
Pixels), VGA (Video Graphics Array, 640x480 pixels), CIF (Common Intermediate Format, 320x240
Pixels), and QCIF (quarter CIF, 160x120 pixels)
A digital camera having a pixel number conversion function corresponding to the image size will be described.

FIG. 9 shows an entire configuration of an example of a digital camera device to which the present invention can be applied. Lens part 1 and C
An imaging unit is configured by the CD (Charge Coupled Device) 2. A control signal from the CPU 12 is supplied to the lens unit 1, and an automatic aperture control operation and an automatic focus control operation are performed. The CCD 2 has two operation modes: an operation mode for reading all pixels (photographing mode) and an operation mode for thinning out lines (EtoE mode) for outputting a signal in which the number of lines is reduced to １ ／.
Switching can be performed by a control signal from the PU 12. The number of pixels of the CCD 2 is 1024 × 768 pixels (X
GA).

[0007] In the EtoE mode, the data of the photographed image is not taken into the recording medium (DRAM 9), and the display unit (LC) is used.
This mode is displayed in D8). In the EtoE mode, the angle of view is determined during shooting, and the focus, exposure, and white balance are appropriately adjusted. That is, in the shooting mode, the state of checking the subject before pressing the shutter is EtoE.
Mode. In the EtoE mode, an image pickup signal of 1024 × 256 pixels is obtained. As an example, in the shooting mode, an imaging signal of 10 frames per second is output, and in the EtoE mode, an imaging signal of 30 frames per second is output.

The output signal of the CCD 2 is supplied to a sample hold and A / D converter 3, and the sample hold and A / D converter 3 generates a digital image signal of 10 bits per sample. Sample hold and A / D
The conversion unit 3 has a configuration of a correlated double sampling circuit,
Noise removal, waveform shaping, and compensation for defective pixels are performed.

The digital image pickup signal is transmitted to the camera signal processing unit 4
Supplied to The camera signal processing unit 4 includes a digital clamp circuit, a luminance signal processing circuit, a color signal processing circuit, a contour correction circuit, a defect compensation circuit, an automatic aperture control circuit, an automatic focus control circuit, an automatic white balance correction circuit, and the like.
The camera signal processing unit 4 generates a digital image signal in the form of a component signal composed of a luminance signal and a color difference signal converted from the RGB signals. Each component of the digital image signal from the camera signal processing unit 4 is supplied to the memory controller 5. For the memory controller 5, a display buffer memory 6 and a CPU 12
Bus 14 is connected. The buffer memory 6 generates RGB signals by processing the component signals, and outputs the RGB signals to the D / A converter 7. D /
An analog signal from the A converter 7 is supplied to the LCD 8. Further, the buffer memory 6 outputs the RGB signals at a timing corresponding to the display timing of the LCD 8.

A DRAM (Dynamic Ran) is connected to the bus 14.
dom Access Memory) 9, a CPU 12, an encoder / decoder 15, and an interface 10. D
The RAM 9 is controlled by an address signal and a control signal supplied from the memory controller 5 or the CPU 12. Further, the memory controller 5 has a pixel number conversion function described later, and converts the number of pixels in accordance with the setting of the photographer.

The encoder / decoder 15 compresses (encodes) or expands (decodes) image data. For example, when processing a still image, JPEG (Joint Photogr
When processing moving images, MPEG (Moving Picture Experts Group) is used. Here, the encoder / decoder 15 or JPEG
To compress or decompress image data. However,
The encoder / decoder 15 may have a function corresponding to both encoding methods. Also, regarding JPEG, encoding / decoding may be performed by software processing of the CPU 12.

The interface 10 is an external storage medium 1
1 and an interface between the CPU 12. As the external storage medium, a disk-shaped recording medium such as a floppy disk, a memory card, or the like can be used. Furthermore, CP
An operation signal from the operation input unit 13 is supplied to U12. The operation input unit 13 includes a shutter button and other various switches operated by the photographer. The operation input unit 13 includes a switch for specifying an image format to be stored in the external storage medium. The operation input unit 13
An operation of a button, a switch, or the like is detected, and the detected signal is sent to the CPU 12 as an operation signal.

FIG. 10 shows a configuration of a memory controller 5 which converts the number of pixels using a conventional arithmetic circuit. In the EtoE mode, the CCD 2
An image signal (1024 × 256 pixels) whose V (vertical) direction is thinned out to 1/3 is output by the EtoE mode operation. A digital component signal from the camera signal processing unit 4 is supplied to the memory controller 5.

The data is written to the display buffer memory 6 through the input terminal c of the switch SW2 of the memory controller 5. Then, the data is read from the buffer memory 6 at a timing corresponding to the display timing of the LCD 8, and is displayed as an analog signal by the D / A converter 7. At this time, from the area of 1024 × 256 pixels written in the buffer memory 6, the end portion of the image is cut off to cut out an area of 960 × 240 pixels, and the image is read out from the buffer memory 6 at double speed and displayed.

In the XGA image capturing mode, when the CPU 12 detects that the shutter of the operation input unit 13 has been pressed, the CCD 2 is set to the photographing mode, and (1024)
An image signal of (x768 pixels, 10 frames / second) is generated. The switch SW1 of the memory controller 5 is set to a state where the input terminal b is selected, and DMA (Direct Memory Access) is performed using the address generated by the address generation unit 53.
By the operation, the still image data is directly written in the DRAM 9.

In the confirmation playback mode (PB1) in which the photographer confirms the image captured in the XGA image capture mode, the switch SW2 of the memory controller 5 is set to the input terminal e and the switch SW3 is set to the input terminal at the same time when the capture is completed. Set to f. And the XGA in the DRAM 9
The image data is converted into a vertical line number conversion unit (V. CNV2) 55
, The number of lines is read out while being reduced to 、, and written and displayed in the buffer memory 6. The write timing is the same as when the CCD 2 operates in the EtoE mode (1024 × 256 pixels, 30 frames / sec).

After displaying a photographed image for a predetermined time, the CC
D2 is set to the EtoE mode, the switch SW2 of the memory controller 5 is set to the input terminal d, the display is returned to the image being photographed, and the image in the DRAM 9 is JPEG-compressed by the encoder / decoder 15 (or CPU 12). , An external storage medium 11 via the interface 10
Write to.

In the VGA image capturing mode, the CIF image capturing mode, and the QCIF image capturing mode, an image whose number of pixels has been converted is loaded into the DRAM 9. The difference from the XGA image capture mode is that the switch SW1 of the memory controller 5 is set to the input terminal a, the horizontal pixel number conversion unit (H.CNV1) 51 and the vertical line number conversion unit (VC).
NV1) The data after passing through 52 is taken into the DRAM 9. The horizontal pixel number converter 51 and the vertical line number converter 52 switch a combination of VGA, CIF, and QCIF coefficients according to a control signal (not shown) from the CPU 12.

In the confirmation playback mode (PB2) in which the photographer confirms the captured image in each of the VGA image capturing mode, the CIF image capturing mode, and the QCIF image capturing mode, the switch SW2 of the memory controller 5 is turned on at the same time when the capturing is completed. The input terminal d is set, and the switch SW3 is set to the input terminal g. That is, the difference from the XGA image capturing mode at the time of the confirmation reproduction is that the processing of the horizontal pixel number conversion unit (H.CNV2) 54 is added.

When reproducing an image recorded in the external storage medium 11, JPEG compressed data is read from the external storage medium 11 via the interface 10, JPEG-decompressed by the encoder / decoder 15, and written into the DRAM 9. Then, the switch SW of the memory controller 5
2 is switched to the input terminal d or e in accordance with the size, data is read out by the DMA method using the address created by the address generation unit 53, and transferred to the buffer memory 6 for display. The same 1024 × 256 pixels as in the EtoE mode are written at a rate of 30 frames / sec.

At the time of reproduction, it is necessary to convert the number of pixels according to each recording size. That is, XGA, VGA, CIF
When displaying an image of size V, the vertical line number conversion unit 5
5 performs 1/3, 1/2 and 1/2 line thinning, respectively, and
When displaying an image of the IF size, line thinning is not performed. The horizontal pixel number conversion unit 54 includes VGA, CIF, Q
When displaying images of CIF size, 2: 3,
Perform 2: 3 and 1: 3 interpolation processing. FIG. 11 shows the relationship between the conversion ratio of each pixel number conversion and the image size. Confirmation reproduction is the same as reproduction, and FIG. 11 also shows a combination of conversion processes in the reproduction mode.

FIG. 12 shows an image display in the reproduction mode. When displaying the XGA and VGA images on the LCD 8, as shown in FIG. 12A, the reproduced image is displayed on the entire screen. In addition, when displaying images of CIF and QCIF on the LCD 8, as shown in FIG. 12B, a reduced image of 面積 in area is displayed in a part of the display area.

FIG. 13 shows an example of a specific configuration of the horizontal pixel number conversion units 51 and 54. Three one-pixel delay elements 20 are connected in series, four taps are derived from the serial connection, a multiplier 21 is connected to each tap, a multiplied output of the multiplier 21 is added by an adder 22, and an adder 22 is added. An output signal is extracted from 22. To the multiplier 21, the coefficients a0, a1, a2, and a3 are supplied from the coefficient switching unit 23. The coefficient switching unit 23 uses the output of the pixel position counting unit 24 corresponding to the pixel position to generate a coefficient corresponding to the pixel position. FIG. 13 shows a configuration of a four-tap FIR filter, in which a required number of taps are provided according to a calculation accuracy requirement. The combination of coefficients is switched according to each image size. In FIG. 13, the circuits are expressed separately in the image capturing mode and the image reproduction mode. However, actually, a common circuit is selectively used depending on the mode.

FIG. 14 shows an example of a specific configuration of the vertical line number converters 52 and 55. Three one-line delay elements 25 are connected in series, four taps are derived from the series connection, a multiplier 26 is connected to each tap, a multiplied output of the multiplier 26 is added by an adder 27, and an adder 27 is added. An output signal is extracted from 27. . To the multiplier 26, the coefficients b0, b1, b2, and b3 are supplied from the coefficient switching unit 28. The coefficient switching unit 28 includes a line number counting unit 29
A coefficient corresponding to the number of lines is generated using an output corresponding to the number of lines. FIG. 14 shows a configuration of a 4-tap FIR filter, in which a required number of taps are provided in accordance with a calculation accuracy requirement. The combination of coefficients is switched according to each image size. The one-line delay element 25 requires 1270 pixels, which is one horizontal cycle of the CCD 2. For example, 4: 2: 2
In the case of the component signal of (1), a memory of 1,270 × 3 × 2 = 7,620 bytes is required for one line delay. In FIG. 14, the circuits are separately illustrated in the image capturing mode and the image reproducing mode.
In practice, a common circuit is selectively used depending on the mode.

Next, a method of converting the number of pixels by software processing will be described. Since the number of pixels is converted by software when each image of VGA, CIF, and QCIF is captured, the configuration of the memory controller 5 is greatly simplified as shown in FIG. That is, the switch SW1
Selects the input terminal b in the image capturing mode,
In the toE mode and the reproduction mode, the input terminal a is selected. XGA for DRAM 9 irrespective of image size
, The data in the DRAM 9 is converted by software processing. In the reproduction mode, the switch SW2 selects the input terminal d, and in the EtoE mode, the switch SW2 selects the input terminal c.

FIG. 16 and FIG. 17 show a flow at the time of performing the photographing / confirmation reproduction operation when the number of pixels is converted by the conventional software. FIGS. 16 and 17 show a series of flows, but are shown as separate drawings due to the limitation of the drawing space. First, the CCD 2 is set to the EtoE mode, and the switch SW2 is set to the input terminal c (step S0). Then, in step S1, E
Wait for the shutter button to be pressed in toE mode. When it is detected in step S2 that the shutter button has been pressed, the switch SW1 is set to the input terminal b (step S3). Further, the CCD 2 is set to the photographing mode (step S4). Then, under the control of the memory controller 5, the still image data captured by the CCD 2 is loaded into the DRAM 9 via the switch SW1 (step S5).

The CPU 12 converts the number of pixels by
In step S6, the size of the image to be captured is checked. In the case other than XGA, in step S7, the number of horizontal and vertical pixels is converted according to each image size (photographed image)
I do. Then, in step S7, horizontal / vertical pixel number conversion (display image) according to each image size is performed. Also,
In step S6, if the image size is XGA, step S6 is skipped and the process proceeds to step S7.
The process of converting the number of horizontal / vertical pixels (photographed image) and the process of converting the number of horizontal / vertical pixels (display image) are shown in FIG. 11, and these pixel number conversion processes are performed by software.

Next, as shown in FIG.
1 is set to the input terminal a and the switch SW2 is set to the input terminal d (step S9). The display image converted by the horizontal / vertical pixel number conversion (display image) in step S8 is read from the DRAM 9, and is stored in the buffer memory 6 via the switch SW2.
(Step S10). Then, the captured image is displayed for a short time of about 1 second or 2 seconds. With this display, the photographed image can be confirmed.

In the next step S12, the CCD 2 is set to Eto
E mode, switch SW2 is set to input terminal c, and Eto
Switch to E mode and display the captured image. And DRAM
9 is compressed by JPEG (step S13). The JPEG compressed data is stored in the DRAM 9 in an area different from the original image data.
At 4, the data is transferred to the external storage medium 11 via the interface 10. Then, step S1 of waiting for a shutter
Return to

In the above-described shooting / confirmation / reproduction operation, CC
In the interval from step S4 for setting D2 to the photographing mode to step S10 for transfer to the buffer memory 6, LCD
8 cannot display an image.

FIG. 18 shows a process at the time of reproduction. In step S20, the switch SW of the memory controller 5
2 is set to the input terminal d. In the next step S21,
The display image is selected. For example, the images are displayed in reverse order from the last image taken. Alternatively, six captured images are divided and displayed on one screen, and an image to be reproduced is selected from the divided images (index images). The selected image is read from the external storage medium 11 and the DRAM 9
(Step S22).

In the next step S23, the encoder / decoder 15 (or CPU 12) controls the DRAM 9
JPEG is decompressed for the data stored in. Then, the decompressed data is stored in the DRAM 9 (step S24). Next, horizontal / vertical pixel number conversion (display image) (step S25) is performed by software processing. This step S25 is a process for converting the image of each size to the number of pixels of 960 × 240 for display. In the next step S26, the obtained display image data is transferred to the buffer memory 6, and the reproduced image is displayed on the LCD 8.

Step S7 in the flowchart of FIG.
Horizontal / vertical pixel number conversion (captured image) processing
An example of conversion from XGA to VGA will be described with reference to FIG. In FIG. 19, white circles are pixels of an image (XGA) captured by the CCD 2, and triangles are VGA pixels to be obtained by conversion. In order to calculate VGA pixel a by interpolation, 4 × 4 = 1 surrounded by a broken line
Six XGA pixels are used. That is, for each pixel of the VGA, a convolution operation is performed on the convolution coefficient according to the reproduction coordinates and the values of the 16 XGA pixels. Therefore,
The calculation amount is 16 multiplications of the coefficient and the XGA pixel value, one addition for adding the multiplication result, and one division for dividing (shifting) the addition result.

The calculation amount for software conversion is Y: U: V
= 4: 2: 2, 640 × 480 × 4 × 4 × 2 = 9,830,400 multiplications / additions (in the case of VGA) during image capture (shooting), and 960 × 240 during reproduction. × 4 × 4 × 2 = 7,372,800 multiplications / additions.

[0035]

In the conventional example described above, although the pixel number conversion is an additional function, the method using the arithmetic circuit requires a large amount of memory, increases the circuit scale, and reduces the development time. (Problem 1), a problem of increased cost (Problem 2), and a problem of increased power consumption (Problem 3). Further, the software method can simplify the circuit scale, but has a problem (problem 4) that the processing time increases and the time during which an image cannot be displayed during processing (blanking operation) increases during shooting. At the time of reproduction, since the conversion of the number of pixels is processed by software, it takes a long time to read an image (problem 5), and the merchantability as a digital camera has been significantly sacrificed.

Accordingly, an object of the present invention is to provide a pixel number conversion device and a digital camera device which can solve the above-mentioned conventional problems.

[0037]

According to a first aspect of the present invention, there is provided a pixel number conversion device for converting the number of pixels of an input image, the first pixel having the same number of pixels as an image sensor. It has a function of taking in an image into a memory means and a function of taking in a second image having a different number of pixels from the first image into the memory means. The number of pixels on the first coordinate axis is converted by an arithmetic circuit in accordance with the flow of the image signal from the element, and the conversion on the number of pixels on the second coordinate axis orthogonal to the first coordinate axis is performed by software processing after completion of loading into the memory means. The number of pixels conversion device is characterized by performing

According to a fourth aspect of the present invention, there is provided a digital camera device in which a photographed image is recorded as a digital signal on a recording medium, an image pickup means for outputting a photographed image signal, and a signal for processing the image signal from the image pickup means. Processing means; coding means for compressing and coding the digital image signal from the signal processing means to generate coded data; control means for controlling the operation of taking the coded data into the memory means; and displaying the digital image signal. Display means, a storage medium for storing data stored in the memory means, a storage medium drive means, and an operation means including a shutter button, and a first image having the same number of pixels as the imaging means;
When the second image having a different number of pixels from the image of the first image is selectively loaded into the memory means and converted from the first image to the number of pixels of the second image, the second image along the flow of the image signal from the imaging means is obtained. The number of pixels on the coordinate axis 1 is converted by an arithmetic circuit, and the first
The digital camera device is characterized in that the conversion of the number of pixels on the second coordinate axis orthogonal to the coordinate axis is performed by software processing after completion of loading into the memory means.

According to the first and fourth aspects of the present invention,
Since the horizontal pixel number conversion is performed by an arithmetic circuit and the vertical line conversion is performed by software processing, when converting the number of pixels and taking in the memory means, the circuit scale and processing can be greatly reduced as compared with the conventional method. That is, in the present invention, it is necessary to add software processing, but the amount is small, and a large reduction in circuit scale can be achieved.

[0040]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a digital camera according to the present invention will be described below with reference to the drawings.
FIG. 1 shows the overall configuration of this embodiment. One embodiment is similar to the digital camera shown in FIG. 9 described above.
CCD is XGA (1024x768 pixels) and VGA (640x48
0 pixels), CIF (320 x 240 pixels), and QCIF
It has a pixel number conversion function corresponding to an image size of (160 × 120 pixels).

An imaging unit is constituted by the lens unit 1 and the CCD 2, and a control signal from the CPU 12 is supplied to the lens unit 1 to perform an automatic aperture control operation and an automatic focus control operation. The shutter speed and aperture are automatically set according to the subject and shooting conditions. A plurality of shooting modes other than the automatic mode can be provided. The CCD 2 has an operation mode (photographing mode) for reading all pixels and a 1 /
An operation mode (EtoE mode) of line thinning that outputs a signal reduced to 3 can be switched by a control signal from the CPU 12. The number of pixels of CCD2 is
It is 1024 × 768 pixels (XGA).

In the EtoE mode, the data of the photographed image is not taken into the recording medium (DRAM 9) and the display unit (LC
This mode is displayed in D8). In the EtoE mode, the angle of view is determined during shooting, and the focus, exposure, and white balance are appropriately adjusted. In EtoE mode, 102
An image pickup signal of 4 × 256 pixels is obtained. As an example, in the shooting mode, an imaging signal (XGA) of 10 frames per second
Is output, and in the EtoE mode, an image pickup signal (line thinning signal) of 30 frames per second is output.

The CCD 2 will be described more specifically. In the XGA photographing mode, the signal charges from the respective photosensors are read out to the vertical CCD without mixing, and the signal charges of all the pixels are sequentially transferred to the horizontal CCD. In the E to E mode, a wiring for supplying a read signal to a transfer gate that contributes to reading of a signal charge from each photosensor is divided,
The number of lines is reduced. Furthermore, in the two modes, the arrangement of the color filters and the order of the corresponding three primary color signals are the same.

The present invention relates to a solid-state image pickup device (not limited to a CCD) capable of thinning out lines by another configuration, a solid-state image pickup device capable of thinning out the number of pixels in a horizontal direction, or a vertical direction. A solid-state imaging device capable of thinning out the number of lines and the number of pixels in the horizontal direction may be used.

The output signal of the CCD 2 is supplied to a camera signal processing unit 4 via a sample hold and A / D conversion unit 3, and the camera signal processing unit 4 comprises a luminance signal and a color difference signal converted from RGB signals. A digital image signal is generated in the form of a component signal. The digital image signal is supplied to the memory controller 5, the signal path of the digital image signal is switched according to the operation mode, and the number of pixels is converted according to the image size.

The display buffer memory 6 connected to the memory controller 5 and the D / A converter 7
A display signal for the LCD 8 is generated. The image signal from the memory controller 5 is stored in the DRAM 9 and
The image signal is converted by the encoder / decoder 15 into, for example, JPEG
Then, the compressed data is stored in the DRAM 9 connected to the bus 14 of the CPU 12. Compressed data is recorded from the DRAM 9 to the external storage medium 11 via the interface 10. The DRAM 9 stores the compressed image data (JPEG data) in an area different from the area where the original image data is stored. Thereafter, under the control of the CPU 12, the JPEG data is read from the DRAM 9, and the JPEG data is read, for example, by MS-DOS (Microsoft D-DOS).
isc Operating System: registered trademark of Microsoft Corporation)
The data is converted into a format and supplied to the interface 10 (for example, a floppy disk controller).
(For example, a floppy disk).

The compressed data reproduced from the external storage medium 11 is stored in the DRAM 9 via the interface 10 and decompressed by the encoder / decoder 15. Then, the memory controller 5 receives the pixel number conversion process and displays it on the LCD 8. As the external storage medium 11, a disk-shaped recording medium such as a floppy disk, a memory card, or the like can be used.

The present invention can be applied not only to a case where a still image is photographed but also to a digital camera which records a moving image for a predetermined time. Also, audio information related to a still image or a moving image may be recorded at the same time.

The memory controller 5 includes a horizontal pixel number converter (H.CNV1) 51, a switch SW1, a horizontal pixel number converter (H.CNV1) 54, and a switch SW1.
And an address generator 53. In the memory controller 5, the horizontal pixel number is converted by the horizontal pixel number conversion units (H.CNV1) 51 and 54 having the configuration of the FIR filter. The conversion of the number of vertical lines is performed by the CPU 12 by software processing using the original image data stored in the DRAM 9. Switches SW1 and SW2
Is controlled according to the operation mode and the image size. As described above, as the pixel number conversion processing, the horizontal pixel number conversion is performed by the arithmetic circuit (filter circuit), and the vertical line number conversion is performed by software processing.

FIG. 2 shows a pixel number conversion process according to each image size in each of the capture mode (photographing mode) and the reproduction mode in the embodiment of the present invention.
In addition, as shown in FIG. 3A, when displaying XGA and VGA images on the LCD 8, a reproduced image is displayed on the entire screen. When displaying CIF and QCIF images on the LCD 8, as shown in FIG. 3B, a reduced image of １ ／ in area is displayed in a part of the display area.

Further, an image capturing operation according to an embodiment of the present invention will be described in more detail with reference to FIGS. FIG. 4 and FIG. 5 show a series of flows, but are shown as separate drawings due to the restriction of the drawing space. As shown in FIG. 2, in the image capturing operation, the calculation method of the pixel number conversion and the operation mode of the CCD 2 are selectively used according to the captured image size.

In the case of CIF and QCIF, CCD2 is set to EtoE
Use in mode. First, the CCD 2 is set to the EtoE mode, and the switch SW2 is set to the input terminal c (step S40). Then, in step S41, EtoE
Wait for the shutter button to be pressed in mode. At this time, 1024 × 256 (H, V) image data is read from the CCD 2 at a rate of 30 frames / second, and image data from the camera signal processing unit 5 is written into the buffer memory 6 through the memory controller 5. Displayed on LCD 8.

When it is detected in step S42 that the shutter button has been pressed, the size of the image to be captured is checked in step S43. This is CIF or Q
With the exception of CIF, the CCD 2 is set to the photographing mode,
In the case of IF or QCIF, the process moves to the next step S45. In step S45, the size of the image to be captured is checked. If the size is XGA, the switch SW1 is checked.
Is set to the input terminal b (step S47). Therefore,
The XGA image is not converted and is taken into the DRAM 9 as it is (step S48).

When the image size is determined to be other than XGA (that is, VGA, CIF, QCIF) in step S45, the horizontal pixel number converter 51 converts the image size into
Pixels are thinned out to 2/3, 1/3, and 1/6, respectively, and the image data after the thinning is taken into the DRAM 9 (step S5).
48).

In the next step S49, the image size is checked as shown in FIG.
In the case of the QCIF, the CPU 12 converts the data in the DRAM 9 into 2/3 and 1/2 lines, respectively (step S).
50). The converted data is stored in the DRAM 9 (step S51). With the XGA and CIF sizes, the number of vertical lines is not converted, and the process proceeds to step S51. As described above, at the time of recording, it takes time since image capture of VGA and QCIF converts the number of vertical lines by software, but as a result of sharing the conversion of the number of horizontal pixels by the arithmetic circuit, the conventional method of processing all by software The time-consuming ratio is reduced as compared with.

In step S51, the image capturing operation is completed, and then the mode is shifted to the confirmation reproduction mode. Step S52
To check the image size. If the image size is QCIF, the number of lines in the EtoE mode is taken as it is. If the image size is determined to be other than QCIF in step S52, simple thinning-out reading is performed in step S53. The simple thinning-out reading is a process of thinning out the number of lines by making the vertical reading address generated by the address generating unit 53 intermittent when reading data from the DRAM 9.

As shown in FIG. 2, in the reproduction mode, X
1/3 and 1/2 for GA, VGA and CIF respectively
, 1/2, the number of vertical lines is converted by simple thinning, and the number of lines is not converted by software. Since the number of lines is converted by simple thinning-out reading, the processing time can be shortened as compared with the case where conversion is performed by software, and an image can be displayed immediately by the confirmation reproduction operation.

Next, in step S54, the image size is checked, and if the image size is other than XGA, that is, VG
For A, CIF, and QCIF, the horizontal pixel number conversion unit 54
Is used to convert the number of pixels by interpolation. As shown in FIG. 2, the number of pixels is interpolated to 2: 3, 2: 3, and 1: 3 according to the image sizes of VGA, CIF, and QCIF, respectively.
When the image size is determined to be XGA in step S54, the switch SW2 is set to the input terminal e (step S55). Then, the VGA, CIF, and QCIF data passed through step S56 (the process of the horizontal pixel number conversion unit 54) or the XGA data passed through step S55 are transferred to the buffer memory 6 (step S57). Data transfer is 30 frames / same as EtoE operation of CCD.
It is repeated in a cycle of seconds. Then, the captured image is displayed for a short time of about 1 second or 2 seconds. With this display,
You can check the captured image.

When the display of the predetermined time is completed, the switch SW2 is set to the input terminal c (step S58). As a result, the display on the LCD 8 is changed from the reproduced image to the CCD 2
To EtoE image. Then, the image captured in the DRAM 9 is compressed by JPEG (step S59).
The JPEG compressed data is stored in an area different from the original image data in the DRAM 9 and further transferred to the external storage medium 11 via the interface 10 in step S60. Thereafter, the flow returns to step S41 for waiting for a shutter.
As described above, since the display on the LCD 8 is switched to the EtoE image and JPEG compression is performed, the section in which the display is blanked during processing can be shortened.

Next, a reproducing operation according to an embodiment of the present invention will be described with reference to a flowchart of FIG. In the first step S70, the switch SW2 of the memory controller 5 is set to the input terminal d. Next step S7
At 1, a display image is selected. The reproduced image is designated by reproducing the image in order from the temporally last photographed image, displaying the index image divided into six on the LCD 8, and designating the image desired to be reproduced among them. The selected image is read from the external storage medium 11 and
9 (step S72).

In the next step S73, the encoder / decoder 15 (or CPU 12) controls the DRAM 9
JPEG is decompressed for the data stored in. Then, the decompressed data is stored in the DRAM 9 (step S74).

In the next step S75, the image size is checked. If the image size is QCIF, the vertical line number conversion processing in step S76 is not performed, and the QCIF
For image sizes other than F (that is, XGA, VGA, CIF), the vertical line number conversion processing in step S76 is performed. This process is a simple thinning-out read for controlling the read address of the DRAM 9 as described above. In the vertical line number conversion, as shown in FIG.
For A and CIF, the number of lines is thinned to 1/3, 1/2, and 1/2, respectively.

Next, in step S77, the image size is checked. If the image size is other than XGA, that is, VG
For A, CIF, and QCIF, the horizontal pixel number conversion unit 54
Is performed to convert the number of pixels by interpolation calculation (step S7).
8). As shown in FIG. 2, the number of pixels is interpolated to 2: 3, 2: 3, and 1: 3 according to the image sizes of VGA, CIF, and QCIF, respectively. Then, the VGA, CIF, and QCI that have passed through step S78 (the processing of the horizontal pixel number conversion unit 54)
The F data or the XGA data not subjected to the horizontal pixel number conversion is transferred to the buffer memory 6 (step S7).
9). Data transfer is repeatedly performed at the same cycle of 30 frames / second as the EtoE operation of the CCD. Then, the reproduced image is displayed.

In the above-described reproducing operation, step S7
The period from the selection of the display image in 1 to the display of the reproduced image in step S79 is a display image update waiting section. In the reproduction operation, since the number of lines is converted by simple thinning-out reading, it is not necessary to perform conversion by software, and the update waiting time until a reproduced image is displayed can be shortened.

The embodiment of the present invention can solve the conventional problems as described below. First,
An image is taken, the number of pixels of the taken image is converted, and the
, The circuit scale and processing can be greatly reduced as compared with the conventional method. One of the reasons is that horizontal pixel number conversion is performed by an arithmetic circuit (filter circuit) and vertical line conversion is performed by software processing.

That is, comparing the horizontal pixel number converter shown in FIG. 13 with the vertical line converter shown in FIG. 14, the latter uses the delay element 25 for one line of the CCD 2 for the vertical inter-pixel operation conversion processing. The former is 3
Only the data latch (the delay element 20) for the pixel is required. The one-line delay element 25 requires three sets of FIFOs in this example, and the circuit scale is extremely large. The circuit scale can be reduced by performing the horizontal pixel number conversion unit having a small circuit scale by an arithmetic circuit and performing the vertical line number conversion unit having a large circuit scale by software once loaded into the DRAM 9. In addition to this, the processing time is increased only by 25% of the case where the processing is performed by software, and the problems resulting from the increase in the circuit scale (problems 1, 2 and 3 described above)
Thus, the problems of operability (problems 4 and 5 described above) caused by the increase in processing time by software can be solved.

Also, regarding the processing for converting the number of vertical lines by software, the processing by software may be 25% as compared with the conventional case. The reason will be described. As described with reference to FIG. 19, in the conventional software method, since 4 × 4 XGA pixels are used to calculate a target pixel, 16 multiplications and 16 additions are performed. Is required. In the method of the present invention, step S46 in FIG.
As shown in step S50 of FIG. 5, since the processing is performed by software after performing the horizontal pixel number conversion by the arithmetic circuit, the operation is performed from four pixels as shown in FIG. The amount of calculation is 1/4.

In FIG. 7, white circles indicate pixels of an image (XGA) photographed by the CCD 2, and triangles indicate VGA pixels to be obtained by conversion. To calculate the VGA pixel a by interpolation, four XGA pixels surrounded by a broken line are used. The vertical line conversion processing by software will be described with an example of thinning out 2/3 lines from XGA to VGA. In FIG. 8, Yn indicates a line before conversion, yno indicates an odd line after conversion, and yne indicates an even line after conversion.

The calculation of the even-numbered line yne is based on the coefficients a0, a0
Using a1, a2, a3, the calculation of the odd line yno is
The coefficients b0, b1, b2, b3 are used. The calculation is performed by switching the combination of these coefficients according to the line to be calculated. The coefficient depends on the spatial distance. Examples of the coefficients are: a0 = 3/16, a1 = 9/16, a2 = 3/16, a
3 = 1/16 b0 = 1/16, b1 = 3/16, b2 = 9/16, b
3 = 3/16 Then, the converted line (pixel data) is calculated by the following arithmetic expression. The value in parentheses indicates the line number.

Ne: For even-numbered lines y (ne) = a0.Y (ne.3 / 2) + a1.Y (ne.3 / 2 + 1) + a2.Y (ne
・ 3/2 + 2) + a3 ・ Y (ne ・ 3/2 + 3) no: For even lines y (no) = b0 ・ Y (1/2 (no ・ 3-1) + b1 ・ Y (1/2) (no ・ 3 + 1) ＋ b2
Y (1/2 (no.3 + 3) + b3.Y (1/2 (no.3 + 5)) The CPU 12 performs the above-described operation while reading necessary data from the image data stored in the DRAM 9. .

Furthermore, one embodiment of the present invention is a CIF
In the case of (2), since the thinned output of the CCD 2 is used in the EtoE mode operation, as shown in FIG.
The output of 2 has been thinned to 1/3. Therefore, in the CIF, the vertical line number conversion processing becomes unnecessary. QCI
Even in the case of F, since the reduction ratio of the vertical line number conversion processing by software is reduced to １ ／, the processing amount of software can be reduced. In the EtoE mode, the frame rate of the output of the CCD 2 is tripled as compared with the shooting mode, so that multi-screen continuous shooting of CIF and QCIF sizes can be easily realized.

Next, the processing at the time of reproduction according to the embodiment of the present invention will be described. The display image quality at the time of reproduction is limited by the resolution of the LCD 8, and the purpose of reproduction is not detailed image quality confirmation. Therefore, the same quality as the EtoE display at the time of shooting may be used. Therefore, a simple thinning-out method is sufficient for vertical line number conversion. In one embodiment of the present invention, the number of vertical lines is converted by simple thinning by slightly changing the configuration of the address generator 53. Therefore, the circuit of the vertical line number conversion unit using the line memory or the process of converting the number of horizontal and vertical pixels by the conventional software can be unnecessary. That is, it is possible to solve the problem of the increase in the circuit scale (the problems 1, 2 and 3 described above) and the problem of the increase in the processing time (the problems 4 and 5 described above).

The effects of the reduction of the circuit scale and the reduction of the software processing according to the embodiment of the present invention will be described more specifically on the assumption that only the luminance signal is handled. First,
The conventional pixel number conversion by the arithmetic circuit shown in FIG. 10 includes horizontal pixel number conversion units 51 and 54 and vertical line number conversion units 52.
When 55 is shared, circuit scale Memory 3 Byte (horizontal pixel number conversion unit) 1270 × 3 = 3810 Byte (vertical line number conversion unit) Multiplication circuit 4 + 4 = 8 (horizontal pixel number conversion unit, vertical line number conversion unit) Addition circuit 3 + 3 = 6 (horizontal pixel number converter, vertical line number converter) No software processing.

On the other hand, in one embodiment of the present invention, the circuit scale memory can be reduced by 3 Bytes (horizontal pixel number conversion unit) 3810 Bytes (vertical line number conversion unit), and multiplication circuit 4 (horizontal pixel number conversion unit) 4 (vertical pixel number conversion unit) Line number conversion part) can be reduced, and the addition circuit 3 (horizontal pixel number conversion part) 3 (vertical line number conversion part) can be reduced, and software processing is unnecessary at the time of reproduction. Multiplication 640 x 480 x 4 = 1,228,800 All methods by software 25% of the addition 640 x 480 x 4 = 1,228,800 All are 25% of the software method.

As described above, in one embodiment of the present invention,
Although additional software processing is required, a significant reduction in circuit size can be achieved with only 25%. A major advantage is that the software requires only 25% of the processing load, although half of the processing of the arithmetic circuit is shared by software.

In the embodiment of the present invention, the processing of “photographing capture” → “pixel number conversion” → “confirmation display” → “compression” is performed, but “photographing capture” → “confirmation display” → Processing may be performed in the order of “pixel number conversion” → “compression”. This method has the advantage that "Confirmation display" can be performed immediately after pressing the shutter.
There is a disadvantage that the time until the shutter becomes effective later becomes long. Note that the entire required time is the same.

The external storage medium 11 in the above embodiment
For example, various removable media, disk media such as a floppy disk and the like can be used. Not only storage media, but also network, RS232C, non-contact IrDA
The present invention is also effective when transmitting data to a communication path such as. Further, the present invention is characterized in that the conversion of the number of pixels is shared by an arithmetic circuit and software processing, and is effective not only in digital cameras but also in other fields.

[0078]

As described above, according to the present invention, the line memory of the arithmetic circuit can be reduced and the circuit scale can be reduced as compared with the conventional apparatus and method, so that the development period is shortened and the power consumption is reduced. Reduction and cost reduction can be achieved. Also, according to the present invention, an image having a size such as CIF or QCIF can be captured in the EtoE mode of the CCD as compared with the conventional apparatus and method, so that a high-speed continuous shooting function can be realized.

[Brief description of the drawings]

FIG. 1 is a block diagram of one embodiment of the present invention.

FIG. 2 is a schematic diagram illustrating a pixel number conversion process according to an embodiment of the present invention.

FIG. 3 is a schematic diagram illustrating a display image according to an embodiment of the present invention.

FIG. 4 is a flowchart illustrating a shooting / confirmation reproduction operation according to an embodiment of the present invention.

FIG. 5 is a flowchart illustrating a shooting / confirmation playback operation according to the embodiment of the present invention.

FIG. 6 is a flowchart illustrating a reproducing operation according to an embodiment of the present invention.

FIG. 7 is a schematic diagram illustrating vertical line number conversion by software according to an embodiment of the present invention.

FIG. 8 is a schematic diagram illustrating vertical line number conversion by software according to an embodiment of the present invention.

FIG. 9 is a block diagram showing an entire digital camera to which the present invention can be applied.

FIG. 10 is a block diagram showing a conventional configuration for converting the number of pixels by an arithmetic circuit.

FIG. 11 is a schematic diagram illustrating a conventional pixel number conversion process.

FIG. 12 is a schematic diagram illustrating an example of the number of pixels of a display image.

FIG. 13 is a block diagram illustrating an example of a horizontal pixel number conversion unit.

FIG. 14 is a block diagram illustrating an example of a vertical line number conversion unit.

FIG. 15 is a block diagram showing a conventional configuration for performing pixel number conversion by software processing.

FIG. 16 is a flowchart of a shooting / confirmation playback operation when the number of pixels is converted by software processing.

FIG. 17 is a flowchart of a shooting / confirmation / reproduction operation when the number of pixels is converted by software processing.

FIG. 18 is a flowchart of a reproducing operation when pixel number conversion is performed by software processing.

FIG. 19 is a schematic diagram illustrating horizontal / vertical pixel number conversion by a conventional method using software.

[Explanation of symbols]

2 ... CCD, 4 ... Camera signal processing unit, 5 ...
Memory controller, 8 ... LCD, 9 ... DRA
M, 11: external storage medium, 12: CPU, 13
... Operation input unit, 15 ... Encoder / decoder,
51, 54: horizontal pixel number conversion unit, 53: address generation unit, 52, 55: vertical line number conversion unit

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Katsuhiko Ueno, Inventor Katsuhiko Matsuno 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Inside Sony Corporation (72) Katsumi Matsuno Katsumi Matsuno Kozaka, Koda-cho, Nada-gun, Aichi Prefecture No. 1 Sony Koda Co., Ltd. F-term (reference) 2H054 AA01 5C022 AA13 AB00 AB12 AB19 AB22 AC03 AC32 AC42 AC52 AC54 AC69 AC80 5C053 FA05 FA08 FA23 FA27 GA14 GB11 GB21 GB27 GB36 GB37 GB40 JA01 KA01 KA03 KA08 KA11 LA24

Claims (6)

[Claims] 1. A pixel number conversion device for converting the number of pixels of an input image, comprising: a function of loading a first image having the same number of pixels as an image sensor into a memory means; A function of loading the second image into the memory means; when converting the first image to the number of pixels of the second image, the number of pixels on the first coordinate axis along the flow of the image signal from the image sensor The pixel number conversion device, wherein the conversion is performed by an arithmetic circuit, and the conversion of the number of pixels of the second coordinate axis orthogonal to the first coordinate axis is performed by software processing after the completion of loading into the memory means. 2. The image pickup device according to claim 1, wherein the image pickup device is capable of generating an output in which the number of pixels is thinned out. A pixel number conversion apparatus characterized in that an image is captured without converting the pixel number from the thinned output or by converting the pixel number. 3. The pixel number conversion device according to claim 1, further comprising the step of skipping a read address when reading an image signal from said memory means, thereby performing a pixel number conversion. 4. A digital camera device for recording a photographed image as a digital signal on a recording medium, an image pickup means for outputting a photographed image signal, a signal processing means for processing an image signal from the image pickup means, Encoding means for compressing and encoding the digital image signal from the signal processing means to generate encoded data; control means for controlling the operation of loading the encoded data into the memory means; and displaying the digital image signal. Display means, a storage medium for storing data stored in the memory means, a storage medium driving means, and an operation means including a shutter button; a first image having the same number of pixels as the imaging means; First
A second image having a number of pixels different from that of the first image is selectively loaded into the memory means, and when converting the first image into the number of pixels of the second image, a flow of an image signal from the imaging means is obtained. The first along
A digital camera device, wherein the conversion of the number of pixels of the coordinate axis is performed by an arithmetic circuit, and the conversion of the number of pixels of the second coordinate axis orthogonal to the first coordinate axis is performed by software processing after completion of loading into the memory means. . 5. The image pickup device according to claim 4, wherein the image pickup device is capable of generating an output in which the number of pixels is thinned out. A digital camera device which captures an image without converting the number of pixels or converting the number of pixels from a thinned output. 6. A reproducing operation according to claim 4, further comprising the steps of: reading an image signal from said memory means; and displaying said read image signal by said display means. A digital camera device for obtaining a reproduced image whose pixel number has been converted.