JP2000078211A - Information demodulator, information demodulating method and providing medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To demodulate an NRZ code series that is ASK-modulated to high quality. SOLUTION: An amplifier 52 amplifies both the DC component and the AC component of a signal detected by an ASK detector 34 and outputs them to an A/D converter 53. An extreme value detection section 55 detects a minimum value and the maximum value for pluralities of prescribed periods of a received input digital signal and provides an output of them to a moving mean section 56. The moving means section 56 averages respectively plural minimum values and maximum values for plural prescribed periods and provides an output of them to a mean section 57. The means section 57 further averages the minimum and maximum values received from the moving means section 56 and the respective moving mean values and provides an output of the result to a binary arithmetic section 58. The binary arithmetic section 58 uses a value received from the means section 57 for a threshold to apply binary processing to the digital signal received from the A/D converter 53 into 0 or 1 and outputs the result to a signal processing circuit 13 as an NRZ coding series.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to an information demodulation apparatus and method, and a providing medium, and more particularly to an ASK (Am
Plitude Shift Keying) Modulated NRZ (Non Return to Z
ero) An information demodulation apparatus and method for demodulating a code data sequence, and a providing medium.

[0002]

2. Description of the Related Art An IC card system for transmitting and receiving information without contact with an IC card has been developed for use in ticket gates, security systems, electronic money systems, and the like.

In this IC card system, a reader / writer for transmitting / receiving information to / from the IC card generates information to be transmitted to the IC card using the NRZ code, and generates the generated NR.
ASK modulation is performed on a carrier (for example, an electromagnetic wave) based on the Z code sequence, and the carrier is emitted to an IC card. Also, the reader / writer is
An ASK modulated wave radiated from an IC card is received and demodulated into an NRZ code sequence. The demodulated information is processed in a predetermined circuit.

[0004] On the other hand, an IC card is provided by a reader / writer.
An ASK-modulated electromagnetic wave is received, the modulated wave is demodulated into an NRZ code sequence, and the information is processed by a predetermined circuit. Then, the IC card generates an NRZ code sequence from the processing result, modulates the carrier with ASK, and radiates it to the reader / writer.

[0005] As described above, in the IC card and the reader / writer of the IC card system, information is generated using the NRZ code. By the way, the NRZ code has an advantage of using only the frequency spectrum components equal to or lower than the data transfer rate (the data occupied bandwidth is narrow) as compared with the contrasting Manchester code (the detailed description thereof is omitted). However, since the occurrence probabilities of the high level and the low level differ depending on the information to be encoded, a DC component exists.
Therefore, when demodulating the modulated wave obtained by ASK-modulating the NRZ code sequence, after detecting the ASK modulated wave including the DC component, the DC component is faithfully amplified, and the NRZ code sequence 0, 0 based on the appropriate threshold level. Or, it is necessary to determine 1. That is, if the threshold level is not appropriate, the bit error rate will increase.

Therefore, in a conventional IC card and reader / writer, after detecting a received ASK modulated wave, an average value of the level is calculated, and the average value is set as a threshold level, and 0 or 1 of the NRZ code sequence is used as a threshold level. Had been determined.

[0007]

However, the threshold level thus obtained is affected by the probability of occurrence of 1 and 0 in the NRZ code sequence, and the characteristics of the IC card system for transmitting and receiving information in a non-contact manner. In addition, since the reception level and data amplitude change greatly, ASK-modulated N
There was a problem that the RZ code sequence could not be demodulated with high quality.

The present invention has been made in view of such a situation, and it is an object of the present invention to enable high-quality demodulation of an ASK-modulated NRZ code sequence.

[0009]

According to a first aspect of the present invention, there is provided an information demodulating apparatus comprising: a detecting means for ASK detecting a modulated wave; an amplifying means for amplifying a signal detected by the detecting means; Extreme value detection means for detecting the maximum value and the minimum value of the signal, moving average means for moving average of the maximum value and the minimum value detected by the extreme value detection means, respectively, and the result of moving average by the moving average means. Averaging means, and a binarizing means for binarizing the signal amplified by the amplifying means based on the result averaged by the averaging means.

According to a third aspect of the present invention, there is provided an information demodulation method comprising: a detection step of ASK-modulating a modulated wave; an amplification step of amplifying a signal detected in the detection step; a local maximum value and a minimum value of the signal amplified in the amplification step. An extreme value detecting step of detecting a value, and a moving average step of moving-averaging the local maximum value and the local minimum value detected in the extreme value detecting step, respectively.
An averaging step of averaging the result of the moving average in the moving average step, and a binarizing step of binarizing the signal amplified in the amplification step based on the result averaged in the averaging step. I do.

According to a fourth aspect of the present invention, there is provided the medium for transmitting the modulated wave to the AS
The K-modulation detection step, the amplification step of amplifying the signal detected in the detection step, the extreme value detection step of detecting the maximum value and the minimum value of the signal amplified in the amplification step, and the extreme value detection step A moving average step for moving and averaging the maximum value and the minimum value, an averaging step for averaging the result of the moving average in the moving average step, and a signal amplified in the amplification step based on the result averaged in the averaging step And a computer-readable program that causes the information demodulation device to execute a process including a binarization step of binarizing the data.

According to a fifth aspect of the present invention, there is provided an information demodulating apparatus comprising: a detecting means for ASK-modulating a modulated wave; an amplifying means for amplifying a signal detected by the detecting means; a maximum value and a minimum value of the signal amplified by the amplifying means. Extreme value detecting means for detecting the peak value, averaging means for averaging the maximum value and the minimum value detected by the extreme value detecting means, and binarizing the signal amplified by the amplifying means based on the result averaged by the averaging means. And a binarizing unit that performs

In the information demodulation method according to the present invention, a detection step for ASK detection of the modulated wave, an amplification step for amplifying the signal detected in the detection step, a local maximum value and a local minimum value of the signal amplified in the amplification step. An extreme value detecting step for detecting a value, an averaging step for averaging the local maximum value and the local minimum value detected in the extreme value detecting step, and a binary signal based on a result averaged in the averaging step. And a binarizing step.

According to a ninth aspect of the present invention, there is provided the providing medium, wherein the modulated wave has an AS
The detection step for K detection, the amplification step for amplifying the signal detected in the detection step, the extreme value detection step for detecting the maximum value and the minimum value of the signal amplified in the amplification step, and the extreme value detection step An averaging step for averaging the local maximum value and the local minimum value, and a signal amplified in the amplification step based on the result averaged in the averaging step, is divided by two.
A computer-readable program for causing an information demodulation device to execute a process including a binarizing step of converting into a value is provided.

The information demodulating device according to the present invention uses a detecting means for ASK detection of a modulated wave, an amplifying means for amplifying a signal detected by the detecting means, and a DC component of the signal detected by the detecting means. It is characterized by comprising determining means for determining a threshold level, and binarizing means for binarizing the AC component amplified by the amplifying means based on the threshold level determined by the determining means.

According to a twelfth aspect of the present invention, there is provided an information demodulation method using a detection step of ASK detection of a modulated wave, an amplification step of amplifying a signal detected in the detection step, and a DC component of the signal detected in the detection step. It is characterized by including a determining step of determining a threshold level, and a binarizing step of binarizing the AC component amplified in the amplifying step based on the threshold level determined in the determining step.

The providing medium according to the thirteenth aspect provides a modulated wave.
ASK detection step, an amplification step of amplifying the signal detected in the detection step, a determination step of determining a threshold level using a DC component of the signal detected in the detection step, and a threshold level determined in the determination step. A computer-readable program that causes the information demodulation device to execute a process including a binarization step of binarizing the AC component amplified in the amplification step based on the amplification step.

According to another aspect of the present invention, there is provided an information demodulating apparatus, comprising: detecting means for detecting opposite polar components of a modulated wave; amplifying means for amplifying an AC component of a signal of the opposite polar component detected by the detecting means; Reproducing means for reproducing a DC component of the signal amplified by the means, oscillating means for oscillating a waveform signal having a predetermined duty ratio, and switching between signals reproduced by the reproducing means in synchronization with the waveform signal oscillated by the oscillating means. (1) switching means, binarization means for binarizing a signal switched by the switching means, output means for outputting signals of opposite polarity components of the signal output by the binarization means, and output means for outputting A second switching unit that switches the signals of the opposite polar components in synchronization with the waveform signal oscillated by the oscillating unit.

According to a fifteenth aspect of the present invention, there is provided an information demodulation method comprising: a detecting step of detecting opposite polar components of a modulated wave; an amplifying step of amplifying an AC component of a signal of the opposite polar component detected in the detecting step; A reproduction step of reproducing a DC component of the signal amplified in the amplification step, an oscillation step of oscillating a waveform signal having a predetermined duty ratio,
A first switching step of switching the signal reproduced in the reproduction step in synchronization with the waveform signal oscillated in the oscillation step, and a binarization of the signal switched in the switching step.
Synchronizing the opposite polarity component signal output in the output step with an output step of outputting opposite polarity component signals of the signal output in the binarization step with the waveform signal oscillated in the oscillation step And a second switching step of performing switching.

A providing medium according to a sixteenth aspect of the present invention includes a detecting step of detecting opposite polar components of a modulated wave, an amplifying step of amplifying an AC component of a signal of the opposite polar component detected in the detecting step, and an amplifying step. A reproduction step of reproducing a DC component of the signal amplified in the step, an oscillation step of oscillating a waveform signal having a predetermined duty ratio, and a signal reproduced in the reproduction step in synchronization with the waveform signal oscillated in the oscillation step. A first switching step for switching, a binarization step for binarizing the signal switched in the switching step, an output step for outputting signals of opposite polarity components of the signal output in the binarization step, and an output step And a second switching step of switching the signals of the opposite polarity components output in step S in synchronization with the waveform signal oscillated in the oscillation step. Wherein the computer to execute the information demodulation device provides a readable program.

An information demodulation device according to claim 1,
In the information demodulation method according to the above, and the providing medium according to the fourth aspect, the modulated wave is detected and amplified, the maximum value and the minimum value of the amplified signal are detected, and the detected maximum value and the minimum value are detected. The values are respectively moving averaged. Further, the moving averaged result is averaged, and the amplified signal is binarized based on the averaged result.

An information demodulation device according to claim 5, and an information demodulation device according to claim 8.
In the information demodulation method according to the above, and the providing medium according to the ninth aspect, the modulated wave is detected and amplified, the maximum value and the minimum value of the amplified signal are detected, and the detected maximum value and the minimum value are detected. The values are averaged. Further, the amplified AC component is binarized based on the averaged result.

In the information demodulating device according to the tenth aspect, the information demodulating method according to the twelfth aspect, and the providing medium according to the thirteenth aspect, a modulated wave is detected, and a DC component of the detected signal is used. The threshold level is determined. Further, the amplified AC component is binarized based on the determined threshold level.

In the information demodulating device according to the fourteenth aspect, the information demodulating method according to the fifteenth aspect, and the providing medium according to the sixteenth aspect, opposite polar components of the modulated wave are detected, and the detected reciprocity is detected. The AC component of the polarity component signal is amplified, and the DC component of the amplified signal is reproduced. Further, a waveform signal having a predetermined duty ratio is oscillated,
The reproduced signal is switched in synchronization with the oscillated waveform signal, the switched signal is binarized, and a signal of an opposite polarity component of the binarized signal is output. The polarity component signal is switched in synchronization with the oscillated waveform signal.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below. In order to clarify the correspondence between each means of the invention described in the claims and the following embodiments, each means is described. When the features of the present invention are described by adding the corresponding embodiment (however, an example) in parentheses after the parentheses, the result is as follows. However, of course, this description does not mean that each means is limited to those described.

The information demodulating device according to the first aspect is a detecting means for ASK detection of a modulated wave (for example, the ASK detector 3 shown in FIG. 3).
4), amplifying means for amplifying the signal detected by the detecting means (for example, the amplifier 52 in FIG. 3), and an extreme value detecting means for detecting the maximum value and the minimum value of the signal amplified by the amplifying means (for example, An extreme value detecting unit 55 in FIG. 3), a moving average unit for moving and averaging the maximum value and the minimum value detected by the extreme value detecting unit (for example, a moving average unit 56 in FIG. 3), and a moving average unit An averaging means for averaging the averaged result (for example, the averaging unit 57 in FIG. 3), and a binarizing means for binarizing the signal amplified by the amplifying means based on the result averaged by the averaging means (for example, , And a binarization calculation unit 58) of FIG.

The information demodulating device according to claim 5 is a detecting means for ASK-modulating a modulated wave (for example, the ASK detector 3 in FIG. 6).
4), amplifying means for amplifying the signal detected by the detecting means (for example, the AC amplifier 92 in FIG. 6), and extreme value detecting means for detecting the maximum value and the minimum value of the signal amplified by the amplifying means (for example, An extreme value detecting section 96 in FIG. 6), an averaging means for averaging the maximum value and the minimum value detected by the extreme value detecting means (for example, the averaging section 97 in FIG. 6), and a result averaged by the averaging means And a binarizing unit (for example, a binarizing operation unit 98 in FIG. 6) for binarizing the signal amplified by the amplifying unit.

[0028] The information demodulating device according to claim 6 further comprises pattern detecting means (for example, a specific pattern detecting unit 124 in FIG. 9) for detecting a predetermined code pattern included in the signal amplified by the amplifying means, The extreme value detecting means detects the maximum value and the minimum value in synchronization with the timing at which the pattern detecting means detects a predetermined code pattern.

The information demodulating device according to the tenth aspect includes a detecting means for ASK detection of the modulated wave (for example, the ASK detector 34 in FIG. 12) and an amplifying means for amplifying the signal detected by the detecting means (for example, An AC amplifier 152 in FIG. 12) and a determination unit (for example, the integration unit 15 in FIG. 12) that determines a threshold level using a DC component of a signal detected by the detection unit.
7) binarizing the AC component amplified by the amplifying means based on the threshold level determined by the determining means.
And a binarizing unit (for example, a binarizing operation unit 158 in FIG. 12).

The information demodulating device according to claim 14 is a detecting means for detecting opposite polar components of the modulated wave (for example, the ASK detector 34 in FIG. 16), and a signal of the opposite polar component detected by the detecting means. Amplifying means for amplifying the AC component (for example, AC amplifier 192 in FIG. 16) and reproducing means for reproducing the DC component of the signal amplified by the amplifying means (for example, FIG.
A DC component regenerator 194), an oscillating means (for example, the oscillator 202 in FIG. 16) for oscillating a waveform signal having a predetermined duty ratio, and a signal reproduced by the regenerating means in synchronization with the waveform signal oscillated by the oscillating means (For example, a switch 197 in FIG. 16) and a binarizing means for binarizing a signal switched by the switching means (for example, FIG. 16).
And output means (for example, a signal 134) that outputs signals of opposite polarity components of the signal output by the binarization means.
16 and a second switching unit (for example, FIG. 1) that switches the signals of opposite polarity components output by the output unit in synchronization with the waveform signal oscillated by the oscillation unit.
6 switches 204).

The configuration of a contactless IC card system to which the present invention is applied will be described with reference to FIG. In this specification, the term “system” refers to an entire device including a plurality of devices and units.

This contactless IC card system comprises an IC card 1 and a reader / writer 2. The IC card 1 has a flat plate shape such as a credit card, for example, and has a loop coil 11, a modulation / demodulation circuit 12, and a signal processing circuit 13 arranged on a predetermined substrate or film.
It is composed of The loop coil 11 receives a carrier wave (ASK modulation wave) emitted from the reader / writer 2, converts the carrier wave into an electric signal, and outputs the electric signal to the modulation / demodulation circuit 12.

The modulation / demodulation circuit 12 demodulates the ASK modulated wave from the reader / writer 2 into an NRZ code and outputs the NRZ code to the signal processing circuit 13. The modulation and demodulation circuit 12
A carrier (electromagnetic wave) is converted to A based on a signal (NRZ code) transmitted to the reader / writer 2 input from the signal processing circuit 13.
SK modulation, reader / writer 2 via loop coil 11
Send to The signal processing circuit 13 performs predetermined processing based on the NRZ code input from the modulation / demodulation circuit 12, generates a signal to be transmitted to the reader / writer 2 using the NRZ code, and outputs the signal to the modulation / demodulation circuit 12. Has been made.

The loop antenna 21 of the reader / writer 2 which transmits and receives the ASK modulated wave to and from the IC card 1 receives the carrier (ASK modulated wave) radiated from the IC card 1 and converts it into an electric signal. The output has been made.

The modulation / demodulation circuit 22 receives the ASK from the IC card 1
The modulated wave is demodulated to an NRZ code and converted to SPU (Signal Processing Uniform).
t) 23. The modulation / demodulation circuit 22 performs ASK modulation on a carrier (electromagnetic wave) based on a signal (NRZ code) transmitted from the SPU 23 and transmitted to the IC card 1, and transmits the result to the IC card 1 via the loop antenna 21. The SPU 23 performs predetermined processing based on the NRZ code input from the modulation / demodulation circuit 22, generates a signal to be transmitted to the reader / writer 2 using the NRZ code, and outputs the signal to the modulation / demodulation circuit 22. I have. Display unit 24
Is configured to display predetermined information based on control by the SPU 23. The input unit 25 is configured to receive an instruction from the user to the reader / writer 2. The storage unit 26 stores information input from the SPU 26.

FIG. 2 shows a detailed configuration of the modulation / demodulation circuit 12 and the modulation / demodulation circuit 22 of FIG. Modulation / demodulation circuit 1
The second rectifier circuit 31 rectifies an electric signal (corresponding to an ASK modulated wave from the reader / writer 2) input from the loop coil 11 and supplies the rectified electric signal to the power generation circuit 32. The rectifying circuit 31 includes a signal processing circuit 13.
A variable resistor 33 that changes its value in accordance with the NRZ code sequence input from is connected, and an electromagnetic wave (ASK modulated wave) corresponding to a change in current from the variable resistor 33 is passed through the loop coil 11. Output to reader / writer 2. The power generation circuit 32 suppresses and stabilizes the voltage fluctuation of the electric signal supplied from the rectification circuit 31, and then supplies the electric signal to each part of the IC card 1 as DC power.

The ASK detector 34 detects an electric signal (corresponding to an ASK modulated wave from the reader / writer 2) inputted from the loop coil 11 and supplies it to the NRZ demodulator 35. The NRZ demodulator 35 demodulates an NRZ code sequence from the signal output from the ASK detector 34 and outputs the NRZ code sequence to the signal processing circuit 13.

The modulation / demodulation circuit 22 ASK modulates a carrier (electromagnetic wave) corresponding to the NRZ code sequence input from the SPU 23 and transmits the result to the IC card 1 via the loop antenna 21. The ASK detector 42 detects an electric signal (ASK from the IC card 1) input from the loop antenna 21.
(Corresponding to a modulated wave), and supplies the detected wave to the NRZ demodulator 43. The NRZ demodulator 43 is an ASK detector 4
The NRZ code sequence is demodulated from the signal from the SPU 2 and output to the SPU 23.

FIG. 3 shows a first configuration example of the NRZ demodulator 35. The ASK detector 34 detects an ASK modulated wave and outputs it to the amplifier 52 by a method such as synchronous detection or half-wave rectification. Amplifier 52
Amplifies both the DC component and the AC component of the signal input from the ASK detector 34 and outputs the amplified signal to the A / D converter 53. A
The / D converter 53 converts a signal (analog signal) input from the amplifier 52 into a digital signal and converts the signal into a DSP (Digital Sign) signal.
al Processor) 54 to an extreme value (peak value) detection unit 55 and a binarization calculation unit 58.

The extremum detection unit 55 detects the minimum value and the maximum value of the input digital signal in a plurality of predetermined periods and outputs the detected values to the moving average unit 56. The moving average unit 56 averages a plurality of local minimum values and local maximum values in a plurality of predetermined periods, and outputs the averaged value to the averaging unit 57. The averaging unit 57 is
The minimum value and the maximum value input from the moving average unit 56 and the moving average value of each are averaged and output to the binarization calculation unit 58. The binarization calculation unit 58 uses the value input from the averaging unit 57 as a threshold level,
The digital signal input from the A / D converter 53 is binarized to 0 or 1 and converted into a NRZ code sequence by the signal processing circuit 13.
Output.

Next, the operation will be described with reference to the flowchart of FIG. When the ASK modulated wave transmitted from the reader / writer 2 is received by the loop coil 11 and input to the ASK detector 34, in step S1, the ASK detector 34 performs a method such as synchronous detection or half-wave rectification. As a result, the ASK modulated wave is detected and output to the amplifier 52.

In step S2, the amplifier 52 outputs the AS
Both the DC component and the AC component of the signal input from the K detector 34 are amplified and output to the A / D converter 53. The A / D converter 53 converts the signal (analog signal) input from the amplifier 52 into a digital signal, and converts the signal into an extreme value detector 5 of the DSP 54.
It is supplied to the quintuple and binarization operation unit 58.

In step S3, the extreme value detecting section 55 of the DSP 54 detects the minimum value and the maximum value of the input digital signal in a plurality of predetermined periods and outputs the detected values to the moving average section 56. In step S4, the moving average unit 56
A plurality of minimum values and maximum values in a plurality of predetermined periods are respectively averaged and output to the averaging section 57. In step S5, the averaging unit 57 further averages the minimum and maximum values and the respective moving averages input from the moving average unit 56 and outputs the average to the binarization calculation unit 58.

In step S6, the binarization operation section 58
Converts the value input from the averaging unit 57 into a threshold level, binarizes the digital signal input from the A / D converter 53, and outputs it as an NRZ code sequence. That is, A
When the value of the digital signal input from the / D converter 53 is larger than the threshold level, 1 is output, and when the value is smaller than the threshold level, 0 is output.

The NRZ code sequence output from the binarization operation section 58 is supplied to the signal processing circuit 13 and subjected to predetermined processing.

FIG. 5 shows a second configuration example of the NRZ demodulation unit 35. The ASK detector 34 detects an ASK modulated wave and outputs it to the amplifier 61 by a method such as synchronous detection or half-wave rectification. Amplifier 61
Is designed to amplify the DC and AC components of the signal input from the ASK detector 34 and output the amplified signal to the threshold determination circuit 62 and the comparator 88.

In the threshold determination circuit 62, the signal obtained by amplifying the DC component and the AC component from the amplifier 61 is supplied to a high-pass filter 63 including a capacitor 64 and a resistor 65 and a low-pass filter 66 including a resistor 67 and a capacitor 68. Is done. High pass filter 6
3 extracts an AC component from the input signal, and outputs a maximum value hold circuit 69 including a diode 70, a resistor 71, a capacitor 72, and a buffer amplifier 73, and a diode 75, a resistor 76, a capacitor 77, and a buffer amplifier 78. To the minimum value hold circuit 74 composed of The low-pass filter 66 extracts a DC component from the input signal, and outputs the DC component to an addition circuit 79.

The maximum value hold circuit 69 detects the maximum value of the AC component input from the high-pass filter 63 and outputs it to the addition circuit 79. The minimum value holding circuit 74 detects the minimum value of the AC component input from the high-pass filter 63 and outputs the minimum value to the addition circuit 79.

An addition circuit 79 having a resistor 83 and an operational amplifier 84 is connected to a maximum value hold circuit 69 via the resistor 81.
And minimum value hold circuit 74 input from
Is added to the minimum value, and a resistor 80 is added to the added value.
, The level of the DC component input from the low-pass filter 66 is added and output. This value is equivalent to the resistance of 85,8
6 and an amplifier circuit comprising an operational amplifier 87.

The comparator 88 has a threshold determination circuit 6
The input from the amplifier 2 is set as a threshold level and the amplifier 61
Is binarized and output.

Next, the operation will be described with reference to the flowchart of FIG. When the ASK modulated wave transmitted from the reader / writer 2 is received by the loop coil 11 and input to the ASK detector 34, in step S1, the ASK detector 34 performs a method such as synchronous detection or half-wave rectification. As a result, the ASK modulated wave is detected and output to the amplifier 61.

In step S2, the amplifier 61
The DC component and the AC component of the signal input from the K detector 34 are amplified and output to the threshold determination circuit 62 and the comparator 88. In the threshold determination circuit 62, the signal obtained by amplifying the DC component and the AC component from the amplifier 61 is supplied to a high-pass filter 63 and a low-pass filter 66.

The high-pass filter 63 extracts an AC component from the input signal and outputs the AC component to the maximum value hold circuit 69 and the minimum value hold circuit 74. The low-pass filter 66 extracts a DC component from the input signal, and outputs the level to the addition circuit 79.

In steps S3 and S4, the maximum value hold circuit 69 detects the maximum value of the AC component input from the high-pass filter 63 and outputs it to the addition circuit 79. The minimum value holding circuit 74 includes the high-pass filter 63
The minimum value of the AC component input from is detected and output to the addition circuit 79.

In step S5, the addition circuit 79 averages the maximum value input from the maximum value hold circuit 69 and the minimum value input from the minimum value hold circuit 74 (more precisely, twice the average value). Is calculated), the level of the DC component input from the low-pass filter 66 is added to the average value, and the result is output. This value is equal to the resistance 85,
The signal is output to a comparator 88 via an amplifier circuit comprising an operational amplifier 86 and an operational amplifier 87.

In step S6, the comparator 88 binarizes the signal from the amplifier 61 with the input from the threshold decision circuit 62 as the threshold level, and outputs it as an NRZ code sequence. That is, when the level of the signal input from the amplifier 61 is higher than the threshold level, 1 is output, and when it is lower than the threshold level, 0 is output.

The NRZ code sequence output from the comparing section 88 is supplied to the signal processing circuit 13 and subjected to predetermined processing.

As described above, if the NRZ demodulator 35 is realized by the first configuration example shown in FIG. 3 or the second configuration example shown in FIG. When the level of the DC component is large relative to the amplitude of the data, the dynamic range and DC drift of the amplifier may cause a problem. However, since the amplifier 61 includes the DC component and amplifies the data, the fidelity of the data is high. Is expensive. Therefore,
Demodulation with a low bit error rate becomes possible.

FIG. 6 shows a third example of the configuration of the NRZ demodulation unit 35. The ASK detector 34 detects an ASK modulated wave and outputs it to the AC amplifier 92 by a method such as synchronous detection or half-wave rectification. The AC amplifier 92 amplifies only the AC component of the signal input from the ASK detector 34 and outputs the amplified signal to the A / D converter 93. The A / D converter 93 converts an AC component signal (analog signal) input from the AC amplifier 92 into a digital signal,
Are supplied to a data extraction unit 95 and a binarization operation unit 98.

The data extraction unit 95 extracts a signal input from the A / D converter 93 within a predetermined period (time window),
The data is output to an extreme value detection unit 96. The extremum detection unit 96 detects the minimal value and the maximal value of the input digital signal and outputs the detected value to the averaging unit 97. The averaging unit 97 averages the minimum value and the maximum value input from the extreme value detection unit 96 and outputs the average to the binarization calculation unit 98. 2
The value-calculating section 98 sets the value input from the averaging section 97 as a threshold level, binarizes the digital signal input from the A / D converter 93 into 0 or 1, and converts the digital signal into an NRZ code sequence. Output.

Next, the operation will be described with reference to the flowchart in FIG. When the ASK modulated wave transmitted from the reader / writer 2 is received by the loop coil 11 and input to the ASK detector 34, in step S11, the ASK
The detector 34 detects the ASK modulated wave by a method such as synchronous detection or half-wave rectification, and outputs the ASK modulated wave to the AC amplifier 92.

In step S12, the AC amplifier 92
Amplifies only the AC component of the signal input from the ASK detector 34 and outputs the amplified signal to the A / D converter 93. A / D converter 93
Converts the AC component signal (analog signal) input from the AC amplifier 92 into a digital signal and supplies the digital signal to the data extraction unit 95 and the binarization operation unit 98 of the DSP 94.

In step S13, the data extraction unit 9
5 extracts a signal input from the A / D converter 93 within a predetermined period (time window) and outputs the signal to the extreme value detection unit 96. The extremum detection unit 96 detects the minimal value and the maximal value of the input digital signal and outputs the detected value to the averaging unit 97. The averaging unit 97 is
In step S14, the minimum value and the maximum value input from the extreme value detection unit 96 are averaged and output to the binarization calculation unit 98.

In step S15, the binarizing operation section 9
Reference numeral 8 designates the value input from the averaging unit 97 as a threshold level, binarizes the digital signal input from the A / D converter 93 to 0 or 1, and outputs the binary signal to the signal processing circuit 13 as an NRZ code sequence.

FIG. 8 shows a fourth configuration example of the NRZ demodulation unit 35. The ASK detector 34 detects an ASK modulated wave and outputs it to the AC amplifier 102 by a method such as synchronous detection or half-wave rectification. The AC amplifier 102 amplifies only the AC component of the signal input from the ASK detector 34, and a resistor 104, a maximum value hold circuit 1
05, a threshold value determination circuit 103 composed of a minimum value hold circuit 110 and an average value calculation circuit 115, and a comparator 118.

In the threshold decision circuit 103,
A signal obtained by amplifying only the AC component input from the AC amplifier 102 is a maximum value hold circuit 105 including a diode 106, a resistor 107, a capacitor 108, and an operational amplifier 109, a diode 111, and a resistor 11
2, a minimum value holding circuit 110 including a capacitor 113 and an operational amplifier 114.

The maximum value holding circuit 105 detects the maximum value of the AC component input from the AC amplifier 102 and outputs the maximum value to the average value calculation circuit 115. The minimum value hold circuit 110 detects the minimum value of the AC component input from the AC amplifier 102 and outputs the detected minimum value to the average value calculation circuit 115 including the resistors 116 and 117.

The average value calculation circuit 115 averages the maximum value input from the maximum value hold circuit 105 and the minimum value input from the minimum value hold circuit 110, and outputs the average value to the comparator 118 as a threshold level. It has been made to be.

The comparator 118 binarizes the signal from the AC amplifier 102 using the threshold level input from the threshold determination circuit 103 and outputs the binarized signal.

Next, the operation will be described with reference to the flowchart of FIG. When the ASK modulated wave transmitted from the reader / writer 2 is received by the loop coil 11 and input to the ASK detector 34, in step S11, the ASK
The detector 34 detects the ASK modulated wave and outputs it to the AC amplifier 102 by a method such as synchronous detection or half-wave rectification.

In step S12, the AC amplifier 10
2 amplifies only the AC component of the signal input from the ASK detector 34 and outputs the amplified signal to the threshold determination circuit 103 and the comparator 118. Threshold decision circuit 103
, The signal obtained by amplifying only the AC component input from the AC amplifier 102 is output to the maximum value hold circuit 105 and the minimum value hold circuit 110.

In step S13, the maximum value hold circuit 105 and the minimum value hold circuit 110 detect the maximum value or the minimum value of the AC component input from the AC amplifier 102 and output the detected value to the average value calculation circuit 115. .

In step S14, average value calculation circuit 115 averages the maximum value input from maximum value hold circuit 105 and the minimum value input from minimum value hold circuit 110, and compares the average value as a threshold level. Output to the container 118.

In step S15, the comparator 118
Uses the threshold level input from the threshold decision circuit 103 to binarize the signal from the AC amplifier 102 and outputs it to the signal processing circuit 13 as an NRZ code sequence.

FIG. 9 shows a fifth example of the configuration of the NRZ demodulation unit 35. This configuration example can be applied when the ASK-modulated NRZ code data sequence starts with a start bit and ends with a stop bit, for example, in asynchronous communication. The ASK detector 34 detects an ASK modulated wave and outputs it to the AC amplifier 122 by a method such as synchronous detection or half-wave rectification. The AC amplifier 122 amplifies only the AC component of the signal input from the ASK detector 34, and
3 and a comparator 129.

The signal input to the threshold determination circuit 123 is supplied to a specific pattern detection section 124 and sample and hold circuits (S / H) 125 and 126.

The specific pattern detection section 124 calculates a cross-correlation value between the signal input from the AC amplifier 122 and a preset start bit and stop bit pattern, and when the cross-correlation value is equal to or larger than a predetermined value. By determining whether or not there is, input of a start bit or a stop bit is detected. Then, the specific pattern detection unit 124 synchronizes the predetermined signal with the corresponding S / H1 in synchronization with the timing of detecting the start bit or the stop bit.
25 and 126. S / H12
Reference numeral 5 is such that the signal from the AC amplifier 122 is sampled and output to the averaging unit 127 in synchronization with the timing at which the specific pattern detection unit 124 detects the start bit. S / H 126 is a specific pattern detection unit 1
In synchronization with the timing at which the stop bit is detected at 24, the signal from the AC amplifier 122 is sampled and output to the averaging unit 127.

That is, for example, the start bit pattern is a pattern in which one of 0 and 1 which is an NRZ code is continuous for a predetermined number of bits, and the stop bit pattern is a pattern of 0 and 1 which is an NRZ code. If 0 is a continuous pattern of a predetermined number of bits, the S / H 125 or S / H 1 is synchronized with the timing at which the start bit or the stop bit is detected by the specific pattern detection unit 124.
If the signal from the AC amplifier 122 is sampled by 26, the S / H 125 holds the level of the signal corresponding to 1 of the NRZ code, and the S / H 126 holds the level of the signal corresponding to 0 of the NRZ code. become.

The averaging section 127 is composed of S / H125 and S / H12
The average of the level of the signal input from the control unit 6 is output to the moving average unit 128. Moving average unit 12
Reference numeral 8 denotes a moving average of the average value input from the averaging unit 127 and outputs the moving average to the comparator 129. In this way, by moving averaged the average value input from the averaging unit 127 in the moving average unit 128, even if the sampling level goes wrong due to external noise or the like, the degree of the influence can be suppressed. The comparator 129 binarizes the signal input from the AC amplifier 122 into 0 or 1 using the value input from the moving average unit 128 as a threshold level, and converts the signal into an NRZ code sequence.
3 is output.

Next, the operation will be described with reference to the flowchart of FIG. It starts with a start bit (a pattern in which one of NRZ codes 0 and 1 is continuous for a predetermined number of bits) transmitted from the reader / writer 2 and a stop bit (0 of NRZ code 0 and 1 is a predetermined bit). When the ASK modulated wave of the NRZ code ending with the pattern in which the number of bits continues is received by the loop coil 11 and input to the ASK detector 34, in step S11, the ASK detector 34
Detects an ASK modulated wave and outputs it to the AC amplifier 122 by a method such as synchronous detection or half-wave rectification.

The AC amplifier 122 amplifies only the AC component of the signal input from the ASK detector 34 and supplies the amplified signal to the threshold decision circuit 123 and the comparator 129.
The signal input to the threshold determination circuit 123 is supplied to a specific pattern detection unit 124 and S / Hs 125 and 126.

In step S13, specific pattern detection section 124 calculates a cross-correlation value between the signal input from AC amplifier 122 and a preset start bit pattern, and the cross-correlation value is equal to or greater than a predetermined value. By determining whether or not the input is the start bit, the input of the start bit is detected. Then, the specific pattern detection unit 124 outputs a predetermined signal to the corresponding S / H 125 in synchronization with the timing at which the start bit is detected. The S / H 125 samples the signal from the AC amplifier 122 in synchronization with the timing at which the start bit is detected by the specific pattern detection unit 124, that is, detects the maximum value, and
Output to

Thereafter, specific pattern detecting section 124 calculates a cross-correlation value between the signal input from AC amplifier 122 and a preset stop bit pattern, and the cross-correlation value is equal to or greater than a predetermined value. By determining whether or not the input is the stop bit, the input of the stop bit is detected. And
The specific pattern detection unit 124 synchronizes a predetermined signal with the S / H 12 corresponding to the timing when the stop bit is detected.
6 is output. The S / H 126 is the specific pattern detection unit 12
In synchronization with the timing when the stop bit is detected in step 4, the signal from the AC amplifier 122 is sampled, that is, the minimum value is detected and output to the averaging unit 127.

In step S14, the averaging unit 127
Averages the levels of the signals input from the S / H 125 and the S / H 126 and outputs the result to the moving average unit 128. Moving average section 128 performs a moving average on the average value input from averaging section 127 and outputs the result to comparator 129. Comparator 129
Converts the value input from the moving average unit 128 into a threshold level, binarizes the signal input from the AC amplifier 122 into 0 or 1, and outputs the signal to the signal processing circuit 13 as an NRZ code sequence.

FIG. 10 shows a sixth example of the configuration of the NRZ demodulation unit 35. This configuration example can be applied when the ASK-modulated NRZ code data sequence starts with a start bit and ends with a stop bit, for example, in asynchronous communication. This configuration example is mainly divided into a phase locked loop 138 that detects a start bit and a stop bit, and a data demodulation unit 133 that binarizes data.

The ASK detector 34 detects an ASK modulated wave and outputs it to the AC amplifier 132 by a method such as synchronous detection or half-wave rectification. The AC amplifier 132 amplifies only the AC component of the signal input from the ASK detector 34, and amplifies the coupling capacitor 134 and the resistor 1
35, a field effect transistor (FET) 136, and a data demodulation unit 133 including a comparator 137.

The voltage controlled oscillator 139 of the phase locked loop 138 oscillates a clock having a frequency equal to the bit rate of the ASK modulated wave based on a control signal (described later) and outputs the clock to the asynchronous pattern generator 140. I have. The asynchronous pattern generator 140 generates an asynchronous pattern of a code including a preset start bit and stop bit in synchronization with the input clock.
41. The register 141 is a shift register paired with the register 142, and is provided with the asynchronous pattern generator 1
The code (start bit and stop bit) input from the control unit 40 is stored, and the stored code is synchronized with the timing at which the next code is input.
3 and a register 142. The register 142 stores the code input from the register 141, and outputs the stored code to the cross-correlation calculator 144 in synchronization with the timing at which the next code is input. That is, a code shifted by one bit from the code input to the cross-correlation amount calculator 142 is input to the cross-correlation amount calculator 143.

The cross-correlation amount calculators 142 and 143 are supplied from the AC amplifier 132 via the data demodulation unit 133, for example, as shown in FIG. The calculated amount of correlation with the asynchronous pattern code as shown in FIG. 11B, for example, is calculated and input to the differentiator 147 via the corresponding LPFs 145 and 146. Differentiator 147
Calculates the difference between the correlation amounts calculated by the cross-correlation amount calculators 142 and 143. The output from the differentiator 147 is proportional to the phase difference between the data system and the asynchronous pattern code input from the AC amplifier 132 via the data demodulation unit 133, for example, as shown in FIG. Therefore, if this output is supplied to the voltage-controlled oscillator 139 as a control signal, the asynchronous pattern generated by the asynchronous pattern generator 140 in synchronization with the clock oscillated by the voltage-controlled oscillator 139 is output from the data demodulation unit 133. It will be drawn into the phase of the data series.

The start bit and the stop bit generated by the asynchronous pattern generator 140 and drawn into the phase of the data series from the data demodulator 133 are output from the asynchronous pattern generator 140 to the FET controller 148. It has been done. The FET controller 148 turns on the FET 136 of the data demodulation unit 133 in synchronization with the timing when the start bit or the stop bit is input.
Or turn it off. By the switching of the FET 136, the coupling capacitor 134 is charged with the average value of the maximum value and the minimum value of the AC component from the AC amplifier 132, and the DC component of the input signal to the comparator 137 corresponds to the average value. Value.

Therefore, the comparator 137 binarizes the signal input via the coupling capacitor 132 into 0 or 1 based on a predetermined threshold level, and outputs the binary signal as an NRZ code series. I have.

Next, the operation will be described with reference to the flowchart of FIG. It starts with a start bit (a pattern in which one of NRZ codes 0 and 1 is continuous for a predetermined number of bits) transmitted from the reader / writer 2 and a stop bit (0 of NRZ code 0 and 1 is a predetermined bit). When the ASK modulated wave of the NRZ code ending with the pattern in which the number of bits continues is received by the loop coil 11 and input to the ASK detector 34, in step S11, the ASK detector 34
For example, the ASK modulation wave is detected by a method such as synchronous detection or half-wave rectification and output to the AC amplifier 132.

In step S12, the AC amplifier 13
2 amplifies only the AC component of the signal input from the ASK detector 34 and outputs it to the data demodulation unit 133.

The data demodulation unit 133 binarizes the input AC component with an arbitrary value as a threshold and outputs it to the subsequent stage.

On the other hand, the voltage-controlled oscillator 139 of the phase-locked loop 138 oscillates a clock having a frequency substantially equal to the bit rate of the ASK modulated wave.
The asynchronous pattern generator 140 generates an asynchronous pattern of a code including a preset start bit and stop bit in synchronization with the input clock and outputs the generated asynchronous pattern to the register 141. The register 141 is
The code (start bit and stop bit) input from the asynchronous pattern generator 140 is stored, and the stored code is stored in the cross-correlation amount calculator 143 and the register 142 in synchronization with the timing at which the next clock is input. Output. The register 142 stores the code input from the register 141, and outputs the stored code to the cross-correlation calculator 144.

The cross-correlation calculators 142 and 143 are provided with the data series as shown in FIG. 11A input from the AC amplifier 132 via the data demodulation unit 133 and the input from the corresponding registers 141 and 142, for example. The calculated amount of correlation with, for example, the asynchronous pattern code as shown in FIG. 11B is calculated and input to the differentiator 147 via the corresponding LPFs 145 and 146. The differentiator 147 calculates the difference between the correlation amounts calculated by the cross-correlation amount calculators 142 and 143, and supplies the result to the voltage-controlled oscillator 139 as a control signal. The voltage-controlled oscillator 139 controls the frequency (phase) of the oscillating clock so that the difference value of the correlation amount as the control signal becomes small. That is, a kind of PLL operation is performed.

Thereafter, the asynchronous pattern generator 14 which has been pulled into the phase of the data series from the data demodulation unit 133,
The start bit and the stop bit in which 0 has occurred are sent from the asynchronous controller 140 to the FET controller 148.
Is output to In step S13, the FET controller 148 turns on the FET 136 of the data demodulation unit 133 in synchronization with the timing at which the start bit is input.
The switching of the FET 136 charges the coupling capacitor 134 with the maximum value of the AC component from the AC amplifier 132. Thereafter, the FET controller 148 turns off the FET 136 of the data demodulation unit 133 in synchronization with the timing at which the stop bit is input. The switching of the FET 136 charges the coupling capacitor 134 with the minimum value of the AC component from the AC amplifier 132. In step S14, the DC potential of the output of the coupling capacitor 134 is set to a value corresponding to the average of the maximum value and the minimum value of the AC component.

The comparator 137 binarizes the signal input from the coupling capacitor 134 into 0 or 1 on the basis of a predetermined threshold level, and outputs it as an NRZ code sequence to the subsequent stage.

As described above, the NRZ demodulator 35 is provided in the third configuration example shown in FIG. 6, the fourth configuration example shown in FIG. 8, the fifth configuration example shown in FIG. According to the sixth configuration example shown above, after detecting the ASK modulated wave, only the AC component is amplified, so that the ASK modulated wave has a simpler circuit configuration than the above-described second and second configuration examples. Can be demodulated.

FIG. 12 shows a seventh configuration example of the NRZ demodulation unit 35. The ASK detector 34 includes, for example, synchronous detection,
Alternatively, the ASK modulated wave is detected by a method such as half-wave rectification and output to the AC amplifier 152. The AC amplifier 152 does not amplify the DC component of the signal input from the ASK detector 34, amplifies only the AC component, and outputs the amplified signal to the A / D converter 153. The A / D converter 153 converts a signal input from the AC amplifier 152 into a digital signal,
The signal is supplied to the DC component reproducing unit 155 and the binarizing operation unit 158 of the DSP 154.

The DC component reproducing unit 155 includes an A / D converter 15
3 reproduces the DC component of the digital signal output and outputs it to the maximum value detection unit 156. Maximum value detecting section 156 detects the maximum value of the DC component input from DC component reproducing section 155 and outputs the detected maximum value to integrating section 157.
The integrating section 157 multiplies the maximum value input from the maximum value detecting section 156 by 0.5 and outputs the multiplied value to the binarizing operation section 158. The binarization operation section 158 includes an integration section 157
The threshold value is 0.5 times the maximum value of the DC component input from the A / D converter 153, and the signal input from the A / D converter 153 is binarized and output to the signal processing circuit 13 as an NRZ code sequence. It has been made like that. That is, the minimum value of the reproduced DC component is equivalent to 0 of the NRZ code, and the maximum value is equivalent to 1 of the NRZ code. Therefore, if the threshold value is 0.5 times the maximum value, the threshold value of the NRZ code is The data series is correctly reproduced.

Next, the operation will be described with reference to the flowchart of FIG. When the ASK modulated wave transmitted from the reader / writer 2 is received by the loop coil 11 and input to the ASK detector 34, in step S21, the AS
The K detector 34 detects the ASK modulated wave by a method such as synchronous detection or half-wave rectification,
Output to

In step S22, the AC amplifier 15
2, the A / D converter 153 does not amplify the DC component of the signal input from the ASK detector 34 but amplifies only the AC component.
Output to The A / D converter 153 converts the signal input from the AC amplifier 152 into a digital signal and converts the signal into a digital signal.
Are supplied to the DC component reproducing unit 155 and the binarizing operation unit 158.

In step S 23, DC component reproducing section 155 reproduces the DC component of the digital signal input from A / D conversion section 153 and outputs it to maximum value detecting section 156. The maximum value detecting section 156 is provided for the DC component reproducing section 15.
5 detects the maximum value of the DC component input from
57. In step S24, the accumulation unit 15
7 sets the maximum value input from the maximum value detection unit 156 to 0.
The value is multiplied by 5 and the value is output to the binarization operation unit 158 as a threshold level.

In step S25, the binarization operation unit 1
58 uses the threshold level input from the accumulator 157 to convert the signal input from the A / D converter 153 to 2
It is converted to a value and output to the signal processing circuit 13 as an NRZ code sequence.

FIG. 14 shows an eighth example of the configuration of the NRZ demodulation unit 35. The ASK detector 34 includes, for example, synchronous detection,
Alternatively, the ASK modulated wave is detected and output to the AC amplifier 162 by a method such as half-wave rectification. The AC amplifier 162 does not amplify the DC component of the signal input from the ASK detector 34, but amplifies only the AC component and outputs the amplified signal to the threshold determination circuit 163 and the comparator 174.

The diode 164 of the threshold decision circuit 163 reproduces the DC component (positive level component) of the signal output from the AC component amplifier 162. Diodes 166, 167, resistor 16
8, a capacitor 169, and a maximum value hold circuit 165 comprising an operational amplifier 170 detects a maximum value of a positive level, and outputs a half-value circuit 17 comprising resistors 172 and 173.
1 is output. By using the two diodes 166 and 167, even if one of them is not an ideal diode, the maximum value hold circuit 165 can be operated with high accuracy without being affected by it.

The halving circuit 171 multiplies the maximum value of the DC component input from the maximum value holding circuit 165 by 、, and sets the value as a threshold level to the comparator 174.
Output. The comparator 174 uses the threshold level input from the half circuit 171 of the threshold determination circuit 163, and
The signal input from 2 is binarized and output to the signal processing circuit 13 as an NRZ code sequence.

Next, the operation will be described with reference to the flowchart of FIG. When the ASK modulated wave transmitted from the reader / writer 2 is received by the loop coil 11 and input to the ASK detector 34, in step S21, the AS
The K detector 34 detects the ASK modulated wave by a method such as synchronous detection or half-wave rectification, and
Output to

In step S22, the AC amplifier 16
2, the A / D converter 153 does not amplify the DC component of the signal input from the ASK detector 34 but amplifies only the AC component.
Output to The A / D converter 153 outputs the signal input from the AC amplifier 152 to the threshold determination circuit 163 and the comparator 174. In step S23, the positive level of the signal output from the AC component amplifier 162 is equal to the value of the diode 1 of the threshold determination circuit 163.
64, and supplied to the maximum value hold circuit 165.

In step S24, the maximum value hold circuit 165 detects the maximum value of the positive level, and outputs it to the １ ／ circuit 171. The 倍 multiplier 171 multiplies the maximum value of the positive level input from the maximum value hold circuit 165 by １ ／, and outputs the value to the comparator 174 as a threshold level. In step S25, the comparator 174 binarizes the signal input from the AC amplifier 162 using the threshold level input from the 1/2 circuit 171 and outputs it to the signal processing circuit 13 as an NRZ code sequence. .

FIG. 15 shows a ninth configuration example of the NRZ demodulation unit 35. This configuration example is a simplification of the eighth configuration example shown in FIG. 14, and the AC amplifier 182 is the same as the AC amplifier 162 in FIG. The diode 183 whose cathode terminal is connected to the output side of the AC amplifier 182 reproduces the DC component (positive level) of the signal output from the AC component amplifier 182.

Voltage generator 184 has a value Vdatamin / 2 (voltage) of half the amplitude of the signal output from AC amplifier 182.
And a value (Vdatamin / 2−Vf) obtained by subtracting the forward voltage Vf of the diode 183 from the value is output to the comparator 185 as a threshold level. However, when the amplitude of the signal output from the AC amplifier 182 increases, the voltage output from the voltage generator 184 has a fixed value, and thus does not have an appropriate threshold level. However, in this case, the S / N ratio of the signal should be improved, and the bit error rate does not increase.

FIG. 16 shows a tenth configuration example of the NRZ demodulation unit 35. The ASK detector 34 detects the ASK modulated wave (FIG. 17B) generated corresponding to the NRZ code to be transmitted (for example, FIG. 17A) into both positive and negative polarities and outputs a positive polarity detection output ( 17 (C) is output to the AC amplifier 192, and the negative detection output (FIG. 17 (D)) is output to the AC amplifier 193. The AC amplifiers 192 and 193 do not amplify the DC component of the input positive detection output or negative detection output, but amplify only the AC component and output it to the corresponding DC component regenerators 194 and 195. ing.

The DC component regenerator 194 regenerates the DC component of the input positive polarity detection output (FIG. 17 (E)) and outputs it to the contact a of the switch 196. DC component regenerator 195
Regenerates the input DC component of the negative detection output (FIG. 17 (F)) and outputs it to the contact b of the switch 196.

Switch 197, capacitor 198, resistors 199 and 200, voltage generator 201, and oscillator 20
In the threshold determination circuit 196 composed of two clocks, the oscillator 202 outputs a clock having a duty ratio of 1: 1 (FIG. 1).
7 (G)), and is supplied to the switches 197 and 204 as a switching signal. Switch 197
Is synchronized with the clock supplied from the oscillator 202,
The contact a or the contact b can be switched. Therefore, the switch 197 is connected to the capacitor 19
The signal output from the DC component regenerator 194 or the signal from the DC component regenerator 195 is alternately switched (FIG. 17 (H)). (Duty ratio of 1: 1 is reversed signal), so that the occurrence probability of 0 and 1 levels is 1: 1 regardless of the data sequence. Has no DC component.

The voltage generator 201 is provided with a predetermined voltage VDD / 2 (average value of the level of the AC component) which becomes the threshold level.
Is supplied to the inverting input terminal of the comparator 203 via the resistor 200. The comparator 203 includes a switch 197
17 through the capacitor 198 (FIG. 17)
(H)) is binarized using a threshold level (voltage VDD / 2). However, since the positive output (FIG. 17 (I)) of the comparator 203 is inverted from 0 and 1 in synchronization with the clock from the oscillator 202, the switch 204 is synchronized with the clock from the oscillator 202, The positive output and the negative output of the comparator 204 (FIG. 17)
(J)) and outputs the result to the LPF 205.

The LPF 205 outputs a signal (FIG. 17 (K)) from which noise generated at the time of switching in the switches 197 and 205 is removed.

Next, the operation will be described with reference to the flowchart of FIG. When the ASK modulated wave transmitted from the reader / writer 2 is received by the loop coil 11 and input to the ASK detector 34, in step S21, the AS
The K detector 34 detects an ASK modulated wave (FIG. 17B) of the NRZ code (for example, FIG. 17A) in both positive and negative polarities, and outputs a positive detection output (FIG. 17C) to an AC amplifier. 192, and outputs the negative detection output (FIG. 17D) to the AC amplifier 193. In step S22, the AC amplifiers 192, 19
Reference numeral 3 does not amplify the DC component of the input positive polarity detection output or negative polarity detection output, but amplifies only the AC component and outputs it to the corresponding DC component regenerators 194 and 195.

In step S23, the DC component regenerator 194 reproduces the DC component of the input positive polarity detection output (FIG. 17 (E)) and outputs it to the contact a of the switch 196. The DC component regenerator 195 reproduces the input DC component of the negative detection output (FIG. 17 (F)), and the switch 196.
Is output to the contact b.

In step S24, the switch 197 of the threshold determination circuit 202 sets the contact a or the contact b in synchronization with the clock supplied from the oscillator 202.
Is switched to. The voltage generator 201 supplies a predetermined voltage VDD / 2 (average value of the level of the AC component) serving as a threshold level to the comparator 203. In step S25, the comparator 203 outputs the signal (FIG. 17) input from the switch 197 via the capacitor 198.
(H)) is binarized using the threshold level (voltage VDD / 2).

However, since the positive output (FIG. 17 (I)) of the comparator 203 is inverted from 0 and 1 in synchronization with the clock from the oscillator 202, the switch 204 is synchronized with the clock from the oscillator 202. And comparator 2
A positive output and a negative output (FIG. 17 (J)) are switched to the LPF 205 and output. The LPF 205 is connected to the switch 19
The signal (FIG. 17 (K)) from which the noise generated at the time of switching at 7, 205 is removed is output to the subsequent stage.

As described above, the NRZ demodulator 35 is provided in the seventh configuration example shown in FIG. 12, the eighth configuration example shown in FIG. 14, the ninth configuration example shown in FIG. The first shown
If the configuration is realized with the configuration example of 0, only the AC component is amplified after detecting the ASK modulated wave, so that the bit error rate is low with a simple circuit configuration compared with the second and second configuration examples described above. ASK modulated waves can be demodulated.

The first to tenth configuration examples of the NRZ demodulator 35 described above can be applied to the NRZ demodulator 43 in FIG.

Further, the computer program for performing each of the above processes can be provided to the user via a network medium such as the Internet or a digital satellite in addition to a medium such as a magnetic disk or a CD-ROM. it can.

[0125]

As described above, according to the information demodulating apparatus according to the first aspect, the information demodulating method according to the third aspect, and the providing medium according to the fourth aspect, the modulated wave is detected and amplified. Then, the moving average of the extreme values of the amplified signal, and further averaging the results of the moving average, based on the result,
Since the amplified signal is binarized, the ASK-modulated NRZ code sequence can be demodulated with high quality.

Further, according to the information demodulation device of the fifth aspect, the information demodulation method of the eighth aspect, and the providing medium of the ninth aspect, the modulated signal is detected and amplified, and the amplified signal is amplified. Since the amplified signal is binarized on the basis of the average value of the extreme values of ASK, it is possible to demodulate the ASK-modulated NRZ code sequence with high quality.

Furthermore, an information demodulation device according to claim 10, an information demodulation method according to claim 12, and an information demodulation method according to claim 12.
According to the providing medium described in No. 3, since the threshold level is determined using the DC component of the detected signal and the amplified AC component is binarized, the ASK-modulated N
RZ code sequences can be demodulated with high quality.

Further, an information demodulation device according to claim 14, an information demodulation method according to claim 15, and an information demodulation method according to claim 15.
According to the providing medium described in Item 6, the opposite polarity components of the modulated wave are detected, the AC component of the opposite polarity component signal is amplified, and the DC component of the amplified signal is reproduced. Furthermore, a waveform signal having a predetermined duty ratio is oscillated, and a reproduced signal is switched in synchronization with the oscillated waveform signal,
Since the switched signal is binarized and the signal of the opposite polarity component of the binarized signal is switched in synchronization with the oscillated waveform signal, the ASK-modulated NRZ code sequence can be demodulated with high quality. Becomes possible.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a contactless IC card system to which the present invention is applied.

FIG. 2 is a block diagram showing a detailed configuration of the modulation / demodulation circuits 12 and 22 of FIG.

FIG. 3 is a block diagram showing a first configuration example of the NRZ demodulator 35 of FIG. 2;

FIG. 4 is a flowchart illustrating an operation of the first configuration example of the NRZ demodulator 35;

FIG. 5 is a block diagram showing a second configuration example of the NRZ demodulator 35 of FIG. 2;

FIG. 6 is a block diagram showing a third configuration example of the NRZ demodulator 35 of FIG. 2;

FIG. 7 is a flowchart illustrating an operation of the third configuration example of the NRZ demodulator 35;

8 is a block diagram illustrating a fourth configuration example of the NRZ demodulator 35 of FIG. 2;

FIG. 9 is a block diagram illustrating a fifth configuration example of the NRZ demodulator 35 of FIG. 2;

FIG. 10 is a block diagram illustrating a sixth configuration example of the NRZ demodulator 35 of FIG. 2;

FIG. 11 is a diagram for explaining the operation of the sixth configuration example of the NRZ demodulator 35;

FIG. 12 is a block diagram illustrating a seventh configuration example of the NRZ demodulator 35 of FIG. 2;

FIG. 13 is a flowchart illustrating an operation of the seventh configuration example of the NRZ demodulation unit 35;

FIG. 14 is a block diagram showing an eighth configuration example of the NRZ demodulator 35 of FIG. 2;

FIG. 15 is a block diagram showing a ninth configuration example of the NRZ demodulator 35 of FIG. 2;

FIG. 16 is a block diagram showing a tenth configuration example of the NRZ demodulator 35 of FIG. 2;

FIG. 17 is a diagram for explaining the operation of the tenth configuration example of the NRZ demodulator 35;

[Explanation of symbols]

1 IC card, 2 reader / writer, 12, 22
Modulator / demodulator, 34 ASK detector, 35, 43 NRZ demodulator, 52 amplifier, 53 A / D converter, 54 D
SP, 55 Extreme value detector, 56 Moving average part, 57
Averaging unit, 58 binarization operation unit, 61 amplifier, 6
2 threshold decision circuit, 88 comparator, 92
AC amplifier, 94 DSP, 95 Data extraction unit 9
5, 96 Extreme value detector, 97 Average part, 98 2
Value calculation section, 102 AC amplifier, 103 threshold decision circuit, 118 comparator, 122 AC amplifier, 123 threshold decision circuit, 124
Specific pattern detector, 125, 126 S / H, 12
7 average section, 128 moving average section, 129 comparison section, 132 AC amplifier, 133 data demodulation section,
138 phase locked loop, 152 AC amplifier,
154 DSP, 155 DC component reproducing unit, 156
Maximum value detection section, 157 integration section, 158 binarization operation section, 162 AC amplifier, 163 threshold decision circuit, 174 comparator, 182 AC amplifier,
183 capacitor, 184 voltage generator, 18
5 Comparator, 192, 193 AC amplifier, 19
4,195 DC component regenerator, 196 threshold decision circuit, 203 comparator

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[Procedure amendment]

[Submission date] December 3, 1998 (1998.12.
3)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claims

[Correction method] Change

[Correction contents]

[Claims]

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0010

[Correction method] Change

[Correction contents]

According to a third aspect of the present invention, there is provided an information demodulation method comprising: a detection step of ASK detection of a modulated wave; an amplification step of amplifying a signal detected in the detection step; An extreme value detecting step of detecting a value, and a moving average step of moving-averaging the local maximum value and the local minimum value detected in the extreme value detecting step, respectively.
An averaging step of averaging the result of the moving average in the moving average step, and a binarizing step of binarizing the signal amplified in the amplification step based on the result averaged in the averaging step. I do.

[Procedure amendment 3]

[Document name to be amended] Statement

[Correction target item name] 0011

[Correction method] Change

[Correction contents]

According to a fourth aspect of the present invention, there is provided the medium for transmitting the modulated wave to the AS
The detection step for K detection , the amplification step for amplifying the signal detected in the detection step, the extreme value detection step for detecting the maximum value and the minimum value of the signal amplified in the amplification step, and the extreme value detection step A moving average step for moving and averaging the maximum value and the minimum value, an averaging step for averaging the result of the moving average in the moving average step, and a signal amplified in the amplification step based on the result averaged in the averaging step And a computer-readable program that causes the information demodulation device to execute a process including a binarization step of binarizing the data.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0012

[Correction method] Change

[Correction contents]

According to a fifth aspect of the present invention, there is provided an information demodulating apparatus comprising: a detecting means for ASK detecting a modulated wave; an amplifying means for amplifying a signal detected by the detecting means; Extreme value detecting means for detecting the peak value, averaging means for averaging the maximum value and the minimum value detected by the extreme value detecting means, and binarizing the signal amplified by the amplifying means based on the result averaged by the averaging means. And a binarizing unit that performs

[Procedure amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0015

[Correction method] Change

[Correction contents]

According to a tenth aspect of the present invention, there is provided an information demodulating apparatus comprising: a detecting means for ASK detecting a modulated wave; an amplifying means for amplifying a signal detected by the detecting means; a DC component and an AC component of the signal detected by the detecting means. And a binarizing unit for binarizing the AC component amplified by the amplifying unit based on the threshold level determined by the determining unit.

[Procedure amendment 6]

[Document name to be amended] Statement

[Correction target item name] 0016

[Correction method] Change

[Correction contents]

According to a twelfth aspect of the present invention, there is provided an information demodulation method comprising: a detection step of ASK detection of a modulated wave; an amplification step of amplifying a signal detected in the detection step; and a DC component and an AC component of the signal detected in the detection step. And a binarizing step of binarizing the AC component amplified in the amplifying step based on the threshold level determined in the determining step.

[Procedure amendment 7]

[Document name to be amended] Statement

[Correction target item name] 0017

[Correction method] Change

[Correction contents]

The providing medium according to the thirteenth aspect provides a modulated wave.
ASK detecting step, an amplifying step of amplifying a signal detected in the detecting step, a determining step of determining a threshold level using a DC component and an AC component of the signal detected in the detecting step, and a determining step. A computer-readable program for causing an information demodulation device to execute a process including a binarization step of binarizing an AC component amplified in an amplification step based on a threshold level is provided.

[Procedure amendment 8]

[Document name to be amended] Statement

[Correction target item name] 0023

[Correction method] Change

[Correction contents]

In the information demodulation device according to the tenth aspect, the information demodulation method according to the twelfth aspect, and the providing medium according to the thirteenth aspect, the modulated wave is detected, and the DC component and the AC of the detected signal are detected. The threshold level is determined using the components . Further, the amplified AC component is binarized based on the determined threshold level.

[Procedure amendment 9]

[Document name to be amended] Statement

[Correction target item name] 0027

[Correction method] Change

[Correction contents]

The information demodulation device according to claim 5 is a detecting means for ASK detection of a modulated wave (for example, the ASK detector 3 in FIG. 6).
4), amplifying means for amplifying the signal detected by the detecting means (for example, the AC amplifier 92 in FIG. 6), and extreme value detecting means for detecting the maximum value and the minimum value of the signal amplified by the amplifying means (for example, An extreme value detecting section 96 in FIG. 6), an averaging means for averaging the maximum value and the minimum value detected by the extreme value detecting means (for example, the averaging section 97 in FIG. 6), and a result averaged by the averaging means And a binarizing unit (for example, a binarizing operation unit 98 in FIG. 6) for binarizing the signal amplified by the amplifying unit.

[Procedure amendment 10]

[Document name to be amended] Statement

[Correction target item name] 0029

[Correction method] Change

[Correction contents]

The information demodulating device according to the tenth aspect includes a detecting means for ASK detection of the modulated wave (for example, the ASK detector 34 in FIG. 12) and an amplifying means for amplifying the signal detected by the detecting means (for example, An AC amplifier 152 in FIG. 12 and a determination unit (for example, FIG. 12) that determines a threshold level using a DC component and an AC component of a signal detected by the detection unit.
157) and a binarizing unit (for example, a binarizing operation unit 158 in FIG. 12) that binarizes the AC component amplified by the amplifying unit based on the threshold level determined by the determining unit. It is characterized by having.

[Procedure amendment 11]

[Document name to be amended] Statement

[Correction target item name] 0127

[Correction method] Change

[Correction contents]

Furthermore, an information demodulation device according to claim 10, an information demodulation method according to claim 12, and an information demodulation method according to claim 12.
According to the providing medium described in Item 3, the DC component of the detected signal
And the threshold level is determined using the AC component , and the amplified AC component is binarized.
ASK-modulated NRZ code sequences can be demodulated with high quality.

Claims (16)

[Claims] 1. An information demodulation device for demodulating a modulated wave in which a code data sequence is modulated by an ASK modulation method, a detecting unit for ASK detecting the modulated wave, and an amplifying unit for amplifying a signal detected by the detecting unit. An extreme value detecting means for detecting a local maximum value and a local minimum value of the signal amplified by the amplifying means, and a moving average means for moving average the local maximum value and the local minimum value detected by the local extreme value detecting means, An averaging means for averaging the result of the moving average by the moving averaging means; and a binarizing means for binarizing the signal amplified by the amplifying means based on the result averaged by the averaging means. An information demodulator characterized by the above-mentioned. 2. The information demodulation device according to claim 1, wherein the code data sequence is an NRZ code data sequence. 3. An information demodulation method for demodulating a modulated wave in which a code data sequence is modulated by an ASK modulation method, wherein: a detecting step of ASK modulating the modulated wave; and an amplifying step of amplifying a signal detected in the detecting step. An extreme value detecting step of detecting a local maximum value and a local minimum value of the signal amplified in the amplification step, and a moving average step of performing a moving average of the local maximum value and the local minimum value detected in the extreme value detecting step, respectively. An averaging step of averaging the result of the moving average in the moving average step; and a binarizing step of binarizing the signal amplified in the amplifying step based on the result averaged in the averaging step. An information demodulation method characterized by the above-mentioned. 4. An information demodulation device for demodulating a modulated wave in which a code data sequence is modulated by an ASK modulation method, a detection step of ASK-modulating the modulated wave, and an amplification step of amplifying a signal detected in the detection step. An extreme value detecting step of detecting a local maximum value and a local minimum value of the signal amplified in the amplification step, and a moving average step of performing a moving average of the local maximum value and the local minimum value detected in the extreme value detecting step, respectively. A process including an averaging step of averaging the result of the moving average in the moving average step, and a binarizing step of binarizing the signal amplified in the amplification step based on the result of the averaging in the averaging step Providing a computer-readable program for executing the program. 5. An information demodulator for demodulating a modulated wave in which a code data sequence is modulated by an ASK modulation method, comprising: a detector for ASK-modulating the modulated wave; and an amplifier for amplifying a signal detected by the detector. An extreme value detecting means for detecting a local maximum value and a local minimum value of the signal amplified by the amplification means; an averaging means for averaging the local maximum value and the local minimum value detected by the extreme value detecting means; An information demodulation device, comprising: a binarizing unit for binarizing the signal amplified by the amplifying unit based on the result obtained. 6. A pattern detecting means for detecting a predetermined code pattern included in the signal amplified by the amplifying means, wherein the extreme value detecting means detects the predetermined code pattern by the pattern detecting means. And detecting the local maximum value and the local minimum value in synchronization with the timing.
An information demodulation device according to item 1. 7. The information demodulation device according to claim 5, wherein the code data sequence is an NRZ code data sequence. 8. An information demodulation method for demodulating a modulated wave in which a code data sequence is modulated by an ASK modulation method, wherein: a detection step of ASK detecting the modulated wave; and an amplification step of amplifying a signal detected in the detection step. An extreme value detecting step of detecting a local maximum value and a local minimum value of the signal amplified in the amplification step; an averaging step of averaging the local maximum value and the local minimum value detected in the extreme value detecting step; and the averaging step. A binarizing step of binarizing the signal amplified in the amplifying step based on a result averaged in the step (a). 9. An information demodulator for demodulating a modulated wave in which a code data sequence is modulated by an ASK modulation method, a detecting step of ASK detecting the modulated wave, and an amplifying step of amplifying a signal detected in the detecting step. An extreme value detecting step of detecting a local maximum value and a local minimum value of the signal amplified in the amplification step; an averaging step of averaging the local maximum value and the local minimum value detected in the extreme value detecting step; and the averaging step. A providing medium for providing a computer-readable program for executing a process including a binarizing step of binarizing the signal amplified in the amplifying step based on the averaged result. 10. An information demodulation device for demodulating a modulated wave in which a code data sequence is modulated by an ASK modulation method, a detecting unit for ASK detecting the modulated wave, and an amplifying unit for amplifying a signal detected by the detecting unit. Determining means for determining a threshold level using a DC component of the signal detected by the detecting means; and converting the AC component amplified by the amplifying means into a binary value based on the threshold level determined by the determining means. An information demodulation device comprising: a binarizing means for converting the data into a binary signal. 11. The information demodulation device according to claim 10, wherein the code data sequence is an NRZ code data sequence. 12. An information demodulation method for demodulating a modulated wave in which a code data sequence is modulated by an ASK modulation method, wherein: a detecting step of ASK detecting the modulated wave; and an amplifying step of amplifying a signal detected in the detecting step. Determining a threshold level using the DC component of the signal detected in the detection step; and determining the AC component amplified in the amplification step by 2 based on the threshold level determined in the determination step.
An information demodulation method, comprising: 13. An information demodulator for demodulating a modulated wave in which a code data sequence is modulated by an ASK modulation method, a detecting step of ASK detecting the modulated wave, and an amplifying step of amplifying a signal detected in the detecting step. Determining a threshold level using the DC component of the signal detected in the detection step; and determining the AC component amplified in the amplification step by 2 based on the threshold level determined in the determination step.
A providing medium for providing a computer-readable program for executing a process including a binarizing step of converting into a value. 14. An information demodulator for demodulating a modulated wave in which a coded data sequence is modulated by an ASK modulation method, comprising: a detecting means for detecting an opposite polarity component of the modulated wave; and an opposite polarity detected by the detecting means. Amplifying means for amplifying the AC component of the component signal; reproducing means for reproducing the DC component of the signal amplified by the amplifying means; oscillating means for oscillating a waveform signal having a predetermined duty ratio; First switching means for switching the signal reproduced by the reproducing means in synchronization with the reproduced waveform signal; binarizing means for binarizing the signal switched by the switching means; and a signal output by the binarizing means. An output unit that outputs a signal of an opposite polarity component of the following; and a second unit that switches the signal of the opposite polarity component output by the output unit in synchronization with a waveform signal oscillated by the oscillation unit. Information demodulating apparatus characterized by comprising a switch means. 15. An information demodulation method for demodulating a modulated wave in which a code data sequence is modulated by an ASK modulation method, wherein: a detecting step of detecting opposite polar components of the modulated wave; An amplification step of amplifying an AC component of a signal of a polar component; a reproduction step of reproducing a DC component of the signal amplified in the amplification step; an oscillation step of oscillating a waveform signal having a predetermined duty ratio; A first switching step of switching the signal reproduced in the reproduction step in synchronization with the waveform signal oscillated in step 2, and binarizing the signal switched in the switching step.
A value conversion step, an output step of outputting a signal of an opposite polarity component of the signal output in the binarization step, and a waveform oscillated by the oscillation step in the opposite polarity component signal output in the output step A second switching step of switching in synchronization with a signal. 16. An information demodulator for demodulating a modulated wave in which a code data sequence is modulated by an ASK modulation method, comprising: a detecting step of detecting opposite polar components of the modulated wave; An amplification step of amplifying an AC component of a signal of a polar component; a reproduction step of reproducing a DC component of the signal amplified in the amplification step; an oscillation step of oscillating a waveform signal having a predetermined duty ratio; A first switching step of switching the signal reproduced in the reproduction step in synchronization with the waveform signal oscillated in step 2, and binarizing the signal switched in the switching step.
A value conversion step, an output step of outputting a signal of an opposite polarity component of the signal output in the binarization step, and a waveform oscillated by the oscillation step in the opposite polarity component signal output in the output step A providing medium for providing a computer-readable program for executing a process including a second switching step of switching in synchronization with a signal.