JP2000078094A - Time division multiplex transmission system and channel identification system used therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a time division multiplex transmission system capable of realizing a channel identifying function without adding a new redundant area and without giving important change to the specification of an ATM cell base flow to be housed in a channel. SOLUTION: The channel identifier adding circuit 2 of a transmitter 1 adds an intrinsic bit pattern in modulo 2 to the HEC byte part of the ATM cell header of a first channel signal to generate a reference channel signal. A multiplexing circuit 3 time-division-bit-multiplexes the reference channel signal and another channel signal to send as a time division multiplex transmission signal. The channel identification circuit 5 of a receiver 4 time-division-bit- separates the time division multiplex transmission signal to fetch each channel signal. A channel identification circuit 5 detects a reference channel signal from among these channel signals and identifies all the channel signals from a phase difference in the time division multiplex transmission signal with the reference channel signal to output to termination circuits 6 to 9.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a time division multiplex transmission system and a channel identification method used for the same, and more particularly to a channel identification method for individually identifying a plurality of time division multiplexed channels.

[0002]

2. Description of the Related Art Conventionally, as this type of channel identification method, a CRC (Cyclic Redundant) is used for each channel.
ancy check (cyclic redundancy check) operation is performed, and the operation result is added to data as redundant bits.

[0003] In this case, a reference channel is set by using a generator polynomial different from other channels as a generator polynomial at the time of performing a CRC operation, and the reference channel is determined by detecting a difference in the generator polynomial on the receiving side. Identify.

That is, as shown in FIG. 8, a multiplexed signal transmitting circuit 70 includes a channel signal transmitting circuit 71-1.
CRC code insertion circuits 73-1 to 73-73
Of the CRC calculation circuits 72-1 to 72-m that calculate the CRC check bit added to the transmission signal at −m, for example, only the CRC calculation circuit 72-1 uses a generator polynomial different from that of other channels. .

[0005] The multiplexing circuit 74 is a CRC code insertion circuit 7
The transmission signals of all the channels to which CRC check bits are added in 3-1 to 73-m are time-division multiplexed to generate a multiplexed signal, and the multiplexed signal is transmitted to a multiplexed signal receiving circuit 80 through a transmission line 90. Send.

The frame detection circuit 81 of the multiplexed signal receiving circuit 80 for receiving the multiplexed signal performs a CRC operation at an arbitrary frame phase using the same generator polynomial as that of the channel signal transmission circuit 71-1. The frame synchronization phase is detected while changing the calculated phase until the frame phase matches the bit pattern in the coded signal. The frame detection circuit 81 includes a frame synchronization counter circuit 82 and a CRC code separation circuit 83.

The separation circuit 84 separates data from the multiplexed signal according to the frame synchronization phase detected by the frame detection circuit 81, and sends the separated data to the channel signal receiving circuits 85-1 to 85-m. The channel signal receiving circuits 85-1 to 85-m are provided with CRC operation circuits 86-1 to 86-1.
86-m and CRC code insertion circuits 87-1 to 87-m
Consists of The above-described channel identification method is described in JP-A-7-177136.

[0008]

In the above-described conventional channel identification method, a CRC calculation result must be inserted into data for channel identification. For this reason, a redundant area for channel identification must be added to transmission data, which causes a problem that transmission capacity is increased.

However, if the reference channel is ATM (Async)
In the case of a strong transfer mode (asynchronous transfer mode) cell-based flow, an area [HEC (Hea) where a CRC calculation result is inserted into the header of the ATM cell is used.
der Error Control) byte], a redundant area for channel identification is not required.

However, a standard specification is specified for the generator polynomial of the CRC operation in the ATM, and when the above-described conventional example is applied, there is a problem in that the specification deviates from this specification. In addition, when a generator polynomial different from the standard specification is used, a Hamming distance at the time of error detection changes, which has a significant effect on signal quality.

The ATM cell-based flow is an ATM-PON (Passive) which is a subscriber communication system.
Optical Network), etc., and is expected to expand to subscriber systems in the future.

Accordingly, an object of the present invention is to solve the above-mentioned problems and to identify a channel without adding a new redundant area and without causing a significant change in the specification of the ATM cell base flow accommodated in the channel. It is an object of the present invention to provide a time division multiplex transmission system capable of realizing a function and a channel identification method used for the system.

[0013]

A time division multiplex transmission system according to the present invention is a time division multiplex transmission system for transmitting at least one of a plurality of channels accommodating a cell base flow in an asynchronous transfer mode by time division multiplexing. Channel identifier adding means for transforming the HEC byte, which is preset in the cell header of the channel accommodating the cell base flow and indicating information for error detection and correction of transmission data, into a unique form and converts it into a reference channel signal; Multiplexing means for generating and outputting a time-division multiplex transmission signal by time-division multiplexing each channel signal including the reference channel signal in a transmission device, wherein the time-division multiplex transmission transmitted from the transmission device is provided. Separating means for time-division-separating signals, and the HEC bus from a plurality of channel signals generated by time-division separating by the separating means. And a reference channel detection means for detecting a reference channel signals having the door to a receiving device.

A channel identification method for a time division multiplex transmission system according to the present invention is a channel identification method for a time division multiplex transmission system in which at least one of a plurality of channels accommodating an asynchronous transfer mode cell base flow is time division multiplexed and transmitted. A reference channel is set by transforming the HEC byte, which is set in advance in the cell header of the channel accommodating the cell-based flow and indicates information for error detection and correction of transmission data, into a unique form on the transmission side, The receiving side detects the reference channel having the HEC byte transformed into the unique shape.

That is, the channel identification method of the present invention
In a time division multiplexing transmission system for transmitting a plurality of channels by time division multiplexing, at least one of the plurality of channels has an ATM (Asynchronous Tran).
sfer Mode: Asynchronous transfer mode) A cell-based flow is accommodated, and an HEC (Header Error Co.) in an ATM cell header in the ATM cell-based flow is accommodated.
ntrol: header error control) byte [CRC (Cyc
Like Redundancy Check: cyclic insertion check), the reference channel is set by transforming the operation result insertion byte into a unique form on the transmitting side, and the receiving side detects the ATM cell transformed into the unique form by detecting the ATM cell. Identifies the reference channel.

Specifically, in the channel identification method of the present invention, the transmitting side modulo-2 adds a unique bit pattern to the HEC byte in the ATM cell header, and the receiving side performs the unique bit pattern synchronization with the ATM cell. The reference channel is identified by synchronizing the bit pattern with the HEC byte obtained by modulo-2 addition of the ATM cell.

In the time division multiplex transmission system using the above-described channel identification method, in a time division multiplex transmission system for transmitting a plurality of channels by time division multiplexing, at least one of the plurality of channels accommodates an ATM cell base flow. A channel identifier adding circuit for transforming the HEC byte of the ATM cell header of the channel accommodating the ATM cell base flow into a unique form and converting the HEC byte into a reference channel signal, and inputting each channel signal including the reference channel signal. A multiplexing circuit that divides and multiplexes and outputs the multiplexed transmission signal as a time division multiplex transmission signal is provided in the transmission device, a separation circuit that performs time division demultiplexing on the time division multiplex transmission signal transmitted from the transmission device, and a signal that is output from the separation circuit. One of the plurality of channel signals
The receiving apparatus has at least one reference channel detection circuit for detecting a reference channel by inputting one of them and detecting the presence / absence of an HEC byte transformed into a unique form.

The channel identifier adding circuit receives the channel signal, modulo-adds the bit pattern unique to the reference channel to the HEC byte position of the ATM cell header, and performs CR.
C operation is being performed.

The reference channel detection circuit receives the channel signal, modulo 2 adds a bit pattern unique to the reference channel to the HEC byte position of the ATM cell header, and performs CRC.
An operation is being performed.

With the above configuration, a specific ATM cell base flow can be identified by modulo-2 adding a unique bit pattern to the HEC byte in the ATM cell header.

Therefore, when a plurality of ATM cell-based flows are accommodated in channels and transmitted,
Even when a signal using another format is accommodated and transmitted in addition to the TM cell-based flow, a specific AT
By modifying the HEC byte of the M-cell based flow according to the above method, this can be used as the reference channel. On the receiving side, this reference channel can be easily identified, and further, other channels can be identified from the phase difference from the reference channel.

When the ATM cell base flow is accommodated in all the channels, the HEC byte is modulo 2
If the unique bit pattern to be added is independent for each channel, it is possible to identify each channel individually.

Accordingly, it is not necessary to add a new redundant area, and the reference channel can be identified based on the standard specification of the transmission method of the ATM cell base flow. Therefore, it is possible to adopt a standard product even when configuring the device, and it is possible to construct a low-cost device.

[0024]

Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a time division multiplex transmission system according to one embodiment of the present invention. In the figure, a time division multiplex transmission system according to one embodiment of the present invention comprises a transmitting device 1 including a channel identifier adding circuit 2 and a multiplexing circuit 3 and a receiving device 4 including a channel identifying circuit 5.

A large-capacity line connecting the transmitting device 1 and the receiving device 4 has a transmission capacity of 2.5 Gbps,
The configuration is such that four channels of 622 Mbps transmission capacity are time-division multiplexed. Each of the first to fourth channel signals 101 to 104 accommodated in each channel is A
TM (Asynchronous TransferM)
mode: asynchronous transfer mode) This is a cell-based flow.

The first channel signal 101 of these channel signals is input to the channel identifier adding circuit 2,
HEC of ATM cell header in channel identifier addition circuit 2
(Header Error Control: Header Error Control) A bit pattern unique to a byte portion is modulo-2 added to become a reference channel signal 105.

The reference channel signal 105 is input to the multiplexing circuit 3 together with the second to fourth channel signals 102 to 104. The multiplexing circuit 3 multiplexes the input second to fourth channel signals 102 to 104 and the reference channel signal 105 in a time-division bit manner and transmits the multiplexed signal as a time-division multiplex transmission signal 110.

On the other hand, the receiving device 4 inputs the time division multiplex transmission signal 110 transmitted from the transmitting device 1 to the channel identification circuit 5 and separates each channel signal by time division bit separation in the channel identification circuit 5. The channel identification circuit 5 further detects the reference channel signal 105 from the four channel signals, and identifies all channel signals from the phase difference between the reference channel signal 105 and the time-division multiplex transmission signal 110. All or some of the individually identified channel signals are output from the channel identification circuit 5 to the termination circuits 6 to 9.

The termination circuits 6 to 9 terminate the corresponding channel signals. Note that the reference channel signal 105 is output after being re-converted into the first channel signal 101 in the channel identification circuit 5.

FIG. 2 shows the first to fourth channel signals 1 shown in FIG.
FIG. 3 is a diagram illustrating a configuration of the reference channel signal 105 of FIG. 1. These figures 2
A method of adding a channel identifier in the channel identifier adding circuit 2 in the transmitting device 1 will be described with reference to FIG.

The channel signal 101 is a cell-based flow in which ATM cells are connected. The ATM cell 20 has a fixed-length format consisting of a 5-byte ATM cell header 21 and a 48-byte payload 22, and the ATM cell header 21 has a VCI (Virt) representing a connection.
ual Channel Identifier) / V
PI (Virtual Path Identifier)
r) and the like are secured.

A CRC (Cyclic Redundancy Ch) for protecting the ATM cell header 21 is provided.
eck: cyclic redundancy check) The result of the operation is described in the fifth byte HEC byte 23 of the ATM cell header 21.

The ATM cell synchronization on the ATM cell base flow is performed by judging that the phase in which the CRC operation is established in the 53-byte cycle is the HEC byte 23. Also,
The ATM cell base flow is scrambled in order to facilitate the extraction of the synchronization clock on the receiving side.

The HEC byte 2 is used for this scramble synchronization.
Since the upper 2 bits of HEC3 (HEC8 bits 28, HEC7 bits 27) are used, the lower 6 bits of HEC byte 23 (HEC6 to HEC1 bits 26) are actually used.
Performs a CRC operation to achieve ATM cell synchronization.

The channel identifier adding circuit 2 synchronizes ATM cells by CRC operation, and then sets HEC6 to HEC
The unique bit pattern 24 is modulo-2 added to one bit 26 and converted into a reference channel signal 105 (see FIG. 3). In this embodiment, “1” is used as the unique bit pattern 24.
A fixed bit pattern of 6 bits of 01010 ″ is used.

On the receiving side, HEC6 to HEC1 bits 26
After performing a modulo-2 addition of the unique bit pattern 24 ("101010"), the CRC operation is performed to synchronize the ATM cells. By this operation, ATM cell synchronization with reference channel signal 105 is achieved.

On the other hand, the second to fourth channel signals 102-1
Since HEC6 to HEC1 bits 26 are modified for 04, ATM cells cannot be synchronized with the above operation. Therefore, the reference channel signal 105 and the second to fourth
The channel signals 102 to 104 can be easily distinguished. Also, the second to fourth channel signals 102 to 104
Is also an ATM cell-based flow,
Since TM cell synchronization is not established, the reference channel signal 10
5 can be distinguished.

FIG. 4 is a block diagram showing a configuration of the channel identifier adding circuit 2 of FIG. In the figure, the channel identifier adding circuit 2 includes an ATM cell synchronizing circuit 31 and a modulo 2 adding circuit 32.

The first channel signal 101 input to the channel identifier adding circuit 2 is branched into two and input to the ATM cell synchronizing circuit 31 and the modulo 2 adding circuit 32, respectively. The ATM cell synchronization circuit 31 synchronizes the ATM cell base flow of the channel signal 101 with the ATM cell,
An HEC byte timing signal 121 synchronized with the HEC byte 23 is output to the modulo-2 addition circuit 32.

In the modulo 2 addition circuit 32, the HEC byte timing signal 121
The unique bit pattern 24 is added modulo 2 to the HEC6 to HEC1 bits 26 of the byte 23. Therefore, the output of the modulo-2 addition circuit 32 is the reference channel signal 105
And output from the channel identifier adding circuit 2.

FIG. 5 is a block diagram showing a configuration of the channel identification circuit 5 of FIG. In the figure, the channel identification circuit 5 includes a separation circuit 51 with a bit rotation function and a reference channel detection circuit 52.

The time division multiplex transmission signal 110 input to the channel identification circuit 5 is input to the separation circuit 51 having a bit rotation function and separated into four channel signals. A reference channel detection circuit 52 is connected to a first output port 51a of the four output ports 51a to 51d of the separation circuit 51 with a bit rotation function.

The reference channel detection circuit 52 performs a CRC operation on the input channel signal by modulo-2 addition of the unique bit pattern 24 to the HEC6 to HEC1 bits 26 to synchronize ATM cells.

When ATM cell synchronization has not been achieved for a certain period of time, the reference channel detection circuit 52 outputs a bit rotation signal 151 to the separation circuit 51 with a bit rotation function to switch the input channel signal. The bit rotate signal 151 is input to the separation circuit with bit rotation function 51, and operates the bit rotation function (the function of rotating the bits of the channel signal) of the separation circuit with bit rotation function 51.

By this bit rotation function, each output port 51 of the separation circuit 51 with the bit rotation function is provided.
The channel signals output from a to 51d are incremented or decremented. As described above, the reference channel detection circuit 52 outputs the bit rotation signal 151 to the signal obtained by modulo-2 addition of the unique bit pattern 24 until ATM cell synchronization is achieved.

Therefore, what is output from the output port 51a at the time when the bit rotation operation is completed is a signal which can obtain the ATM cell synchronization by modulo-2 addition of the unique bit pattern 24, that is, the reference channel signal 105. At the same time, the channel signal 102 is output from the second output port 51b, the channel signal 103 is output from the third output port 51c, and the channel signal 1 is output from the fourth output port 51d.
04d are output respectively.

FIG. 6 is a block diagram showing a configuration of the reference channel detection circuit 52 of FIG. In the figure, the reference channel detection circuit 52 includes a unique bit pattern addition CRC calculation circuit 54, an ATM cell synchronization counter circuit 55, a unique bit pattern addition circuit 56, and a timeout counter circuit 57.

The signal input to the reference channel detection circuit 52 is input to a unique bit pattern addition CRC calculation circuit 54 and a unique bit pattern addition circuit 56. The unique bit pattern addition CRC operation circuit 54 converts the unique bit pattern 24 into the HEC6 to HEC1 bit 26 modulo 2
The added CRC calculation is performed, and the timing at which the CRC calculation is established is determined by the inherent bit pattern addition CRC calculation result 152.
To the ATM cell synchronization counter circuit 55.

The ATM cell synchronization counter circuit 55 is provided with a synchronization protection circuit.
Synchronize cells. When the ATM cell is synchronized, it can be determined that the input channel signal is the reference channel signal 105, so that the ATM cell synchronization counter circuit 55 outputs the reference channel detection signal 153.

At the same time, the ATM cell synchronization counter circuit 55 outputs the ATM cell synchronization signal 15 synchronized with the ATM cell.
4 is output. The unique bit pattern adding circuit 56 modulo 2 adds the unique bit pattern 24 to the HEC6 to HEC1 bits 26 of the reference channel signal 105 according to the phase of the ATM cell synchronization signal 154, and
Convert to 01.

On the other hand, the timeout counter circuit 57 monitors the reference channel detection signal 153, and if the reference channel detection signal 153 is not detected for a predetermined time or more,
A bit rotate signal 151 is output.

In this embodiment, a unique bit pattern setting terminal 53 is provided so that the unique bit pattern 24 can be set from outside the reference channel detection circuit 52. Therefore, even when a plurality of reference channels are set using a plurality of unique bit patterns 24, a specific reference channel signal can be detected by designating the specific unique bit pattern 24 from the outside.

Further, in this embodiment, the modulo 2 addition of the unique bit pattern 24 is performed before the CRC calculation.
It is also possible to adopt a configuration in which the unique bit pattern 24 is modulo-2 added after the C operation, and then the establishment of the CRC operation is determined.

FIG. 7 is a block diagram showing another example of the configuration of the channel identification circuit 5 of FIG. In the figure, a channel identification circuit 5 is a separation circuit 51-1 with a bit rotation function.
To 51-n and reference channel detection circuits 52-1 to 52-n.
n.

The channel discriminating circuit 5 of the present configuration example is configured to output HEC6 to HEC1 of the first to fourth channel signals 101 to 104.
Bits 26 are first to fourth unique bit patterns 24, respectively.
Used when deformed by a to 24d.

That is, the first to fourth channel signals 10
1 to 104 are time-division multiplexed on the transmitting side after the first to fourth unique bit patterns 24a to 24d are modulo-2 added and converted to first to fourth reference channel signals 105a to 105d. . Channel identification circuit 5
Are divided into n (n is a positive number), and are input to the first to n-th separation circuits with bit rotation function 51-1 to 51-n, respectively.

Separation circuit 51 with each bit rotation function
The first to n-th reference channel detection circuits 52-1 to 52-n are respectively connected to the subsequent stages of -1 to 51-n, and each of the first to n-th reference channel detection circuits 52-1 to 52-n is connected to one of the output ports (all the first output ports 51a in FIG. 7). −
1 to 51a-n) are monitored.

The first to n-th reference channel detection circuits 52-
One of the first to fourth unique bit patterns 24a to 24d is input to 1 to 52-n through the first to n-th unique bit pattern setting terminals 53-1 to 53-n.

For example, the first reference channel detection circuit 52
When the second unique bit pattern 24b is input to the first reference channel detection circuit 52-1 when the second unique bit pattern 24b is input to the first reference channel detection circuit 52-1, the second unique bit pattern 24b is added modulo 2 to the ATM, and the ATM is added. Synchronize cells. When the ATM cell cannot be synchronized, the first reference channel detecting circuit 52-1 increments or decrements the output channel signal of the first separating circuit with bit rotation function 51-1 until the ATM cell is synchronized.

When the ATM cell is synchronized, the second reference channel signal 105b is converted into the second channel signal 102 and output from the first reference channel detection circuit 52-1.

As described above, in this configuration, a desired channel signal can be selected and output by changing the fixed bit pattern input to each of the reference channel detection circuits 52-1 to 52-n. That is, the channel identification circuit 5 of this configuration example simultaneously realizes the channel selection function in addition to the channel identification.

Although time division multiplexing is bit multiplexed in this embodiment, the present invention is also effective in byte multiplexing. In the present embodiment, the number of channels is defined as four, but the present invention is applicable to other numbers of channels.

As described above, at least one of the plurality of channels contains an ATM cell-based flow,
HEC in ATM cell header in TM cell based flow
A time-division multiplexing transmission system is provided by setting a reference channel by transforming bytes into a unique shape on the transmission side and identifying the reference channel by detecting ATM cells transformed into the unique shape on the reception side. Can realize a channel identification function based on the ATM cell base flow.

This channel identification method does not require the addition of a redundant area for channel identification, and can conform to the standard specification of the ATM cell base flow.
Therefore, a versatile circuit or a standard circuit can be adopted, and a system using low-cost devices can be constructed.

The present invention can take the following aspects in connection with the description of the claims.

(1) A time-division multiplexing transmission system in which at least one of a plurality of channels accommodating a cell base flow in an asynchronous transfer mode is time-division multiplexed and transmitted, wherein a cell header of the channel accommodating the cell base flow is HE that is preset and indicates information for error detection and correction
Channel identifier adding means for transforming the C byte into a unique form and converting it into a reference channel signal; and multiplexing for time division multiplexing each channel signal including the reference channel signal to generate and output a time division multiplexed transmission signal. Means in the transmitting apparatus, a plurality of separating means for time-division separating the time-division multiplexed transmission signal transmitted from the transmitting apparatus, and a plurality of time-division separated signals generated by the plurality of separating means respectively. A time-division multiplexing transmission system comprising a plurality of reference channel detection means for detecting a reference channel signal having the HEC byte from the channel signal of the receiver.

(2) The channel identifier adding means includes synchronizing means for synchronizing the channel based on the HEC byte, and modulo-2 adding means for modulo-2 adding the unique bit pattern to the HEC byte. The time division multiplex transmission system according to (1), characterized in that:

(3) Each of the plurality of reference channel detection means includes an input terminal for inputting a corresponding unique bit pattern, and the unique bit pattern input from the input terminal being modulo-2 at the position of the HEC byte. The time division multiplex transmission system according to (2), further comprising: a modulo-2 addition CRC operation means for performing a cyclic redundancy check operation by adding.

(4) A channel identification system of a time division multiplex transmission system in which at least one of a plurality of channels accommodating a cell base flow in an asynchronous transfer mode is time-division multiplexed and transmitted, wherein the cell base flow is accommodated. The reference channel is set by transforming the HEC byte preset in the cell header of the channel and indicating information for error detection and correction into a unique form on the transmitting side, and the HEC byte transformed into the unique form on the receiving side A channel identification method for detecting the reference channel having the above-mentioned, and performing channel selection based on the detected reference channel.

(5) The channel identification method according to (4), wherein the transmission side modulo 2 adds a unique bit pattern to the HEC byte.

(6) The HEC obtained by modulo 2 addition of the unique bit pattern at the time of cell synchronization on the receiving side.
The channel identification method according to (5), wherein a reference channel is identified by cell synchronization with respect to a byte, and a desired channel is selected by changing the unique bit pattern.

[0072]

As described above, according to the present invention, in a time division multiplex transmission system for transmitting a plurality of channels accommodating a cell base flow of at least one of the asynchronous transfer modes in a time division multiplex manner, The HEC byte, which is set in advance in the cell header of the channel accommodating the error and indicates information for error detection and correction of transmission data, is transformed into a unique form on the transmitting side to set a reference channel, and transformed into a unique form on the receiving side. Detecting the reference channel having the specified HEC byte realizes a channel identification function without adding a new redundant area and without causing a significant change in the specification of the ATM cell base flow accommodated in the channel. There is an effect that can be.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a time division multiplex transmission system according to one embodiment of the present invention.

FIG. 2 is a diagram illustrating a configuration of first to fourth channel signals of FIG. 1;

FIG. 3 is a diagram illustrating a configuration of a reference channel signal in FIG. 1;

FIG. 4 is a block diagram illustrating a configuration of a channel identifier adding circuit in FIG. 1;

FIG. 5 is a block diagram illustrating a configuration of a channel identification circuit in FIG. 1;

FIG. 6 is a block diagram illustrating a configuration of a reference channel detection circuit in FIG. 5;

FIG. 7 is a block diagram showing another configuration example of the channel identification circuit of FIG. 1;

FIG. 8 is a block diagram illustrating a configuration example of a conventional time division multiplex transmission system.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Transmitting apparatus 2 Channel identifier addition circuit 3 Multiplexing circuit 4 Receiving apparatus 5 Channel identification circuit 6-9 Termination circuit 31 ATM cell synchronization circuit 32 Modulo 2 addition circuit 51, 51-1 to 51-n Separation circuit with bit rotation function 52 , 52-1 to 52-n Reference channel detection circuit 53, 53-1 to 53-n Specific bit pattern setting terminal 54 Specific bit pattern addition CRC calculation circuit 55 ATM cell synchronization counter circuit 56 Specific bit pattern addition circuit 57 Timeout counter circuit

Claims (6)

[Claims] 1. A time division multiplexing transmission system in which at least one of a plurality of channels accommodating a cell base flow in an asynchronous transfer mode is time-division multiplexed and transmitted, wherein a cell header of the channel accommodating the cell base flow is provided in advance. Channel identifier adding means for transforming a set HEC byte indicating information for error detection and correction of transmission data into a unique form and converting it into a reference channel signal, and time-division multiplexing each channel signal including the reference channel signal Multiplexing means for generating and outputting a time-division multiplexed transmission signal in the transmission device, and separating means for time-division-separating the time-division multiplexed transmission signal transmitted from the transmission device, and the separation means From the plurality of channel signals generated by time-division separation at the HE.
A time-division multiplexing transmission system, characterized in that a receiver has reference channel detection means for detecting a reference channel signal having C bytes. 2. The apparatus according to claim 2, wherein
2. The time division multiplex transmission according to claim 1, further comprising: a synchronization unit for synchronizing the channel based on an EC byte; and a modulo-2 addition unit for modulo-2 adding the unique bit pattern to the HEC byte. system. 3. The reference channel detecting means, wherein
A modulo-2 addition CR for performing a cyclic redundancy check operation by modulo-2 adding the unique bit pattern to the C byte position
3. The time division multiplex transmission system according to claim 2, further comprising C operation means. 4. A channel identification system for a time division multiplex transmission system for transmitting a plurality of channels accommodating a cell base flow in an asynchronous transfer mode by time division multiplexing, wherein the channel accommodating the cell base flow. The HEC byte which is previously set in the cell header and indicates information for error detection and correction of transmission data is transformed into a unique form on the transmission side to set a reference channel, and the reception side is transformed into the unique form. A channel identification method, wherein the reference channel having an HEC byte is detected. 5. The channel identification method according to claim 4, wherein the transmission side modulo 2 adds a unique bit pattern to the HEC byte. 6. The reference channel is identified by performing cell synchronization on the HEC byte obtained by modulo 2 addition of the unique bit pattern in the cell synchronization on the receiving side. The channel identification method according to claim 5, wherein