JP2000076095A - Device and method for tracing program and storage medium storing program therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To trace a program without correcting an operating system or hardware concerning a device and a method for tracing program and a storage medium storing program therefor. SOLUTION: This device is provided with an original interruption information holding means 1 for holding the position information of an interruption means, a trace means 5 for acquiring the trace information of a program, and an interruption information generating means for trace for generating an interruption information holding means 2 for trace for holding the position information of a trace information collecting means 5' and the interruption information holding means to be used is switched from the original interruption information holding means 1 to the interruption information holding means 2 for trace. When an interruption occurs, while referring to the internal information of a CPU and a main memory, trace information is collected by the trace information collecting means 5' corresponding to the position information of generated interruption held in the interruption information holding means 2 for trace.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a program tracing device and a program tracing method for collecting trace information of a program, and a storage medium for storing the program.

[0002]

2. Description of the Related Art A conventional program trace technique is as follows. Instruction-set Emulation Creates an emulation system that can execute the instructions of the target system, and then operates the operating system and user programs to collect information for each instruction.

[0003] Static Code Annotation [0003] Information such as data access and branch history is collected by rewriting a part of the code of an operating system or a user program.

[0004] Using a debugging function provided by the operating system, a trace routine is called for each instruction and information is collected.

[0005]

However, the above-described conventional method of tracing a program has the following problems. Instruction-set Emulation There is no limit on the information that can be acquired, but it is necessary to develop an emulation system for the target system. In particular,
It requires detailed information about the processor architecture and requires a lot of man-hours to create.

[0006] Static code annotation (Static Code Annotation) In order to rewrite a source code or an object code, a trace code can be inserted only into a specific instruction, and tracing in units of one instruction cannot be performed.

[0009] Single Step Execution [0007] Since a function provided by the operating system is used, only a specified process can be traced, and internal information of the operating system and a trace of another process cannot be traced.

It is an object of the present invention to provide a program tracing device and a program tracing method capable of easily acquiring program trace information without modifying an operating system or hardware, and a storage medium for storing the program. .

[0009]

According to the present invention, there is provided interrupt information holding means for holding information on an interrupt means, and when an interrupt occurs, the interrupt information holding means is referred to to obtain the position information of the interrupt means. A program trace device in a system that performs interrupt processing, comprising: an original interrupt information holding unit that holds position information of an interrupt unit; and a trace unit that acquires trace information of a program.
Trace information collecting means for acquiring trace information by referring to the internal information and main storage of the trace information generating means for generating trace interrupt information holding means for holding the position information of the trace information collecting means, When collecting trace information, switch the interrupt information holding means to be used from the original interrupt information holding means to the trace interrupt information holding means. When an interrupt occurs, the interrupt information held by the trace interrupt information holding means The trace information is collected by referring to the internal information and the main memory of the CPU by the trace information collecting means corresponding to the position information.

FIG. 1 shows the basic configuration of the present invention. In FIG. 1, reference numeral 1 denotes an original interrupt information holding unit,
Each pointer specifies a certain address of each interrupt means.

Reference numeral 2 denotes a trace interrupt information holding unit, which is created for program tracing. Each pointer of the trace interrupt information holding means 2 points to the address of the trace means for each interrupt of the trace means 5.

Reference numeral 3 denotes an operating system. 4
Is an interrupt means having interrupt handler 0, interrupt handler 1,..., Interrupt handler n.

Reference numeral 5 denotes a tracing means, which refers to the internal information and main memory of the CPU for the interrupt issued by the control means 9 and acquires the trace information by the tracing means corresponding to the interrupt. is there.

5 'is a trace information collecting means,
This is to collect trace information from the PU internal information and main memory. Reference numeral 6 denotes a trace interrupt information creating means for creating interrupt information for collecting trace information and storing it in the trace interrupt information holding means.

Reference numeral 7 denotes a trace recording area. 8 is an application program. 9 is a control means.

The operation of the basic configuration of the present invention shown in FIG. 1 will be described. In FIG. 1, the dotted line shows the flow of operation from when an interrupt is issued by the control means 9 to when trace information is acquired and when the interrupt means is executed in the operating system.

In a normal operation, when an interrupt is issued by the control means 9, the operating system 3 refers to the original interrupt information holding means 1, refers to a pointer for the corresponding interrupt, and sends the interrupt instruction to the operating system 3. Interrupt processing is executed by the interrupting means 4 to be executed.

In the trace mode, the tracing means 5
The trace interrupt information creating means 6 creates interrupt information for collecting trace information in the trace interrupt information holding means 2. At that time, the pointer of each interrupt of the trace interrupt information holding means 2 points to the trace program corresponding to each pointer.

When an interrupt is issued by the control means 9, the trace interrupt information holding means 2 is referred to. The trace information collecting means 5 'acquires information on the corresponding interrupt and sets it as trace information.

The trace information collecting means 5 ′ records trace information in a trace recording area. Next, the original interrupt information holding means is referred to,
The address of the corresponding interrupt means is determined.

In the operating system 3, an interrupt process is executed by a corresponding interrupt unit. The above processing is repeated for each interrupt, and trace information can be obtained.

As described above, the tracing means of the present invention makes it possible to acquire trace information such as an arbitrary hardware event, operating system interrupt event, error event, etc., irrespective of the operating system 3. Further, as described later, by being located between the hardware (control means 9) and the operating system 3, the control can be taken in before the operating system 3 in the single step mode or the block step mode. Every time or every branch instruction, not only the application program 8 but also the inside of the operating system can be traced.

Since it is not necessary to modify existing software at all, loading and unloading of a trace program (trace means) enables dynamic addition and detachment of a trace function to and from the system.

As described above, according to the present invention, an arbitrary interrupt trace can be performed without changing the existing hardware at all and without changing the operating system or the application program. Also,
Since tracing for each instruction and tracing for each branch block are possible, it is possible to trace the entire behavior of the system. Further, it is possible to acquire a trace of only the designated space by designating a trace of only the designated task and a trace of only the user space or the kernel space.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the first embodiment of the present invention, the position of an original interrupt table is determined by a value set in an interrupt table register, and the system is operated on a system having an interrupt processing function. The trace program is located between the hardware and the operating system by hooking (intercepting) all the interrupts during operation, and refers to the internal information of the CPU and the main memory for each interrupt, and reads information of each register. Obtain information such as a system table. The acquired trace information is output to a memory or an area in an auxiliary storage device.

The functions of the interrupt handler include a hardware interrupt such as a timer interrupt, a keyboard interrupt, a disk interrupt, a software interrupt such as an OS service, an exception interrupt processing such as a CPU error, and a debug interrupt such as a single step trace and a block trace. There is.

FIG. 2 shows a first embodiment of the present invention. In the first embodiment of the present invention, a trace interrupt table is created, and the contents of the interrupt table register indicating the position of the original interrupt table are changed to the position where the trace interrupt table is created.

The creation of the trace interrupt table and the change of the interrupt table register can be dynamically performed at any time after the system is started in a system capable of loading and unloading a program, and can be inserted and removed any number of times. is there.

When each interrupt occurs, the trace program obtains the interrupt, obtains information about the interrupt, and stores it in the trace area as trace information. Thereafter, the address of the interrupt handler is obtained by referring to the original interrupt table, the processing is shifted to the interrupt handler, and the specified interrupt processing is performed. In this manner, trace information can be collected without interrupting the operating system, and interrupt processing can be executed.

In FIG. 2, reference numeral 11 denotes an original interrupt table (corresponding to the original interrupt information holding means 1 in FIG. 1).

Reference numeral 15 denotes a trace interrupt table (corresponding to the trace interrupt information holding means 2 in FIG. 1). 21 is an operating system.

Reference numeral 22 denotes an interrupt handler (corresponding to the interrupt means 4 in FIG. 1). 41 is a control unit. 4
Reference numerals 1 and 42 constitute a CPU.

Reference numeral 42 denotes an interrupt table register.
Reference numeral 51 denotes a trace program (corresponding to the trace means 5 in FIG. 1). .

Reference numeral 511 denotes a trace information collection program. Reference numeral 52 denotes a trace interrupt table creating means (corresponding to the trace interrupt information creating means in FIG. 1).

Reference numeral 61 denotes a trace recording area. 62 is an application program. The operation of the configuration of FIG. 2 will be described. Dotted lines indicate the flow of operation.

(1) Before Trace Program Operation (Initial State) The interrupt table register 42 holds the address of the original interrupt table created by the operating system. In the example, the address 80036400 of the original interrupt table is set.

(2) Creation of the trace interrupt table 15 The trace interrupt table creation means 52 provides the trace interrupt table 15 for collecting trace information.
Create At this time, the trace interrupt table 15
Are set to point to the trace information collection program 511.

When tracing is performed, the interrupt table register rewriting means 53 of the trace program 51
Thereby, the value of the interrupt table register 42 is changed to the address of the created trace interrupt table 15. For example, F886 is set in the interrupt table register 42.
Set 5400.

(3) Operation when an Interrupt Occurs When an interrupt occurs in the control unit 41, the interrupt table register 42 is referred to.

When an interrupt occurs, the control unit 41 refers to the interrupt table register 42. Interrupt table (Interrupt table for trace 1
An address with 5) is obtained.

A corresponding interrupt handler (trace information collection program) is obtained from the interrupt table, and the trace information collection program 511 acquires trace information by referring to the internal information and main memory of the CPU.

The acquired trace information is recorded in the trace recording area 61. , 'The original interrupt table 11 is referenced,
The address of the corresponding interrupt handler is obtained, and the interrupt processing is executed by the interrupt handler in the operating system 21.

FIG. 3 shows a second embodiment of the present invention. FIG.
Shows another embodiment for creating a trace interrupt table. In the second embodiment, the value of the interrupt register is not changed. Instead, the original interrupt table of the operating system is saved in a save area, and a trace interrupt table is created in the area where the original interrupt table was. By doing so, it is possible to cope with the case where the position where the original interrupt table is created without the interrupt table register is fixedly set at the table position or the value of the interrupt table register cannot be changed by the user. be able to. Hereinafter, an example of a system that has an interrupt table register but cannot be easily changed by a user will be described.

When an interrupt occurs, the trace program creates trace information by referring to the internal information and main memory of the CPU, and records it in the trace area. After that, the original interrupt table saved in the save area is referred to, and the address of the interrupt handler is obtained by the designated interrupt pointer. Then, the process shifts to the interrupt handler and performs an interrupt process. By repeating this sequence, trace information can be collected without any knowledge of the operating system.

In FIG. 3, the same reference numerals as those in FIG. 2 denote the same items. Reference numeral 11 denotes an original interrupt table saved in the save area. Reference numeral 15 denotes a trace interrupt table, which is created at an address held in the interrupt table register for collecting trace information. The pointer of each interrupt in the original interrupt table 11 points to the address of each interrupt handler, while the pointer in the trace interrupt table points to the area of the trace information collection program 511.

Reference numeral 54 denotes original interrupt table saving means for saving the original interrupt table. In the configuration of FIG. 3, for example, it is assumed that the interrupt table register 42 holds the address 80036400 of the original interrupt table 11 created by the operating system. When tracing, the original interrupt table is saved in a save area. Then, the trace interrupt table 11 is created at the address 80036400 before the original interrupt table 11 was saved. The pointer of the trace interrupt table 11 points to the area of the trace program.

When an interrupt instruction is given from the control unit 41, the trace interrupt table 15 is referred to according to the value of the interrupt table register 42. And
The corresponding interrupt information is acquired by the trace information acquisition program 511 and recorded in the trace recording area 61. Then, the original interrupt table 1 in the save area
1 is referenced to find the address where the designated interrupt handler is actually located, and the interrupt handler executes the interrupt.

FIG. 4 is a flow chart of the first and second embodiments of the present invention. FIG. 8 shows a flowchart of a trace after creating a trace interrupt table and switching to an original interrupt table.

S1 An interrupt occurs. S2 The trace interrupt table is referred to for the indicated interrupt. Then, the operation jumps to the area of the trace program by the pointer.

S3 If the interruption is to be traced, the tracing process is performed in S4. If the tracing is not performed, the process in S5 is performed. S4 The trace program acquires the trace of the designated interrupt, and records the trace information in the trace recording area.

In step S5, if the interrupt is not traced in step S3, or if the trace of the interrupt is completed in step S4, the original interrupt table is referenced for the designated interrupt, and the interrupt handler at the address indicated by the pointer is jumped. . Then, an interrupt process is executed by the interrupt handler.

FIG. 5 shows a third embodiment of the present invention. In the third embodiment of the present invention, a single step mode instruction (interrupt control for each instruction) can be traced in the single step mode in the first embodiment. is there.

Turning on the single step mode flag in the processor causes a step interrupt for each instruction. When the control flag is turned on by the trace program, a step interrupt occurs for each instruction, and the trace program acquires trace information. This is repeated for a series of instructions in the instruction sequence to acquire trace information for each instruction.

According to the third embodiment, in addition to the first embodiment in which the trace information is obtained for each interrupt, the trace information can be obtained for each instruction, so that it is possible to obtain the trace information of all the behaviors of the program. Become.

In FIG. 5, the same reference numerals as those in FIGS. 2 and 3 denote the same items. 44 is a single step flag, which is held in the control flag register 441. This holds a flag indicating whether or not instruction execution is performed in the single step mode (interrupt control for each instruction).

Reference numeral 55 denotes a single-step interrupt trace program for acquiring trace information for each instruction. 71 ′ is instruction 1, 72 ′ is instruction 2 and 73 is instruction n, and represents an instruction sequence in the single step mode.

The operation of the third embodiment shown in FIG. 5 will be described. In the single step mode, the flag indicating the single step mode is set to the single step flag 44.

When the CPU issues the instruction 1, a single-step interrupt occurs. The single-step interrupt trace program 5 which is a single-step interrupt handler is referred to by referring to the trace interrupt table 15.
5, the trace information of the instruction 1 is obtained and recorded in the trace recording area 61. And the instruction 1 is CPU
1 is executed. Furthermore, if the single step mode is continued, the single step control flag is kept set. In this manner, trace information up to the instruction n can be obtained.

When ending the trace in the single step, the single step interrupt trace program 5
5 turns off the single step control flag. In the configuration of FIG. 5, acquisition of trace information for each interrupt when the mode is not the single step mode is the same as in the first and second embodiments of the present invention in FIG.

FIG. 6 is a flowchart according to the third embodiment of the present invention. This is a flowchart after creating a trace interrupt table and switching to the original interrupt table.

S1 An interrupt occurs. S2 JUMP to the trace program with reference to the trace interrupt table.

S3: It is determined whether or not a trace of the interrupt is acquired. If a trace is obtained, a trace is performed in S4, and if the trace is not taken, the process of S5 is performed.

S4 Trace information is output to the trace recording area (if the interrupt in S1 is a single step interrupt, the instruction is traced in a single step). S5 It is determined whether it is a single step interrupt. If it is a single step interrupt, the process of S6 is performed, and if it is not a single step interrupt, the process of S8 is performed.

S6 The single step flag is controlled to determine whether or not to execute the single step with the next instruction. For the next instruction, if the single step is to be executed, the single step flag is kept set.

S7 Return to the interrupt source and wait for the next interrupt. S8 Single step flag control is performed to determine whether to execute single step or not to execute single step in the original interrupt handler. If single-step execution is to be performed, the single-step flag is left set. If not, the single-step flag is lowered.

S9 Referring to the original interrupt table, JUMP to the interrupt handler. FIG. 7 shows a fourth embodiment of the present invention, in which a system provided with a block trace mode (interrupt control for each branch instruction) traces an interrupt for each branch instruction.

In the fourth embodiment, in addition to the first or second embodiment, a trace is taken for each branch in the block trace mode. According to the fourth embodiment, the information of the branch instruction interrupt can be obtained, and the trace of the entire program can be easily obtained by matching with the program code.

In FIG. 7, the same reference numerals as those in FIGS. 2 and 3 denote the same items. Reference numeral 45 denotes a branch instruction interrupt control flag, which is held to indicate whether or not to perform branch instruction interrupt control.

Reference numeral 56 denotes a branch instruction interrupt trace program. The operation of the configuration of FIG. 7 will be described. It is assumed that the branch instruction interrupt control flag is set. When a branch instruction interrupt occurs, the trace interrupt table 15 is referred to, and the branch instruction control interrupt trace program 5
6 collects the trace information of the branch instruction interrupt and records it in the trace recording area 61. Then, the branch instruction is executed by the CPU.

In the configuration of FIG. 7, the trace of the interrupt other than the branch instruction interrupt is the same as in the first or second embodiment of the present invention shown in FIG. FIG. 8 is a flowchart for taking a trace of the branch instruction interrupt control.

S1 An interrupt occurs. S2 JUMP to the trace program with reference to the trace interrupt table.

S3: It is determined whether or not a trace of the interrupt is acquired. If a trace is obtained, a trace is performed in S4, and if the trace is not taken, the process of S5 is performed.

S4 Trace information is output to the trace recording area (if the interrupt in S1 is a branch instruction interrupt, a trace of a branch instruction interrupt is taken). S5 Determine whether it is a branch instruction interrupt. If it is a branch instruction interrupt, the process at S6 is performed, and if it is not a branch instruction interrupt, the process at S8 is performed.

S6: A branch instruction interrupt control flag is set to determine whether or not to execute the branch instruction interrupt control. If the branch instruction interrupt control is to be performed, the branch instruction interrupt control flag is kept set. If the branch instruction interrupt control is not performed, the branch instruction interrupt control flag is lowered.

S7 Return to the interrupt source and wait for the next interrupt. S8: A branch instruction interrupt control flag is set to determine whether or not to perform branch instruction interrupt control in the original interrupt handler. If the branch instruction interrupt control is to be performed, a branch instruction interrupt control flag is set. If the branch instruction interrupt control is not performed, the flag is lowered.

S9 JUMPs to the interrupt handler with reference to the original interrupt table. FIG. 9 shows a fifth embodiment of the present invention.

The fifth embodiment is directed to a system having a multitask function and capable of performing single-step interrupt control for each task. In such a system, depending on whether a single step control flag stored for each task is set or not (enable or disable the control flag), an arbitrary task may or may not generate an interrupt. it can.

In the fifth embodiment, trace information is collected by a single step interrupt in an arbitrary task. A flag indicating whether or not to perform the single step control for each task is set. Then, when the task is switched by the task switching, the flag is reflected, and it is determined whether or not the trace is taken by the single step control.

As described above, only the designated task can collect trace information by a single step, and the other tasks can be processed in real time as in the normal case.

In FIG. 9, the same reference numerals as those in the other drawings denote the same parts. 25 is a task management table. Reference numeral 441 denotes a control flag register which holds a control flag.

Reference numeral 57 denotes a task trace program.
In the configuration of FIG. 9, for example, since the single-step control flag of the task management table 25 is on for the tasks A and B, a single-step interrupt occurs when the execution is switched to the tasks A and B. Then, the trace interrupt table 15 is referred to, and the single-step interrupt trace program 55 and the task trace program 57 can acquire the interrupt information of the tasks A and B (information indicating that the tasks A and B have been processed).

The method of acquiring trace information on other interrupts is the same as in the first, second, or third embodiment of the present invention. FIG. 10 is a flowchart according to the fifth embodiment of the present invention.

S1 An interrupt occurs. S2 JUMP to the trace program with reference to the trace interrupt table.

S3: It is determined whether to acquire the trace information of the interrupt. If it is necessary to acquire the trace information, the process of S4 is performed, and if it is not necessary to acquire the trace information, the process of S5 is performed.

S4 Outputs the tray information to the trace area. If it is not necessary to acquire the S5 trace information or if the trace information of S5 is output to the trace recording area,
Determine whether it is a single step interrupt. If it is a single step interrupt, the process of S6 is performed, and if it is not a single step interrupt, the process of S8 is performed.

S6 It is determined whether a single step interrupt is to be performed in the next step. Performs single-step interrupt flag control. That is, if a single step interrupt is to be performed in the next step, the single step flag is kept set, and if the single step interrupt is not to be performed, the single step flag is lowered.

S7: Return to the interrupt source and wait for the next interrupt. S8 If not a single step interrupt in S5, a single step flag control for the original interrupt handler is performed. In the processing of the original interrupt handle, a single step flag is set if single step control is performed, and a single step flag is not set if single step control is not performed.

S9 JUMP to the interrupt handler with reference to the original interrupt table. FIG. 11 shows a sixth embodiment of the present invention.

FIG. 11 shows a system in which the user can easily perform trace control for each predetermined task in a system having a multi-task function and which cannot be easily controlled by the user through flag management for single-step interrupt control. It was made.

The task switching is performed at a specific instruction or a specific interrupt. Recognizing this task switching, the task number is checked, and trace information of only necessary tasks is obtained.

By setting a single instruction to generate a single step interrupt for a specific instruction, task switching can be recognized, and trace information can be obtained by a step interrupt for each instruction only for a necessary task.

In this way, only the designated task can collect trace information in the single step control.
Other tasks can perform normal processing in real time.

In FIG. 11, the same reference numerals as those in the other drawings indicate the common parts. A task management table 25 has a task and a task number. Reference numeral 58 denotes a task switching determination unit, which determines task switching in the operating system 21.

Reference numeral 59 denotes a task number determining unit for determining the number of the task switched. Reference numeral 592 denotes a task number holding unit which holds a task number of a task to be traced.

The operation of the sixth embodiment of the present invention shown in FIG. 11 will be described. In FIG. 11, the operating system 2
1 controls to process a task recorded in the task management table 25.

In the trace program 51, the task switching determination section 58 determines the task switching under the control of the operating system 21 and the switched task number. The task number determining unit 59 refers to the task number holding unit 592 and determines whether it is necessary to acquire trace information of the switched task. Then, if it is necessary to acquire the trace information, it acquires the trace information and outputs it to the trace recording area. Also, at this time, if tracing in single step is necessary, a single step control flag is set in the control flag register 441, a single step interrupt is traced by the single step control trace program, and the trace is recorded in the trace recording area.

FIG. 12 is a flowchart according to the sixth embodiment of the present invention. An S1 interrupt occurs. S2 JUMP to the trace program with reference to the trace interrupt table.

S3 Recognizes task switching and determines the task number. If the number matches the number recorded in the task number determination unit, the process of S4 is performed, and if not, the process of S11 is performed.

In step S4, it is determined whether or not to acquire the trace information of the interrupt. If so, the process in step S5 is performed, and if not, the process in step S6 is performed. S5 Output the trace information to the trace area.

S6: Determine whether a single step interrupt occurs. If it is a single step interrupt, the process of S7 is performed, and if it is not a single step interrupt, the process of S9 is performed.

S7 It is determined whether a single step interrupt is to be performed in the next step, and a single step interrupt flag is controlled. That is, if a single step interrupt is to be performed in the next step, the single step flag is kept set, and if the single step interrupt is not to be performed, the single step flag is lowered.

S8: Return to the interrupt source and wait for the next interrupt. S9 Single step flag control for the original interrupt handler is performed. Perform single control step flag control. In the processing of the original interrupt handler, set the single step flag if you want to perform single step control, and if you do not perform single step control,
Do not set the single step flag.

S10 JUMPs to the interrupt handler with reference to the original interrupt table. If the numbers do not match in S11 S3, it is determined whether or not the single interrupt control is performed. If it is the single step control, the process of S12 is performed, and if it is not the single step control, the process of S13 is performed.

S12 The single step flag is forcibly turned off. S13 Return to the interrupt source. S14 JUMP to the interrupt handler with reference to the original interrupt table.

FIG. 13 shows a seventh embodiment of the present invention. The seventh embodiment is a system in which a kernel space in which an operating system operates (an area protected from being rewritten by a user) and a user space (an area usable by a user) are separated. The present invention relates to a system that can transition from user space to kernel space by interruption.

The application program shifts to the operating system by interruption. For example,
When a hardware interrupt or a system call (software interrupt) to the operating system occurs while running in the user space, the operation immediately shifts to the kernel space. By utilizing this operation, trace information only in the user space or only in the kernel space can be acquired. In the seventh embodiment, trace information only in the user space is obtained.

In the user space, trace information is acquired by an interrupt or a single step mode. However, until transition to the kernel space and return to the user space, collection of trace information by the interrupt or suppression of the interrupt by the single step mode are performed. Collects trace information only for application programs,
The operating system can be operated in a normal mode.

FIG. 13 shows a seventh embodiment of the present invention. In FIG. 13, the same reference numerals as those in the other drawings indicate the common parts. A user space tracing program 71 determines a transition from the user space to the kernel space and a return from the kernel space to the user space.

In FIG. 13, the OS transition interrupt determination program determines a transition from the user space to the kernel space and a return from the kernel space to the user space. Then, processing in the kernel space is performed by a normal method, and in the user space, trace information is obtained based on an interrupt. This tracing method is the same as that of the first or second embodiment of the present invention shown in FIG. Further, the single step mode can be set, and trace information can be obtained for each instruction by a single step interrupt. In this case, the operation is the same as the operation of the third embodiment of the present invention.

By performing trace control as described above, trace information is acquired only in the user space, and acquisition of trace information in the kernel space is suppressed. FIG.
Is a flowchart according to the seventh embodiment of the present invention.

S1 An interrupt is generated. S2 JUMP to the trace program with reference to the trace interrupt table.

S3: It is determined whether or not the interrupt source is the user space. If it is a user space, the process of S4 is performed because it is a target to be traced. If an interrupt occurs not in the user space but in the operating system space (kernel space), no trace is taken, so the process of S11 is performed.

S4: It is determined whether the trace information of the interrupt is obtained. If it is necessary to acquire the trace information, the process of S5 is performed, and if it is not necessary to acquire the trace information, the process of S6 is performed.

S5 Outputs trace information to the trace area. If it is not necessary to acquire the S6 trace information, or if the trace information of S6 is output to the trace recording area,
The single-step control flag is determined, and it is determined whether the mode is the single-step interrupt mode. If it is a single step interrupt, the process of S7 is performed, and if it is not a single step interrupt, the process of S9 is performed. S7 It is determined whether a single step interrupt is to be performed in the next step, and the single step interrupt flag is controlled. That is, the single step flag is kept set if a single step interrupt is to be performed in the next step, and the single step flag is lowered if the single step interrupt is not to be performed.

S8: Return to the interrupt source and wait for the next interrupt. S9 If it is determined in S6 that the interrupt is not a single step interrupt, a single step flag control for the original interrupt handler is performed. If single-step control is performed in the processing of the original interrupt handler,
If the single step flag is set and the single step control is not performed, the single step flag is not set.

S10 JUMPs to the interrupt handler with reference to the original interrupt table. S11 In S3, no trace is taken because the interrupt source is not in the user space. Therefore, it is determined whether the interrupt is a single step interrupt. If it is a single step interrupt, S12
If the processing is not a single step interrupt, the processing of S14 is performed.

S12: The single step flag is forcibly turned off so as not to perform the single step control. S13 Return to the interrupt source.

S14 Referring to the original interrupt table, JUMP to the interrupt handler, and the interrupt handler processes the interrupt. FIG. 15 shows an eighth embodiment of the present invention.

Embodiment 8 of the present invention traces only interrupts in the kernel space and does not trace interrupts in the user space. Except for this point, it is the same as the seventh embodiment of the present invention.

In FIG. 15, the same reference numerals as those in the other drawings denote the same parts. Reference numeral 72 denotes a kernel space tracing program for determining a shift to the kernel space and a return to the user space.

FIG. 16 is a flowchart according to the eighth embodiment of the present invention. The process is the same as the flowchart in FIG. 14 except that it is determined in S3 whether the interrupt source is in the kernel space.

FIG. 17 shows an embodiment of the system configuration of the present invention. In FIG. 17, reference numeral 81 denotes a computer.

Reference numeral 82 denotes a CPU. 83 is a main memory. 84 is an input / output interface.

Reference numeral 85 denotes an internal auxiliary storage device such as an internal magnetic disk device. Reference numeral 86 denotes an operation program loaded in the internal auxiliary storage device. Reference numeral 87 denotes an application program loaded in the internal auxiliary storage device.

Reference numeral 88 denotes a trace program of the present invention loaded in the internal auxiliary storage device. Reference numeral 91 denotes a drive device, which is a device for loading a program of the storage medium 92 into a computer.

Reference numeral 92 denotes a storage medium, such as a magnetic disk device or a CDROM, for storing the trace program of the present invention. 93 is an external auxiliary storage device.

In the configuration of FIG. 17, when implementing the present invention, the trace program of the present invention stored in the storage medium is loaded into the computer 81, and the trace of the application program or operating system for collecting the trace is taken. .

FIG. 18 shows an embodiment of the storage medium of the present invention. The trace program of the present invention is stored in a storage medium. As the storage medium, a magnetic storage medium such as a magnetic disk device, an optical storage medium such as a CDROM, or a storage medium capable of storing a program can be used.

[0129]

According to the present invention, trace information can be easily obtained without modifying the hardware, operating system, or application program. In addition, since tracing for each instruction can be performed in the single step mode, tracing of all behaviors of the system is possible.

It is also possible to perform a trace in which the task or space (user space, kernel space) to be traced is narrowed. Since the trace program can be dynamically loaded or unloaded, the trace can be collected at any time in any system. Therefore, according to the present invention, arbitrary trace information can be collected in any environment of the user without stopping or changing the system.

The following items are further disclosed in the above description. (1) A program trace device in a system that includes interrupt information holding means for holding information on an interrupt means, refers to the interrupt information holding means when an interrupt occurs, obtains position information of the interrupt means, and performs interrupt processing. And an original interrupt information holding means for holding position information of the interrupt means, and a trace means for obtaining trace information of a program, wherein the trace means obtains trace information by referring to internal information and main memory of the CPU. Trace information collecting means, and trace interrupt information creating means for creating trace interrupt information holding means for holding position information of the trace information collecting means, wherein the interrupt information holding means to be used when collecting trace information is provided. For trace from the original interrupt information holding means When the interrupt occurs, the trace information collecting means corresponding to the position information of the generated interrupt held in the trace interrupt information holding means refers to the internal information and main memory of the CPU. A program tracing device for collecting trace information by using a computer.

(2) The system is capable of interrupt control for each instruction, and traces information for each instruction by generating a trap interrupt for each instruction. (1) The program trace device according to the paragraph.

(3) The system is a system capable of controlling for each branch interrupt, and traces information for each branch block by generating a trap interrupt for each branch. (2) The program trace apparatus according to (2).

(4) The system has a multitask function capable of holding interrupt control information for each task and performing interrupt control for each instruction or each branch instruction in a task unit. The program trace apparatus according to the above mode (1), (2) or (3), wherein trace information is obtained only for a predetermined task by setting interrupt control.

(5) The system is provided with a multitask function for holding a unique number for each task. When a task is switched, the tracing means recognizes the switched task number and traces. The program tracing device according to the above mode (1), (2) or (3), wherein if the task is a task, the trace information is obtained by acquiring the trace information only for a predetermined task.

(6) In the system, a kernel space in which an operation system operates and a user space in which an application program operates are separated, and an interrupt instruction is used for calling from the user space to the kernel space. (1) that recognizes the transition from the user to the kernel space and the return to the user space, and traces only to the user space or the kernel space.
Item or the program tracing device according to item (2) or (3).

[Brief description of the drawings]

FIG. 1 is a diagram showing a basic configuration of the present invention.

FIG. 2 is a diagram showing a first embodiment of the present invention.

FIG. 3 is a diagram showing a second embodiment of the present invention.

FIG. 4 is a diagram showing a flowchart of Embodiments 1 and 2 of the present invention.

FIG. 5 is a diagram showing a third embodiment of the present invention.

FIG. 6 is a diagram showing a flowchart of a third embodiment of the present invention.

FIG. 7 is a diagram showing a fourth embodiment of the present invention.

FIG. 8 is a diagram showing a flowchart of a fourth embodiment of the present invention.

FIG. 9 is a diagram showing a fifth embodiment of the present invention.

FIG. 10 is a diagram showing a flowchart of a fifth embodiment of the present invention.

FIG. 11 shows a sixth embodiment of the present invention.

FIG. 12 is a diagram showing a flowchart of a sixth embodiment of the present invention.

FIG. 13 is a diagram showing a seventh embodiment of the present invention.

FIG. 14 is a diagram showing a flowchart of a seventh embodiment of the present invention.

FIG. 15 is a diagram showing an eighth embodiment of the present invention.

FIG. 16 is a view showing a flowchart of the eighth embodiment of the present invention.

FIG. 17 is a diagram showing an embodiment of a system configuration of the present invention.

FIG. 18 is a diagram showing an embodiment of a storage medium of the present invention.

[Description of Signs] 1: Original interrupt information holding means 2: Trace interrupt information holding means 3: Operating system 4: Interrupt means 5: Trace means 6: Trace interrupt information creating means 7: Trace recording area 8: Application program 9 ： Control means

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Koichi Kumon 4-1-1, Kamidadanaka, Nakahara-ku, Kawasaki-shi, Kanagawa F-term in Fujitsu Limited (Reference) 5B042 AA03 BB23 BB25 CC11 DD06 EA03 EA18 FD01 FD07

Claims (5)

[Claims] 1. A program in a system, comprising: interrupt information holding means for holding information on an interrupt means, wherein when an interrupt occurs, position information of the interrupt means is obtained by referring to the interrupt information holding means and interrupt processing is performed. A tracing device, comprising: original interrupt information holding means for holding position information of the interrupt means; and tracing means for acquiring trace information of the program, wherein the tracing means refers to the internal information and the main memory of the CPU for the trace information Trace information collecting means for acquiring the position information of the trace information collecting means, and trace interrupt information creating means for creating the trace interrupt information holding means for holding the trace information collecting means, and holding the interrupt information used when collecting the trace information From the original interrupt information holding means. Switch to the race interrupt information holding means, and when an interrupt occurs, refer to the internal information and main memory of the CPU by the trace information collecting means corresponding to the position information of the generated interrupt held in the trace interrupt information holding means. A program tracing device, which collects trace information by performing a program. 2. The system according to claim 1, further comprising: an interrupt table register for holding an address of an area of the interrupt information holding means. 2. The program tracing apparatus according to claim 1, wherein when the trace information is collected, the value of the interrupt table register is changed from the address A to the address B when the trace information is collected. 3. The system according to claim 1, further comprising means for saving the original interrupt information holding means in a save area. When collecting trace information, the original interrupt information holding means is saved in a save area, and before the original interrupt information holding means is saved. 2. The program tracing apparatus according to claim 1, wherein a trace interrupt holding unit is created at a given address. 4. A program tracing method in a system for holding interrupt information on an interrupt means, referring to the interrupt information when an interrupt occurs, obtaining position information of the interrupt means, and performing an interrupt process. Holds the original interrupt information that holds the position information. Creates and holds the trace interrupt information that holds the position information of the trace information collection means. When acquiring the trace information, the trace interrupt information is obtained by referring to the original interrupt information. When an interrupt occurs, trace information is collected by referring to the internal information and main memory of the CPU by a trace information collecting means corresponding to the position information of the interrupt in which the trace interrupt information has occurred. Program tracing method. 5. A system which holds interrupt information for holding information on an interrupt program, refers to the held interrupt information when an interrupt occurs, obtains position information of the interrupt program, and performs interrupt processing. A storage medium storing a trace program, comprising: a trace program for acquiring trace information of the program; the trace program comprising: a trace information collection program for acquiring trace information by referring to internal information and main storage of a CPU; Includes a trace interrupt information creation program that creates and holds the location information of the collection program. When acquiring trace information, switches from referencing the original interrupt information that has the location information of the interrupt means to referring to the trace interrupt information, and interrupts Departs When born
The trace information collection program corresponding to the position information of the interrupt where the trace interrupt information occurred generates a CPU
A storage medium for storing a trace program for collecting trace information by referring to internal information and a main storage of the storage medium.