JP2000069479A - Picture encoding device/method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To execute the appropriate encoding of an MPEG2 system even if the scanning format of an input video signal and the general scanning system of the input video signal are different from each other. SOLUTION: A flag showing whether the rough scanning system of an image pickup method or a projection method on an input video signal is sequential scanning or skip scanning is prepared. An encoding part control circuit 16 receives the flag and outputs a control signal for switching the DCT encoding mode of the discrete cosine transformation(DCT) encoding circuit 102 of an encoding part 100, the inverse DCT encoding mode of an inverse DCT encoding circuit 105 and the movement compensation prediction mode of a movement compensation circuit 108. The encoding part 100 receives the control signal and switches the DCT encoding mode, the inverse DCT encoding mode and the movement compensation prediction mode.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image coding apparatus and method for compressing and coding an input video signal with high efficiency.

[0002]

2. Description of the Related Art For recording and reproducing video signals on a recording medium such as a disk, and transmitting the video signals by terrestrial television broadcasting, satellite television broadcasting, cable television broadcasting, and the like.
When a video signal is transmitted through a transmission medium having a limited transmission capacity, the video signal is compressed and transmitted in order to effectively use the limited transmission capacity.

FIG. 5 is a block diagram showing an image coding circuit of the MPEG system which has been widely used as this type of compressed image coding system.

[0004] The input video signal Vi is supplied to a pre-filter 11 and band-limited to a predetermined frequency band based on a signal from a rate control circuit 14. Prefilter 11
Are supplied to the preprocessing circuit 12, where the image order for performing the motion compensation processing is changed, and the raster signal is converted from a raster scan to a block scan. That is, in this example, raster scan format image data in units of horizontal scanning lines is converted into block scan format image data in units of blocks of, for example, horizontal × vertical = 8 pixels × 8 pixels.

[0005] The block scan format image data from the preprocessing circuit 12 is supplied to an MPEG2 coding unit 100. In the encoding unit 100, DCT (Discrete) is passed through a subtraction circuit 101 for obtaining a prediction error signal.
e Cosine Transform (discrete cosine transform). The DCT coding circuit 102 converts a signal in a time axis domain into a DCT coefficient in a frequency domain with respect to data in a block unit (a prediction error signal in a P picture and a B picture to be subjected to field / interframe predictive coding). I do.

[0006] The DCT coefficient, which is the result of the operation performed by the DCT encoding circuit 102, is supplied to a quantization circuit 103 and quantized. The output of the quantization circuit 103 is supplied to the variable-length encoding circuit 2 as an output of the encoding unit 1, and is also supplied to a circuit unit for motion compensation processing as described below.

That is, for the motion compensation processing, the output of the quantization circuit 103 is supplied to the inverse quantization circuit 104 and the inverse DC
The difference information is returned to the original difference information by the T encoding circuit 105 and supplied to the addition circuit 106. This addition circuit 106 includes:
The prediction data of the corresponding block of the previous frame or the previous field from the motion compensation circuit 108 through the switch circuit 110 is supplied, and the prediction data of the current frame or the previous field is obtained. That is, the addition circuit 106
, The locally decoded data is obtained, and the locally decoded data is stored in the frame memory 107.

A motion vector detecting circuit 109 calculates a motion vector for generating a predicted image signal by performing motion compensation by a motion compensating circuit 108 from the image data from the preprocessing circuit 12 and the image data in the frame memory 107.

The motion compensation circuit 108 includes a frame memory 1
07, using the motion vector from the motion vector detection circuit 109 to perform motion compensation on the locally decoded image data, and to the subtraction circuit 101 a predicted image signal of the next frame supplied from the pre-processing circuit. Generate Then, the predicted image signal is supplied to the subtraction circuit 101 through the switch circuit 110.

The switch circuit 110 is connected to the terminal a when performing field / interframe predictive coding in response to a switching control signal from a control circuit (not shown), and supplies the output of the motion compensation circuit 108 to the subtraction circuit 101. I do.

In the block for performing the intra-frame / in-frame encoding process, the switch circuit 110 is switched to the terminal b, and the data supplied to the subtraction circuit 101 is set to zero. That is, in this case, the subtraction circuit 101 does not perform the difference operation.

The image data compressed and coded as described above is supplied from the quantization circuit 103 to the variable length coding circuit 111.
The variable-length encoding circuit 111 performs variable-length encoding using, for example, Huffman code, and outputs the output data Vo through the buffer memory 13 for controlling the transmission amount.

The rate control circuit 14 includes a buffer memory 1
3 to monitor the data occupation state, and controls the quantization value of the quantization circuit 103 according to the detected data occupation state. As a result, the output transmission rate of the output image data Vo is stabilized, and the output image data Vo is controlled so as to effectively utilize the transmission capacity. Further, the rate control circuit 14 includes the pre-filter 11
Control the amount of bandwidth limitation.

The encoder control circuit 15 includes an encoder 100
Control of encoding processing timing, parameter setting,
The motion vector search range of the motion vector detection circuit 109 is set.

Although not shown, information on the motion vector detected by the motion vector detection circuit 109 is transmitted together with the encoded output data Vo.

In the conventional image encoding apparatus shown in FIG. 5, the DCT encoding mode in the encoding section 100 is switched based on the signal format (image scanning method) of the input video signal Vi.

That is, when the input video signal format is the interlaced scanning method (the imaging and projection methods are also images of the interlaced scanning method), the field DCT and the frame DCT are adaptively switched on a macroblock basis. Switching is performed adaptively as follows.

For the data in each macroblock, the sum of squares VAR1 of the difference values between adjacent pixels in the frame in the vertical direction
And the sum of squares V of the difference value between adjacent pixels in the field in the vertical direction
AR2, and VAR1> VA
In the case of R2, it is switched to the field DCT assuming that the intra-field vertical correlation is high, and in the case of VAR1 <VAR2, it is switched to the frame DCT assuming that the intra-frame vertical correlation is high.

Generally, in the interlaced scanning image, when the vertical correlation in the field is high, the image is a moving image, and when the vertical correlation in the frame is high, the image is a stationary image.

The above-mentioned switching method is described in the reference "Television Society Journal, Vol. 49, No.
4, pp. 435-466 (1995) "3MPEG
Encoding system 3-2 Video compression "Yasuyuki Nakajima, Toshinori Otaka, Katsumi Tahara" is detailed.

Conventionally, when the input video signal format is progressive scanning (the imaging and projection methods are progressive scanning images), the DCT encoding mode is switched to frame DCT.

[0022]

Therefore, when the input video signal format is interlaced scanning, the image pickup or projection method is a progressive scanning image, and the scanning line is converted and interleaved as shown in FIG. In the case of a signal format of scanning (in FIG. 6, S1,
S2, S3... Each indicate a horizontal scanning line), the DCT coding mode is an adaptive mode in which the frame DCT and the field DCT are adaptively switched as described above. That is, since the image is originally a progressively scanned image, where the frame DCT should be applied,
Since the processing in the adaptive mode is performed, the coding efficiency is reduced, and the coding is thereby deteriorated.

When the input video signal format is a progressive scan, the image pickup or projection method is an interlaced scan image, which is converted to a scan line and converted into a progressive scan signal format. Even if DC
The T encoding mode is the frame DCT mode as described above. That is, since an image is originally an interlaced scan image, an adaptive mode for adaptively switching between the field DCT and the frame DCT should be applied. However, since processing is performed only by the frame DCT, the coding efficiency is reduced and the code resulting therefrom is reduced. Deterioration occurs.

The present invention solves the above-mentioned problems, and enables selection of an appropriate DCT coding mode according to a large-format scanning method such as an imaging method or a projection method. An object of the present invention is to suppress coding deterioration due to the above.

[0025]

In order to solve the above problems, an image encoding apparatus according to the present invention generates an encoding section for compressing and encoding an input video signal and a control signal for controlling the encoding section. An encoding unit control circuit, wherein the encoding unit is capable of switching between a frame mode of a frame DCT and an adaptive mode for adaptively switching between the frame DCT and the field DCT; A quantizing circuit for quantizing data DCT-encoded by the circuit, an inverse quantizing circuit for inversely quantizing output data of the quantizing circuit, and the frame mode according to mode switching of the DCT encoding circuit. An inverse DCT encoding circuit that performs an inverse DCT process on output data of the inverse quantization circuit by switching to the adaptive mode, the frame mode, and the adaptive mode. And a motion compensation circuit that performs motion compensation prediction by switching to a mode corresponding to the mode. In response to the flag indicating whether or not scanning is performed, the DC
A control signal for performing the mode switching of the T encoding circuit, the inverse DCT encoding circuit, and the motion compensation circuit is output.

According to the image coding apparatus of the present invention having the above-described configuration, a flag is provided to indicate whether a large-scale scanning method such as an imaging method or a projection method for an input video signal is sequential scanning or interlaced scanning. The flag allows the coding unit control circuit to appropriately set the DCT coding mode and the motion compensation prediction mode of the coding unit.

[0027]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of an image coding apparatus and method according to the present invention.

FIG. 1 is a block diagram of an image coding apparatus according to this embodiment. In FIG. 1, an encoding unit 100
Has exactly the same configuration as the encoding unit 100 of FIG. 5 described above. Also, a pre-filter 11, a buffer amplifier 13,
The rate control circuit 14 is configured in exactly the same manner as in the example of FIG.

The DCT coding circuit 102 of the coding unit 100
Has a switchable mode between a frame DCT mode and an adaptive mode in which the frame DCT and the field DCT are adaptively switched in macroblock units as described above. Further, the inverse DCT encoding circuit 102 is switchably provided with a frame inverse DCT mode and an adaptive mode in which the frame inverse DCT and the field inverse DCT are adaptively switched in macroblock units as described above. In addition, the motion compensation circuit 108 is switchably provided with a frame motion compensation prediction mode and an adaptive mode for adaptively switching between the frame motion compensation mode and the field motion compensation mode.

As shown in FIG. 1, in this embodiment, regardless of the format of the input video signal Vi, a large-scale scanning method for the input video signal Vi, for example, an imaging method or a projection method is performed by sequential scanning. Or a flag indicating whether it is interlaced scanning, and based on this,
The DCT coding circuit 102, the inverse DCT coding circuit 105, and the motion compensation circuit 108 of the coding unit 100 are each switched to an appropriate mode.

In the embodiment of FIG. 1, three flags FL
G1, FLG2, and FLG3 are prepared. Flag FLG1
Is a flag set by the user according to whether the imaging method or projection method for the input video signal Vi is sequential scanning or interlaced scanning. Also, the flag FLG2
Are superimposed in the vertical blanking period of the input video signal Vi, and are extracted by the preprocessing circuit 12. Further, the flag FLG3 is a flag that is input to the image encoding device together with the input video signal Vi.

These flags FLG1, FLG2, FL
G3 is “1” when the imaging method or the projection method for the input video signal Vi is a progressive scan, and is “0” when the interlaced scan is performed.

The flag FLG2 superimposed in the vertical blanking period of the input video signal Vi may be separated by a synchronization signal separation circuit (not shown) instead of being extracted by the preprocessing circuit 12. .

The above three flags FLG1, FLG2,
FLG3 is supplied to the selection circuit 17. Selection circuit 17
Are the three flags FLG1, FLG2, FLG3
Output flag F
LG0. The selection circuit 17 has three flags FLG
When none of FLG1, FLG2 and FLG3 is supplied, the output flag FLG0 of the selection circuit 17 is set to "2". The output flag FLG0 of the selection circuit 17 is supplied to the encoding unit control circuit 16.

The encoder control circuit 16 of this embodiment
Is a control of the encoding processing timing of the encoding unit 100;
In addition to setting the parameters and setting the motion vector search range of the motion vector detection circuit 109, the DFT of the DCT encoding circuit 102 is performed based on the flag FLG0 input thereto.
CT encoding mode and the inverse D of the inverse DCT encoding circuit 105
A control signal Cs for controlling the CT encoding mode and the motion compensation prediction mode of the motion compensation circuit 108 is supplied to the encoding unit 100.

If the flag FLG0 input thereto indicates that the imaging method or the projection method for the input video signal Vi is sequential scanning, the control signal Cs is, for example, It is set to “1”, and the DCT coding circuit 102, the inverse DCT coding circuit 105, and the motion compensation circuit 108 of the coding unit 100
Control is performed to set each mode of CT, frame inverse DCT, and frame motion compensation prediction.

When the flag FLG0 input thereto indicates that the imaging method or the projection method for the input video signal Vi is interlaced scanning, the control signal Cs is , For example, is set to “0”, and the DCT coding circuit 102 of the coding unit 100
The T encoding circuit 105 and the motion compensation circuit 108 are controlled to be in the respective modes of frame / field adaptive DCT, frame / field adaptive inverse DCT, and frame / field motion compensation prediction.

The selection circuit 17 has three flags FLG1, FLG
If neither LG2 nor FLG3 is input,
Since the flag FLG0 from the selection circuit 17 becomes “2”, the encoding unit control circuit 16
Controls the DCT coding mode, the inverse DCT coding mode, and the motion compensation prediction mode of the coding unit 100 based on the format of the input video signal Vi in the same manner as in the related art.

That is, when the format of the input video signal Vi is a progressive scan, the control signal Cs from the encoder control circuit 16 is set to “1”,
The CT encoding circuit 102, the inverse DCT encoding circuit 105, and the motion compensation circuit 108 are controlled to be in the frame DCT, frame inverse DCT, and frame motion compensation prediction modes, respectively.

When the format of the input video signal Vi is interlaced scanning, the control signal Cs from the encoder control circuit 16 is set to “0”,
The CT encoding circuit 102, the inverse DCT encoding circuit 105, and the motion compensation circuit 108 are respectively provided with a frame / field adaptive DCT, a frame / field inverse DCT,
Control is performed to set each adaptive mode of field adaptive motion compensation prediction.

Therefore, when any of the flags FLG1 to FLG3 is input to the selection circuit 17, the input video signal V is independent of the format of the input video signal Vi.
The encoding unit control circuit 16 appropriately switches the encoding unit 100 between the DCT encoding mode, the inverse DCT encoding mode, and the motion compensation prediction mode depending on whether the imaging method or the projection method is sequential scanning or interlaced scanning for i. Control.

For this reason, when the imaging method or the projection method is sequential scanning with respect to the input video signal Vi, even if the format of the input video signal Vi is interlaced scanning, the DCT encoding circuit 102 of the encoding section 100 and the inverse DC
In the T encoding circuit 105, frame DCT and frame inverse DCT are performed, and in the motion compensation circuit 108, frame motion compensation prediction is performed, so that a decrease in encoding efficiency and encoding deterioration can be suppressed.

When the imaging method or the projection method is interlaced scanning for the input video signal Vi, even if the format of the input video signal Vi is sequential scanning, the DCT coding circuit 102 of the coding unit 100 and the inverse DCT code In the conversion circuit 105, a frame / field adaptive DCT,
Frame / field adaptive inverse DCT is performed, and frame / field motion compensation prediction is performed in the motion compensation circuit 108, so that a reduction in coding efficiency and coding deterioration can be suppressed.

As described above, according to the above-described embodiment, the sequential scanning / interlaced scanning of the input video signal format is different from the sequential scanning / interlaced scanning of the imaging method or the projection method for the input video signal. In this case, the encoding unit is controlled by inputting a flag indicating the sequential scanning / interlaced scanning of the imaging method or the projection method of the input video signal, thereby suppressing a decrease in encoding efficiency and a resulting degradation in encoding. Thus, a high-quality image encoding device can be provided.

When converting (telecine), for example, a movie of 24 frames into a video signal, a two-field or three-field video signal is generated from the same command as shown in FIG. This is called a 3-2 pull-down method. When reproducing this video signal in a progressive scanning television, if there is information as to which command generated the field, scanning line interpolation can be appropriately performed, and the quality is improved. Therefore, during the vertical blanking period of the video signal, the field generated from the same frame as the previous field is “frame continuous”, and when generated from a different frame, the pull-down information is superimposed and transmitted as “frame change”. It is thought that.

In FIG. 2, "0" in the pull-down information indicates "frame change" and "1" indicates "frame continuous".

Therefore, the video signal obtained by the telecine conversion has an interlaced scanning format, but the telecine image is originally a progressively scanned image having a frame rate of 24 Hz. Therefore, when the input video signal Vi is a telecine image signal, the flag (flag FLG2) can be generated in the preprocessing circuit 12, for example, using the pull-down information in the vertical blanking period. Instead of the pre-processing circuit 12, a circuit combining a synchronization signal separation circuit and a pull-down information detection circuit may of course be provided separately.

For this reason, originally, the frame rate 24
When a telecine image signal, which is a progressively scanned image of 1 Hz, is input to the image encoding device of FIG.
Is selected and used by the selection circuit 17, it can be understood that the image is originally a progressive scanning image. Based on this, the encoding unit 100 performs frame DCT, frame inverse DCT, and frame motion compensation prediction.

By the way, animation of progressive scanning, CG (computer graphics), and film image created at a frame rate of 30 Hz are also transmitted in the interlaced scanning image format. In many cases, the pull-down information as described above is not set for these pieces of image information. The flag FLG3 can be set if the user has grasped the information on the large-size scanning method. However, this is not only troublesome, but it is usually difficult to grasp the information on the large-size scanning method. .

Therefore, in this embodiment, when such a progressively scanned image having a frame rate of 30 Hz is transmitted in the interlaced scanning image format, an image discriminating apparatus as shown in FIG. 3 is used. It is determined that the main scanning method is the progressive scanning method, and the flag FL is determined.
G is generated.

That is, in the image discriminating apparatus shown in FIG. 3, input image data in the interlaced scanning format is input to the vertical low-pass scanning line conversion filter 21. The vertical low-pass scanning line conversion filter 21 converts input image data in the interlaced scanning format into image data in a progressive scanning format in which the number of scanning lines per frame is reduced to half or less.

The image data from the vertical low-pass scanning line conversion filter 21 is delayed by one frame time in the frame memory 22 and supplied to the difference calculator 23, and is also supplied to the difference calculator 23 as it is. The difference calculator 23 calculates a difference between the image data from the vertical low-pass scanning line conversion filter 21 and the image data from the frame memory 22. The output of the difference calculator 23 is the intra-frame integration circuit 2
4 is supplied.

The intra-frame integration circuit 24 is provided with the difference calculator 2
3 are integrated in one frame. Then, the integrated value is supplied to the comparator 25. The comparator 25 compares the output of the intra-frame integration circuit 24 with a threshold. This comparator 2
The output of 5 is supplied to the decision circuit 26. Judgment circuit 26
Determines from the output of the comparator 25 whether or not the input image data is image data in which the progressively scanned image is in the interlaced scanning format, and a flag (30H
z sequential flag) is output.

Therefore, originally the frame rate 3
When the 0 Hz progressive scan image is transmitted in the interlaced scan image format and input to the apparatus of FIG. 1, a 30 Hz sequential flag is generated by using the image discriminating circuit of FIG. The coding unit 100 can be appropriately switched and controlled by using this.

Next, the operation of the image discriminating apparatus of FIG. 3 will be further described with reference to FIG.

FIG. 4A shows a progressively scanned image at a frame rate of 30 Hz, where A0, A1, A2,.
, B0, B1, B2,... Indicate the lines of the frame B, and C0, C1, C2,.

When this progressively scanned image at a frame rate of 30 Hz is interlaced scan-converted, image data in the interlaced scan image format as shown in FIG. 4B is obtained. That is, the image data of one frame of the progressive scanning is
Line group data of the first field of the interlaced scan (A
0, A2, A4,...) And the data of the line group in the second field (A1, A3, A5,.

When the image in the interlaced scanning format is input to the image discriminating apparatus shown in FIG. It is as shown in That is, the first of the progressively scanned images at the frame rate of 60 Hz
The scanning lines a0, a2, a4,... Of the frame, the scanning lines a0, a2, a4,... Of the second frame, and the scanning lines b0, b2, b4,.

The progressively scanned image at the frame rate of 60 Hz is input to the frame memory 22 and is delayed by one frame time. Then, the difference calculator 23 calculates a difference between the frames before and after the delay of the progressively scanned image at the frame rate of 60 Hz. This inter-frame difference is integrated by the integration circuit 24. Then, it is compared with a threshold value by the comparator 25. The comparator 25 outputs “1” when the intra-frame integrated value is larger than the threshold value, and outputs “0” when the intra-frame integrated value is smaller than the threshold value in one frame cycle.

As shown in FIG. 4C, when the progressively scanned image at a frame rate of 30 Hz is in the interlaced image format, the output of the comparator 25 is "0" in one frame period. "1", "0", "1", ...
And "0" and "1" are alternately repeated. That is, in the case of FIG. 4C, the difference between the scanning lines of the first frame and the second frame is 0, and the difference between the scanning lines of the second frame and the third frame is not 0.

This is because some of the two adjacent frames having a frame rate of 60 Hz have the same frame image information in a progressively scanned image having a frame rate of 30 Hz.
The inter-frame difference is very small, the comparison output becomes “0”, and the next two frames are image information of different frames in a progressively scanned image at a frame rate of 30 Hz. This is because it becomes “1”.

When the output of the comparator 25 repeats "1" and "0" in a cycle of two frames, the determination circuit 26 determines that the input image is a sequentially scanned image, and
"1" is output as a 0 Hz sequential flag.

On the other hand, as shown in FIG. 4 (D), the input signal to the apparatus of FIG. 3 is originally a 30 Hz interlaced scan image, and the scan lines of the first field are A0, A1, A
2, the scanning lines of the second field are B0, B1, B2,.
4, the output image of the vertical low-pass scan conversion filter 21 in the progressive scanning at a frame rate of 60 Hz is obtained as shown in FIG.
As shown in (E), the scanning lines of the first frame are a0, a
1, a2,..., And the scanning line of the second frame is b0, b
1, b2,...

Therefore, the difference between the frames is larger than the threshold value unless the image is a still image, and the output of the comparator 25 is not "0" but "1", "1", "1",. . When the output of the comparator 25 repeats “1” in one frame cycle, the input circuit determines that the input image is not a sequentially scanned image, and the determination circuit 26 sets the 30 Hz sequential flag to “0”.

When the output of the comparator 25 is "0",
When it is “0”, “0”,..., The inter-frame difference in the progressive scan image is a frame, that is, a still image in which no inter-field difference occurs in the input interlaced scan image in each field. Not judged, 30Hz
The flag is sequentially output as "0".

The 30 Hz obtained as described above is
If the sequential flag is input to the image encoding device of FIG. 1 as, for example, the flag FLG3, the image encoding device of FIG. It is determined that the images are sequential images at a rate of 30 Hz, and appropriate DCT coding and inverse D
CT coding and motion compensated prediction can be performed.

[0067]

As described above, according to the present invention, the sequential scanning / interlaced scanning of the input video signal format is different from the sequential scanning / interlaced scanning of the imaging method or the projection method for the input video signal. In this case, the encoding unit is controlled by inputting a flag indicating the sequential scanning / interlaced scanning of the imaging method or the projection method of the input video signal, thereby suppressing a decrease in encoding efficiency and a resulting degradation in encoding. Thus, a high-quality image encoding device can be provided.

Further, the image signal of the interlaced scanning can be converted into the video signal format of the progressive scanning, and the image encoding apparatus can perform the encoding process without the encoding degradation.

Further, the video signal of the progressive scanning can be converted into the video signal format of the interlaced scanning, and the image encoding apparatus can perform the encoding process without the encoding degradation.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of an image encoding device according to the present invention.

FIG. 2 is a diagram for explaining a telecine image.

FIG. 3 is a block diagram of an embodiment of an image discriminating apparatus according to the present invention.

FIG. 4 is a diagram for explaining the operation of the embodiment of FIG. 3;

FIG. 5 is a block diagram illustrating an example of a conventional image encoding device.

FIG. 6 is a diagram for explaining scan conversion between sequential scanning and interlaced scanning.

[Explanation of symbols]

12: Preprocessing circuit, 16: Encoder control circuit, 17: Selector circuit, 100: Encoder, 102: DCT encoding circuit, 103: Quantization circuit, 104: Inverse quantization circuit, 10
5: inverse DCT coding circuit, 108: motion compensation circuit, 10
9: motion vector detection circuit, 21: vertical low-frequency scan conversion filter, 22: frame memory, 23: difference calculator, 2
5 comparator, 26 judgment circuit

Continued on the front page F term (reference) 5C059 LA05 LA07 MA00 MA05 MA23 MC11 ME02 PP04 PP11 SS02 SS11 SS13 TA32 TA33 TA61 TB01 TB07 TC01 UA02 UA11 5C078 BA21 BA57 CA02 DA00 DA01 DA02 DB00 DB05

Claims (13)

[Claims] An encoding section for compressing and encoding an input video signal; and an encoding section control circuit for generating a control signal for controlling the encoding section, wherein the encoding section includes a frame mode of a frame DCT. And the frame DC
A DCT coding circuit capable of switching between an adaptive mode for adaptively switching T and field DCT, a quantization circuit for quantizing data DCT-coded by the DCT coding circuit, and output data of the quantization circuit And an inverse DCT code for switching the frame mode and the adaptive mode according to the mode switching of the DCT encoding circuit, and for performing an inverse DCT process on the output data of the inverse quantization circuit. An encoding circuit, and a motion compensation circuit that switches to a mode corresponding to the frame mode or the adaptive mode to perform motion compensation prediction. The encoding unit control circuit includes a large-scale image capturing method or a projection method for an input video signal. The DCT encoding circuit of the encoding unit receives the flag indicating whether the scanning method is the progressive scanning or the interlaced scanning, and CT coding circuit, the image coding apparatus and outputs a control signal for performing the mode switching of the motion compensation circuit. 2. The DCT of the encoding unit when the encoding unit control circuit receives a flag indicating that the main scanning method for the input video signal is sequential scanning.
2. The image code according to claim 1, wherein the control unit switches the processing unit and the inverse DCT processing unit to the frame mode, and generates a control signal that causes the motion compensation circuit to perform frame motion compensation prediction. 3. Device. 3. The encoding unit control circuit, when receiving a flag indicating that the main scanning method of the input video signal is interlaced scanning, the encoding unit control circuit controls the D signal of the encoding unit.
Switching the CT processing unit and the inverse DCT processing unit to the adaptive mode, and the motion compensation circuit
The image coding apparatus according to claim 1, wherein a control signal for performing field motion compensation prediction is generated. 4. The image encoding apparatus according to claim 1, wherein the flag is multiplexed in a vertical blanking period in the input video signal. 5. The image encoding apparatus according to claim 1, wherein the flag is input independently of the input video signal. 6. The image encoding apparatus according to claim 1, wherein the flag is set by a user. 7. A vertical low-pass scanning line conversion filter section for converting input image data in an interlaced scanning format into image data in a progressive scanning format in which the number of scanning lines per frame is reduced to half or less, and said vertical low-pass scanning. A frame memory for delaying the image data from the line conversion filter unit by one frame time; a difference calculator for calculating a difference between the image data from the vertical low-pass scanning line conversion filter unit and the image data from the frame memory; An integration circuit that integrates the output of the difference calculator within a frame; a comparator that compares the output of the integration circuit with a threshold value; and from the output of the comparator, the input image data sequentially scans the scanned image. A determination circuit for determining whether the image data is formatted image data. 8. A DCT encoding circuit capable of switching between a frame mode of a frame DCT and an adaptive mode for adaptively switching between the frame DCT and the field DCT. A quantization circuit for performing quantization, an inverse quantization circuit for inversely quantizing output data of the quantization circuit, and switching to the frame mode or the adaptive mode in response to mode switching of the DCT encoding circuit. Using an encoding unit including an inverse DCT encoding circuit that performs an inverse DCT process on output data of the quantization circuit, and a motion compensation circuit that performs motion compensation prediction by switching to a mode corresponding to the frame mode or the adaptive mode. In a method of performing compression encoding on a video signal, a method for imaging or projecting the input video signal may be used. Image coding characterized in that the mode switching of the DCT processing section, the inverse DCT processing section and the motion compensation circuit is performed based on a flag indicating whether the scanning method is a progressive scanning or an interlaced scanning. Method. 9. When the flag indicates that the main scanning method for the input video signal is sequential scanning, the DCT processing unit and the inverse DCT processing unit of the encoding unit are connected to each other. 9. The image coding method according to claim 8, further comprising: switching to the frame mode, and generating a control signal for causing the motion compensation circuit to perform frame motion compensation prediction. 10. The DCT processing section of the encoding section, wherein the flag indicates that the main scanning method for the input video signal is interlaced scanning.
9. The image coding apparatus according to claim 8, wherein the control section switches the inverse DCT processing section to the adaptive mode and generates a control signal for causing the motion compensation circuit to perform frame / field motion compensation prediction. Method. 11. The image encoding method according to claim 8, wherein said flag is multiplexed in a vertical blanking period in said input video signal. 12. The image encoding method according to claim 8, wherein said flag is inputted independently of said input video signal. 13. The image encoding method according to claim 8, wherein the flag is set by a user.