JP2000068489A - Soi substrate and manufacture of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high quality SOI substrate for high performance LSI by reducing the existence of faults in a embedded oxide layer. SOLUTION: In an SOI substrate, in which a embedded oxide layer is formed on a silicon single-crystal substrate, a device forming SOI layer is formed on the embedded oxide layer and is characterized in that the density of pin-hole defects of the embedded oxide layer is less than one per cm2, the SOI structure is formed using a silicon single-crystal substrate, where voids and/or COP of 0.1 μm or more when converted into diameter do not exist at least in a region from the surface extending to the depth to form the embedded oxide layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an SOI substrate in which a buried oxide layer is provided near the surface of a silicon substrate, and a silicon layer (hereinafter referred to as an SOI (Silicon-on-insulator) layer) is formed thereon.

[0002]

2. Description of the Related Art As an SOI substrate on which a single crystal silicon layer is formed on an insulator such as silicon oxide, SIMO is used.
X (Separation by IMplanted OXygen) wafers and bonded wafers are mainly known. A SIMOX wafer is obtained by implanting oxygen ions into a single crystal silicon substrate by ion implantation of oxygen ions, and subsequently performing a chemical reaction between these oxygen ions and silicon atoms by an annealing treatment to form a buried oxide layer. It is an SOI substrate. On the other hand, the bonded wafer
This is an SOI substrate obtained by bonding two single-crystal silicon wafers with an oxide layer interposed therebetween and thinning one of the two wafers.

A MOSFET (Metal-oxide-Semiconductor field effe) formed on the SOI layer of these SOI substrates
ct transisitor) has high radiation resistance and latch-up resistance, exhibits high reliability, suppresses a short channel effect accompanying device miniaturization, and enables low power consumption operation. Therefore, the SOI substrate is expected as a high-performance semiconductor substrate for the next-generation MOS-LSI.

The buried oxide layer of these SOI substrates, SO
The thickness of the I layer is about 0.1 μm or 0.4 μm as a buried oxide layer in the case of a SIMOX wafer.
The front and rear thicknesses and the SOI layer having a thickness of 0.3 μm or less are used. In the case of a bonded substrate, the buried oxide layer can be adjusted to a thickness of 0.2 μm to 0.4 μm, and the SOI layer can be adjusted relatively freely by polishing. Used.

[0005] With the recent progress of LSI technology, SIMO
As X substrate, SOI
Substrates having a buried oxide layer of about 0.1 μm, which is excellent in layer quality and superior in cost, have been increasingly used. As a bonded substrate, a substrate having a buried oxide layer thickness of about 0.2 μm has been used. As the buried oxide layer becomes thinner, the importance of ensuring quality such as its insulating property is increasing.

[0006]

The MOS-LSI fabricated on an SOI substrate has a device formation region electrically insulated from the substrate body through a buried oxide layer which is an insulator. As described above, the radiation resistance and the latch-up resistance can be improved, and excellent characteristics such as low power consumption operation can be realized. Therefore, in order to realize these excellent characteristics, it is required that the insulating property of the buried oxide layer can be secured with a sufficient yield over the entire surface of the wafer. In a mirror wafer made by a usual Czochralski method, for example, COP (Crystal Orig) is used.
There are as-grown defects, such as inated particles, which are introduced into the crystal during crystal growth, but these defects deteriorate the quality of the oxide layer, such as causing a decrease in the quality of the LOCOS (Local Oxidation of Silicon) separation film. It has been pointed out that. For this reason, it is required to reduce the density of these as-grown defects in the mirror wafer to suppress the occurrence of insulation failure of various oxide layers.

As for the SOI substrate, the formation conditions of the buried oxide layer, the bonding strength, the adhered foreign substances, and the contamination of the introduced metal have been noticed and the efforts have been made to improve them. However, the effect of crystal defects on the buried oxide layer has not been sufficiently studied.

An object of the present invention is to reduce the existence of these problems and provide a high-quality SOI substrate for a high-performance LSI.

[0009]

The as-grown defects that existed in the crystal prior to the formation of the SOI structure were reduced by SIMO.
In the case of the X method, the implanted oxygen profile is affected by affecting the implanted oxygen profile, and in the case of the bonding method, a defect is generated in the surface oxide layer, and finally, a defect is generated in the buried oxide layer in the SOI structure. , We have newly found. Then, a method for preventing this adverse effect was invented. That is, the present invention relates to an SOI substrate and a method of manufacturing the same to solve the above-mentioned problems, and is based on the following means.

An SOI substrate according to the present invention has a buried oxide layer formed on a silicon single crystal substrate, and an SOI layer for device formation is formed on the buried oxide layer.
In the substrate, the density of pinhole defects in the buried oxide layer is less than 1 / cm ² .

[0011] Further, such a method for manufacturing an SOI substrate is characterized in that a silicon single crystal free of voids and / or COPs having a diameter of 0.1 μm or more in at least a region from the surface to a depth at which a buried oxide layer is formed. The SOI structure is formed using a substrate.

[0012] It is preferable that the above-described method for forming an SOI substrate is a method for manufacturing a SIMOX substrate in which oxygen ions are implanted into a silicon single crystal substrate and then annealing is performed.

Further, the above-described method for forming an SOI substrate includes the steps of:
Using a silicon single crystal substrate, a step of forming a thermal oxide layer on the surface of one substrate, a step of thereafter bonding the substrate to the other substrate, and a step of further bonding the substrate on which the thermal oxide layer is formed Preferably, the method is a method for manufacturing a bonded substrate, which mainly comprises a polishing step.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION A MOS-L substrate is mounted on a SIMOX substrate or an SOI substrate as a bonded substrate according to the invention.
By forming an SI, the buried oxide layer, which ensures insulation at a high yield, allows the device formation region to be well insulated from the substrate body, resulting in excellent radiation resistance and latch-up resistance and low power consumption operation. High performance devices can be manufactured with high yield. Thus, embedding pinholes oxide layer cause lowering yield, since the chip size of the device is 1 mm ² 1 cm ² approximately, when oxide film pinhole density embedding of one / cm ² or more, Insufficient insulation frequently occurs between the device and the substrate body, and the yield of the device is greatly reduced.

Among the defects in the silicon single crystal immediately before forming the above-mentioned SOI structure, voids and / or CO
It is necessary to pay attention to what is P. Voids are cavities due to the deficiency of silicon atoms in the silicon substrate. If this is present in the silicon crystal before the SOI structure is formed, it affects the distribution of implanted oxygen ions in the depth direction in the case of a SIMOX substrate, and the surface in the case of a bonded substrate. Defects in the oxide layer can cause defects in the resulting buried oxide layer. Also, CO
P is a kind of minute pits measured by, for example, a light scattering type surface foreign particle meter. If this is present in a region related to forming an SOI structure in a wafer before forming an SOI structure, a SIMOX substrate Influences the depth distribution of oxygen ions implanted in the manufacturing process, and in the case of a bonded substrate manufacturing, it can also cause defects in the buried oxide layer by creating a thickness distribution in the surface oxide layer .

A typical silicon wafer manufactured by the Czochralski method, which is usually used for LSI manufacturing, has 1 × 10 voids having a size of 0.1 μm or more.
It is known that about 1 cm / cm ² of COP having a size of about ⁵ cm ⁻³ and a size of 0.1 μm or more exists. When an SOI substrate is manufactured using such a silicon wafer, a defect occurs in the buried oxide layer due to the above-described effect. In particular, in the case of an SOI substrate having a thin buried oxide layer having a thickness of about 0.1 μm, a defect of about 1 / cm ² is generated in the buried oxide layer only by the effect of voids and COP, and It becomes impossible to form an SOI substrate having a higher defect density.

Therefore, in order to reduce the pinhole defect density of the buried oxide layer in the SOI substrate, it is necessary to reduce these voids and / or COP. As the voids and / or COPs to be treated, the thicknesses of the SOI layer and the buried oxide layer in the SOI structure are set to 0.
Since the thickness is about 1 μm or more,
The size should be 0.1 μm or more, and a silicon wafer free of voids and / or COPs of this size should be used at least at a depth from the surface until the buried oxide layer is formed.

The silicon single crystal substrate as a starting material for forming the SOI structure only needs to satisfy the above-mentioned quality, and the manufacturing method thereof is not particularly limited. On the surface of the crystalline silicon substrate, a wafer having a silicon epilayer of 0.4 μm or more for producing a SIMOX substrate and a silicon epilayer of 0.1 μm or more for producing a bonded substrate may be used. In addition, the single crystal silicon substrate has an impurity content of 5 pp.
m may be annealed at 1000 ° C. or more and 1300 ° C. or less in a rare gas atmosphere of 1 m or less for 1 hour or more. Further, it grows as single crystal silicon by the Czochralski method, and the pulling speed at that time is 0.8 mm /
A wafer obtained from a silicon single crystal having a length of not more than min may be used. Further, in the process of producing a silicon single crystal by the Czochralski method, the crystal is pulled up and grown under conditions such that a region having a cooling rate of 1.0 ° C./min or less is formed in a crystal temperature range of 1200 to 1000 ° C. Alternatively, a wafer obtained from a silicon single crystal may be used. In addition, nitrogen is used as an impurity in an amount of 1 × 10 ¹⁴ atoms / cm ³ or more.
A silicon wafer containing 10 ¹⁸ atoms / cm ³ or less may be used.

There is no particular limitation on the manufacturing conditions of the SOI substrate except for using the silicon wafer described above. For example, in a manufacturing condition of a SIMOX substrate, an acceleration voltage of 180 keV to 200 keV is usually used as an oxygen implantation condition, but a higher voltage or a lower voltage may be used. As the dose amount of oxygen ions, for example, when an acceleration voltage of 180 keV is used, about 4 × 10 ¹⁷ cm ⁻² or 1.3 × 10 ¹⁸ from the viewpoint of electric breakdown voltage characteristics.
Although it is desirable to use a dose of not less than cm ^−2, the effect of reducing the buried oxide film pinhole can be expected even with a dose other than this range. As the annealing conditions, it is desirable to use a temperature of 1300 ° C. or higher in order to obtain a high quality embedded oxide film, but a lower temperature may be used. The atmosphere in the annealing may be oxidizing or non-oxidizing.

Regarding the production conditions of the bonded crystal, the oxidation condition for producing the buried oxide layer is 1
A temperature around 000 ° C. is usually used, but may be higher or lower. The atmosphere during the oxidation may be dry or wet, and the oxygen partial pressure does not need to be particularly limited.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific examples of the present invention will be described.

As shown in Table 1 below, 0.5 μm from the surface
Three kinds of silicon wafers having a size of 0.1 μm or more and different COP densities existing at a depth of up to m were prepared, and a SIMOX substrate and a bonded substrate were manufactured using these wafers. Wafers A and B are normal C
A silicon wafer manufactured by the Z method and a wafer C are silicon wafers manufactured at a lifting speed of 0.4 mm / min. The manufacturing conditions of the SIMOX substrate were as follows: the acceleration voltage for oxygen ion implantation was 180 keV, and the oxygen ion implantation amount was 4
× 10 ¹⁷ cm ^-2 was used. Annealing condition is temperature 1350
6 ° C. in an argon atmosphere containing 0.5% oxygen.
Time processing was performed. The thickness of each layer of the manufactured SIMOX substrate is 0.3 μm for the SOI layer and 0.1 μm for the buried oxide layer.
It was 1 μm. In the production of the bonded substrate, a thermal oxide layer having a thickness of 0.2 μm was formed on the surface of one wafer by wet oxidation at a temperature of 1000 ° C. Subsequently, the wafer was bonded to the other wafer and heat-treated at 1100 ° C. in a nitrogen atmosphere. Then, the wafer on which the thermal oxide layer is formed is polished from the surface opposite to the bonding surface,
The SOI layer was thinned to 0.2 μm.

The prepared SIMOX substrate and bonded substrate were immersed in a plating solution containing copper ions so that only the substrate surface was in contact with the substrate, and the back surface of the substrate was brought into contact with an electric cathode, and an electric anode was arranged in the plating solution. Thereafter, by applying a low voltage of about 10 V which does not destroy the buried oxide layer itself between the two electrodes, copper deposits are generated on the substrate surface immediately above the portion where the buried oxide layer has a pinhole. The pinhole density in the buried oxide layer was evaluated by counting. The results are shown in Table 1 together with the density of void defects in the silicon wafer used.

[0024]

[Table 1]

As is apparent from Table 1, the pinhole density of the buried oxide layer is clearly lower in the wafer C having no void defect. From this, it was confirmed that by reducing the void defect density in the silicon wafer, the buried oxide layer pinholes of the SIMOX substrate and the bonded substrate manufactured using the silicon wafer can be reduced.

In Table 1, the pinhole defect density of the buried oxide layer of the SIMOX substrate is still not 0 even in a wafer having a void density of 0 because oxygen ions are implanted by particles adhering to the wafer surface during oxygen ion implantation. Is considered to be shielded.

[0027]

As described above, the present invention provides a semiconductor substrate capable of manufacturing a high-performance LSI with high reliability by using an SOI substrate having few defects in a buried oxide layer. be able to. An SOI substrate having a small number of defects in the buried oxide layer can be obtained by using a substrate in which the density of defects in a silicon crystal before forming an SOI structure is equal to or lower than a certain density.

Continued on the front page (72) Inventor Takayuki Yano 3-35-1 Ida, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Nippon Steel Corporation Technology Development Headquarters (72) Inventor Yoichi Nagatake 3-35 Ida, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture -1 Nippon Steel Corporation Technology Development Division

Claims (4)

[Claims] In an SOI substrate having a buried oxide layer formed on a silicon single crystal substrate and an SOI layer for device formation formed on the buried oxide layer, the density of pinhole defects in the buried oxide layer is one. / Cm ^{2 or} less. 2. The method according to claim 1, wherein at least a region from the surface to a depth at which the buried oxide layer is formed has a diameter of 0.1 μm.
A method for manufacturing an SOI substrate, comprising forming an SOI structure using a silicon single crystal substrate having no m or more voids and / or COPs. 3. The method for manufacturing a SOI substrate according to claim 2, wherein the SOI structure is formed by implanting oxygen ions into a silicon single crystal substrate and then performing an annealing process. Production method. 4. A method for forming an SOI structure includes the steps of forming a thermal oxide layer on the surface of one substrate using two silicon single crystal substrates, bonding the substrate to the other substrate thereafter, 3. The method for manufacturing an SOI substrate according to claim 2, wherein the method is a method for manufacturing a bonded substrate, which mainly comprises a step of polishing a substrate on which an oxide layer is formed from an unbonded surface.