JP2000057785A - Semiconductor integrated circuit apparatus and memory card using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten a data write time at a flash memory. SOLUTION: When a user selects a write operation of a high-speed mode, a switch control signal is input to a switch circuit 18 by a command or the like and a voltage of approximately -13.7v generated by a high-speed voltage generation circuit 15 is output as a word line potential. Normally, a voltage of approximately -12.5v generated by a voltage generation circuit 16 is output as the word line potential. Since the write voltage for the high-speed mode of approximately -13.7v higher than at the normal write is output from the switch circuit 18, a write speed can be increased higher than at the normal write.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data writing technique, and more particularly to a technique which is effective when applied to shorten data writing time in a flash memory.

[0002]

2. Description of the Related Art According to studies made by the present inventor, for example, a memory card is rapidly spreading as a storage medium for image data captured by a digital camera or the like. Further, with the demand for higher performance in memory cards, for example, flash memories have been used as semiconductor memories mounted on memory cards.

This flash memory is electrically erasable and rewritable collectively, and can hold a large amount of data without a battery. When writing data, electrons are injected into the floating gate of the memory cell with a high electric field, and when erasing, the electrons are removed from the floating gate by using a tunnel phenomenon.

[0004] An example of this type of semiconductor integrated circuit device is described in detail on June 1, 1995.
Published by Industrial Research Institute Co., Ltd., Masashi Oshima (ed.), "Electronic Materials" June Issue (Vol. 34, No. 6), and P32 to P37. This document describes the configuration of flash memory and the like. .

[0005]

However, the present inventor has found that the above-mentioned semiconductor integrated circuit device has the following problems.

That is, in a flash memory, usually,
The voltage at the time of data writing, that is, the word line potential (for example, about -12.5 V) is set so that the number of rewrites of about 2 to 3 million times can be guaranteed.

[0007] In recent years, with the increase in image quality of digital cameras,
Although the image data tends to increase significantly, as described above, the word line potential is set low to guarantee the number of times of writing, and there is a problem that the writing time of the flash memory becomes longer.

An object of the present invention is to provide a semiconductor integrated circuit device capable of greatly shortening a data write time and a memory card using the same.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0010]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, in the semiconductor integrated circuit device of the present invention, a first voltage used as a word line potential and a second voltage used as a high-speed write word line potential higher than the first voltage are used. It is provided with high voltage generating means for generating and switching and outputting the first voltage or the second voltage based on the control signal.

Further, in the semiconductor integrated circuit device according to the present invention, the high voltage generating means includes a first high voltage generating section for generating a first voltage, and a second high voltage generating section for generating a second voltage. And switching between the first high-voltage generator and the second high-voltage generator based on the control signal and the first voltage or the second voltage.
And a switching unit that outputs one of the voltages as the word line potential.

Further, the semiconductor integrated circuit device of the present invention
The high voltage generating means boosts a first reference voltage to generate a first reference voltage.
, A boosted power supply unit that boosts the second reference voltage to generate the second voltage, a first reference power supply unit that generates the first reference voltage, A second reference power supply unit for generating a high second reference voltage, and switching between the first reference power supply unit and the second reference power supply unit based on the control signal; And a switching unit that outputs one of the reference voltages to the boost power supply unit.

Further, in the semiconductor integrated circuit device according to the present invention, the high-voltage generating means performs a boost power supply unit for generating a boosted voltage by boosting a reference voltage, and performs a level monitor control of the boosted power supply unit. A first level monitor unit for generating a first voltage, and a level monitor control of a boost power supply unit.
The booster power supply includes a second level monitor for generating a second voltage, and a controller for operating either the first level monitor or the second level monitor based on the control signal. is there.

Further, the semiconductor integrated circuit device according to the present invention
A third voltage used as a write verify voltage and a fourth voltage which is different from the third voltage and is used as a high-speed operation verify voltage are generated, and the third voltage or the fourth voltage is generated. In response to a control signal.

Further, a memory card according to the present invention is configured using the semiconductor integrated circuit device.

As described above, the data writing speed of the semiconductor integrated circuit device can be increased, and even a memory card such as a digital camera storing a large amount of data can be used.
The writing time can be greatly reduced.

[0018]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block diagram of a flash memory according to one embodiment of the present invention, FIG. 2 is an explanatory diagram of a high-voltage generating circuit provided in the flash memory according to one embodiment of the present invention, and FIG. FIG. 4 is an explanatory diagram of a memory card using a flash memory according to an embodiment of the present invention.
FIG. 2 is an explanatory diagram of a memory cell in the flash memory according to the embodiment of the present invention.

In this embodiment, the flash memory 1 is provided with a logic control 2 and an input / output control circuit 3, as shown in FIG. The logic control 2 temporarily stores a control signal input from a host such as a microcomputer to be connected, and controls operation logic.

The input / output control circuit 3 receives various signals such as a command, an external address, and program data input / output from the host, and outputs a command, an external address, and data based on a control signal. The data is output to the register 4, the address register 5, and the data register / sense amplifier 6.

Further, a column address buffer 7 and a row address buffer 8 are connected to the address register 4. The column address buffer 7 and the row address buffer 8 temporarily store the address output from the address register 4.

A column address decoder 9 is connected to the column address buffer 7, and a row address decoder 10 is connected to the row address buffer 8. The column address decoder 9 performs decoding based on the column address output from the column address buffer 7, and the row address decoder 10 performs decoding based on the row address output from the row address buffer 8.

A control circuit 11 is connected to the logic control 2 and the command register 4. The control circuit 11 controls the data register / sense amplifier 6, the high voltage generating circuit (high voltage generating means) 12, and the verify voltage generating circuit. The circuit 13 is controlled.

The high voltage generating circuit 12 generates a write voltage, that is, a high voltage used as a word line potential, and the verify voltage generating circuit 13 generates a verify voltage used for a verify operation.

The data register / sense amplifier 6,
The row address decoder 10 is connected to a flash memory array 14 capable of electrically erasing data and requiring no power supply for storing data. In the flash memory array 14, memory cells, which are the minimum units of storage, are regularly arranged in an array.

Further, a data register / sense amplifier 6, a row address decoder 10, and a flash memory array 14 are connected to the above-described high voltage generation circuit 12 and verify voltage generation circuit 13, and are supplied with a predetermined voltage. .

The high voltage generating circuit 12 will be described with reference to FIG.

The high voltage generation circuit 12 includes a high-speed voltage generation circuit (second high voltage generation unit) 15, a voltage generation circuit (first high voltage generation unit) 16, a reference power supply circuit 17,
And a switching circuit (switching unit) 18. The high-speed voltage generation circuit 15 is, for example, -13.7.
A write voltage (second voltage) for high-speed mode of about V is generated.

The voltage generating circuit 16 has a voltage of -12.5 V
A normal mode write voltage (first voltage) is generated. The reference power supply circuit 17 generates a reference voltage supplied to the high-speed voltage generator 15 and the voltage generator 16.

The switching circuit 18 switches the connection destination based on a switching control signal (control signal) input by a command or an external input terminal, and a high-speed mode of about -13.7 V generated by the high-speed voltage generating circuit 15. -1 generated by the write voltage or the voltage generation circuit 16
One of the normal mode write voltages of about 2.5 V is output to the memory cells of the flash memory array 14 as a word line potential.

A memory card 19 using the flash memory 1 will be described with reference to FIG.

The memory card 19 is a flash memory card and is used, for example, for storing image data of a digital camera or as an external storage medium for a notebook personal computer, a multifunctional terminal, or the like.

Printed circuit board 20 of memory card 19
, A flash memory 1 is mounted. In the flash memory 1, a controller and a flash memory are integrated into one chip.

In FIG. 3, one flash memory 1 is mounted on the printed wiring board 20.
A plurality of flash memories 1 may be mounted according to an increase in memory capacity.

Further, the printed wiring board 20 on which the flash memory 1 is mounted is fixed by a frame, upper and lower panels, and the like, and is connected to the above-described digital camera or the like via a connector 21 provided at a predetermined peripheral portion of the printed wiring board 20. Signals are exchanged with a host computer such as a multi-function terminal.

Next, the operation of the present embodiment will be described.

First, when the user selects the write operation in the normal mode, the switching circuit 1 is activated by a command or the like.
8, a switching control signal is input, and switching is performed so that a voltage of about -12.5 V generated by the voltage generating circuit 16 is output as a word line potential.

When the user selects the write operation in the high-speed mode, the switching circuit 1 is activated by a command or the like.
8, a switching control signal is input, and switching is performed so that a voltage of about -13.7 V generated by the high-speed voltage generating circuit 15 is output as a word line potential.

As shown in FIG. 4, the memory cell S in the flash memory array 14 has, for example, a one-transistor stacked gate structure, and applies a high voltage to the gate (word line) and the drain (data line) during writing. By injecting hot electrons generated near the drain into the floating gate.

Therefore, the higher the voltage output from the switching circuit 18 is, the faster the writing operation can be performed, and the higher-mode write voltage of about -13.7 V is output from the switching circuit 18 which is higher than that during normal writing. Thus, the writing speed can be significantly increased as compared with the normal writing operation. For example, when storing a large amount of data such as image data of a digital camera, the time required for writing to the memory card 19 can be greatly reduced.

Thus, according to the present embodiment, by providing the high voltage generation circuit 12 in the flash memory 1, the writing time of the flash memory can be greatly reduced.

Further, the memory card 19 using the flash memory 1 can greatly reduce the time required for writing to the memory card 19, even when storing a large amount of data in a digital camera or the like. .

Further, in the present embodiment, the high-voltage generation circuit 12 includes the high-speed voltage generation circuit 15 and the voltage generation circuit 1.
6, the reference power supply circuit 17, and the switching circuit 18, the high voltage generation circuit 12 is replaced with, for example, a voltage generation circuit (step-up power supply) 1 as shown in FIG.
6a, reference power supply circuit (first reference power supply unit) 17a, reference power supply circuit (second reference power supply unit) 17b, switching circuit 1
8 may be used.

In this case, the voltages of the reference power supply circuits 17a and 17b generate different reference voltages, respectively. When the reference voltage (first reference power supply) of the reference power supply circuit 17a is supplied to the voltage generation circuit 16a. In the case where the write voltage in the normal mode of about -12.5 V is generated by the voltage generation circuit 16a and the reference voltage (second reference power supply) of the reference power supply circuit 17b is supplied to the voltage generation circuit 16a,
A high-speed mode write voltage of about 13.7 V is generated by the voltage generation circuit 16a.

As shown in FIG. 6, a level monitor for monitoring two different levels is provided in the voltage generation circuit.
The normal mode write voltage and the high-speed mode write voltage may be generated.

[0047] In this case, the voltage generation circuit 16b of the high voltage generating circuit 12 includes a charge pump circuit (step-up power supply unit) that boosts the reference voltage generated by the reference power supply circuit 17c and 16b _1, about -12.5V Level monitor for monitoring the voltage level of the write voltage in the normal mode (first mode)
A level monitoring unit) 16b _2, the level monitor (second level monitor unit) 16b ₃ performing voltage level monitor in the high speed mode for writing a voltage of about -13.7V, the operation control of the level monitor 16b _2, 16b ₃ Control unit 16 that performs
It is composed of a b _4.

The level monitors 16b ₂ , 1
6b ₃ is controlled by a switching control signal of the control unit 16b ₄ based on a command or a signal input from an external input terminal, and the selected level monitor 16b ₂ , 1
Control of the charge pump circuit 16b ₁ is performed by 6b _3.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

For example, according to the above embodiment, the data write speed of the flash memory is increased by increasing the voltage used for the word line potential. However, two write verify voltages are supplied by a predetermined control signal. A high voltage generating means is provided, and as shown in FIGS. 7A and 7B, a write verify voltage (third and fourth voltage) which is a determination voltage of a threshold voltage Vth in a memory cell in a high speed mode is provided. The writing time can also be shortened by shifting to the threshold voltage Vth for erasing.

[0051]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

(1) According to the present invention, by providing a high voltage generating means in a semiconductor integrated circuit device, the data writing speed can be greatly increased.

(2) Further, according to the present invention, even when a large amount of data is stored in a digital camera or the like, the writing time of the memory card can be greatly reduced, so that the performance of the memory card can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram of a flash memory according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram of a high-voltage generating circuit provided in the flash memory according to one embodiment of the present invention;

FIG. 3 is an explanatory diagram of a memory card using a flash memory according to one embodiment of the present invention.

FIG. 4 is an explanatory diagram of a memory cell in the flash memory according to one embodiment of the present invention;

FIG. 5 is an explanatory diagram of a high-voltage generating circuit provided in a flash memory according to another embodiment of the present invention.

FIG. 6 is an explanatory diagram of a high-piezoelectric generation circuit provided in a flash memory according to another embodiment of the present invention.

FIG. 7A is a diagram illustrating a case where an erasing threshold in a memory cell of a flash memory according to an embodiment of the present invention is distributed on a high voltage side, and FIG. 7B is an embodiment of the present invention; FIG. 10 is an explanatory diagram in a case where the erase threshold value in the memory cell of the flash memory according to the embodiment is distributed on the low voltage side.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Flash memory (semiconductor integrated circuit device) 2 Logic control 3 I / O control circuit 4 Command register 5 Address register 6 Data register / sense amplifier 7 Column address buffer 8 Row address buffer 9 Column address decoder 10 Row address decoder 11 Control circuit 12 High voltage generating circuit (high voltage generating means) 13 Verify voltage generating circuit 14 Flash memory array 15 High-speed voltage generating circuit (second high voltage generating section) 16 Voltage generating circuit (first high voltage generating section) 16a Voltage generation Circuit (boost power supply unit) 16b Voltage generation circuit 16b ₁ Charge pump circuit (boost power supply unit) 16b ₂ Level monitor (first level monitor unit) 16b ₃ Level monitor (second level monitor unit) 16b ₄ control unit 17 Reference Power supply circuit 1 a reference power supply circuit (first reference power supply unit) 17b reference power supply circuit (the second reference power supply unit) 17c reference power supply circuit 18 switching circuit (switching unit) 19 memory card 20 printed circuit board 21 Connector S memory cells

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor: Shoji Kubono 5-22-1, Josuihonmachi, Kodaira-shi, Tokyo Inside of Hitachi Super LSI Systems Co., Ltd. (72) Michitaro Kanemitsu Tokyo 5-22-1, Kamimizuhoncho, Kodaira-shi, Tokyo F-term in Hitachi Super LSI Systems, Ltd. (Reference) 5B025 AA01 AB01 AD10 AE05

Claims (6)

[Claims] A first voltage used as a word line potential and a second voltage used as a high-speed write word line potential higher than the first voltage;
A high voltage generating means for switching and outputting the second voltage or the second voltage based on a control signal. 2. The semiconductor integrated circuit device according to claim 1, wherein said high-voltage generating means includes: a first high-voltage generating unit that generates a first voltage; and a second high-voltage generating unit that generates a second voltage. A voltage generator, the first high-voltage generator based on a control signal, and the second
And a switching unit that switches between the high voltage generation unit and the first voltage or the second voltage as a word line potential. 3. The semiconductor integrated circuit device according to claim 1, wherein said high-voltage generating means generates a first voltage by boosting a first reference voltage, and generates a first voltage by boosting a second reference voltage. A first reference power supply for generating a first reference voltage; a second reference power supply for generating a second reference voltage higher than the first reference voltage; Switching between the first reference power supply unit and the second reference power supply unit based on a control signal and outputting either the first reference voltage or the second reference voltage to the boosted power supply unit And a semiconductor integrated circuit device. 4. The semiconductor integrated circuit device according to claim 1, wherein the high voltage generating means performs a level monitor control of the boosted power supply section that boosts a reference voltage to generate a boosted voltage, A first level monitor for causing the boosted power supply to generate a first voltage, a second level monitor for performing level monitor control of the boosted power supply and generating a second voltage by the boosted power supply; A semiconductor integrated circuit device, comprising: a control unit that operates either the first level monitor unit or the second level monitor unit based on a control signal. 5. A third voltage comprising a third voltage used as a write verify voltage and a fourth voltage having a voltage value different from the third voltage and used as a high-speed operation verify voltage. Alternatively, a semiconductor integrated circuit device includes a high voltage generating means for switching and outputting a fourth voltage based on a control signal. 6. A memory card comprising the semiconductor integrated circuit device according to claim 1. Description: