JP2000042490A - Apparatus for driving ultrasonic vibrator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the subject apparatus improved in its drive efficiency by accurately catching and tracking the fundamental resonance frequency of an ultrasonic vibrator and always stably holding the drive frequency to the ultrasonic vibrator. SOLUTION: As a means for setting the drive frequency of an ultrasonic vibrator driving apparatus, a PLL tracking means constituted of a hase comparator (1) 2, a low-pass filter 3, a voltage control oscillator 4 and a variable frequency divider 5, and a microcomputer 1 inputting the current/potential phase difference signal A2 of the difference between the voltage phase signal θV and current phase signal θI of a drive signal outputted from a phase comparator (2) 9 and forming a renewal control signal D1 for renewing the frequency dividing number N2 of the variable frequency divider 5 contained in the loop of the PLL tracking means to output the same are provided. In this case, the output signal S4 of the voltage control oscillator 4 is divided in frequency by N1 in a fixed frequency divider 6 to form a drive signal S5, which is, in turn, applied to an ultrasonic vibrator 10 through an amplifier 7 and a current phase detector 8.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an ultrasonic transducer driving device.

[0002]

2. Description of the Related Art As an example of a conventional ultrasonic vibrator driving apparatus, FIG. 2 is a block diagram of an ultrasonic vibrator driving apparatus constructed using a known PLL (Phase Lock Loop) tracking method.
Is shown in This conventional example (referred to as a first conventional example) is shown in FIG.
As shown in FIG. 2, the apparatus is provided with a voltage controlled oscillator 11, an amplifier 12, a phase detector 13, a phase comparator 14, and a low-pass filter 15 corresponding to the ultrasonic transducer 16 to be driven. You. In FIG. 2, a voltage controlled oscillator 1
The drive signal oscillated and output from 1 is amplified by the amplifier 12 and input to the phase detector 13, and the ultrasonic transducer 16 is driven via the phase detector 13. At this time, the phase detector 13 outputs the voltage phase signal θV and the current phase signal θI of the drive signal for the ultrasonic transducer 16, and both are input to the phase comparator 14. Phase comparator 14
, The phase of the voltage phase signal θV and the phase of the current phase signal θI are compared and collated, and a phase difference signal between the two phase signals is output and input to the low-pass filter 15. In the low-pass filter 15, the low frequency portion of the phase difference signal is extracted and converted into a phase error signal.
1 is input. As is well known, the voltage controlled oscillator 11, the amplifier 12, the phase detector 13, the phase comparator 1
The low-pass filter 4 and the low-pass filter 15 form a PLL circuit, and the oscillation frequency of the voltage-controlled oscillator 11 is controlled and adjusted so that the phase difference between the voltage phase signal θV and the current phase signal θI becomes zero. That is, the drive signal output from the voltage controlled oscillator 11 is oscillated and output at a frequency near the resonance frequency of the ultrasonic vibrator 16 at the beginning of the oscillation, but the oscillation frequency is increased by the operation of the PLL tracking system. Is controlled and adjusted to converge on the resonance frequency of the ultrasonic vibrator 16, and is driven at the convergence frequency in a steady operation state.

As another conventional example, Japanese Patent Application Laid-Open No.
No. 45275 discloses an "ultrasonic vibrator driving device". This conventional example (referred to as a second conventional example) is shown in FIG.
As shown in FIG. 2, the conventional example corresponds to the ultrasonic transducer 25 to be driven and vibrated.
A drive circuit including a voltage controlled oscillator 18 and a phase comparator 24; an amplifier 19; a detection circuit 20;
, A switch circuit 22, and a control circuit 23. Also in this conventional example, the low-pass filter 1
7, voltage controlled oscillator 18, amplifier 19, detection circuit 20,
Although the switch circuit 22 and the phase comparator 24 form a PLL circuit, unlike the first conventional example,
The current phase signal θI output from the phase detector 20 is input to the phase comparator 24 via the switch circuit 22 only when it is in “contact” with the contact on the B side of the switch circuit 22. Thus, the PLL circuit is formed.
The switching of the switches on the A-side and B-side contacts in the switch circuit 22 is controlled by the control circuit 23. As described above, when the contact on the B-side becomes "contact", the first conventional method is used. When a PLL circuit similar to the example is formed, and the contact on the A side is "connected", the input of the current phase signal θI to the phase comparator 24 is cut off, and instead, the output is output from the reference oscillator 21. The oscillation reference signal is input to the phase comparator 24 via the contact on the A side.

The operation of the second conventional example will be briefly described below. In FIG. 3, when the oscillation of the ultrasonic transducer 25 is started, first, the control circuit 23 controls the switch circuit 22 so that the A side is “closed”, and the oscillation reference signal from the reference oscillator 21 is shifted in phase. The signal is input to a drive circuit including the low-pass filter 17, the voltage-controlled oscillator 18 and the phase comparator 24 via the comparator 24. Thus, the ultrasonic transducer 25 is driven by a drive signal having a frequency corresponding to the oscillation reference signal. Therefore, the ultrasonic vibrator 25 is activated by its fundamental frequency fr or a frequency close thereto. As a result, from the detection circuit 20,
An output very close to the feedback signal obtained when the ultrasonic transducer 25 is driven at the basic resonance point is detected. When the ultrasonic transducer 25 is activated in this way, the switch circuit 22
Under the control of the control circuit 23, switching is performed so that the contact on the B side becomes “contact”. As a result, the voltage phase signal θV and the current phase signal θI
Are input to the phase comparator 24 to form a known PLL circuit as in the case of FIG. 2. However, at the time of this switching, the ultrasonic wave is transmitted to the detection circuit 20 by the above-described starting operation. An output that is very close to the feedback signal obtained when the transducer 25 is driven at the basic resonance point is supplied, and the ultrasonic transducer 25 can be reliably driven at the fundamental frequency fr via the tracking system of the PLL circuit. State. That is, in the second conventional example, the reference oscillation circuit 2
1. By adding the switch circuit 22 and the control circuit 23, the object is to be able to reliably drive at the fundamental frequency fr, and this can be realized.

[0005]

In the above-described conventional ultrasonic vibrator driving circuit, in the case of the first conventional example described above, when the oscillation of the driving signal is started, the output from the voltage controlled oscillator of the PLL circuit is obtained. The oscillation frequency of the driving signal
Tracking range corresponding to the basic resonance frequency fr (PLL r
ange) is no problem, but in general, it is not always in the frequency range that can be tracked. In such a case,
There is a disadvantage that the drive frequency cannot be set normally. Further, as shown in the impedance characteristic diagram of the ultrasonic vibrator in FIG. 4, within the oscillation frequency range of the voltage-controlled oscillator, in addition to the basic resonance frequency fr of the ultrasonic vibrator, a sub-resonant frequency fa or fb is also included. In the case where the ultrasonic vibrator exists, the ultrasonic vibrator may be driven by the sub-resonance frequency when the oscillation frequency at the time of the start is in a frequency range outside the tracking range (PLL range) of FIG. Accordingly, there is a disadvantage that the driving efficiency for the ultrasonic transducer is deteriorated.

In the case of the second conventional example, in order to solve the above-mentioned problem at the time of starting, at the time of starting,
A reference oscillation circuit, a switch circuit, and a control circuit are added so that a drive signal having a frequency corresponding to the oscillation reference signal generated by the reference oscillator is generated and the ultrasonic vibrator is started at the fundamental frequency fr or a frequency close thereto. Although the PLL circuit is provided, when the load on the drive signal of the ultrasonic transducer increases, as shown in the impedance characteristic of FIG. 5, a state in which the phase characteristic does not “zero cross” at the basic resonance frequency occurs. In such a case, there is a fear that the ultrasonic vibrator is driven at the sub-resonant frequency, and there is a disadvantage that the driving efficiency for the ultrasonic vibrator is significantly deteriorated. The same applies to a situation where the PLL circuit abnormally operates under the influence of some disturbance or the like, and the frequency of the drive signal shifts out of the tracking range of the PLL circuit. In these cases, there is an operational disadvantage that the power supply is once turned off, the power is turned on again, and a restart is required.

[0007]

According to the present invention, there is provided an ultrasonic vibrator driving apparatus for driving an ultrasonic vibrator at a resonance frequency, wherein the driving frequency setting means includes a predetermined reference frequency signal. , A PLL tracking means for generating and outputting a signal having a frequency corresponding to the drive frequency, and outputting a difference output between a voltage phase signal and a current phase signal of a drive signal to the ultrasonic transducer as a current / voltage phase difference signal. , Performs an arithmetic process based on a predetermined control law, generates an update control signal for updating the frequency division number of the frequency frequency division means included in the loop of the PLL tracking means, and outputs the frequency division number update signal. Control means.

The PLL tracking means compares a phase of the reference frequency signal with a phase of the feedback signal to output a phase difference voltage, and inputs the phase difference voltage to the first phase comparator. A low-pass filter that extracts and outputs a low-frequency component of the phase difference voltage, a voltage-controlled oscillator that oscillates and outputs a signal whose frequency is controlled by the output voltage of the low-pass filter, and an output signal of the voltage-controlled oscillator. A frequency divider that divides the frequency of the output signal according to the frequency division number updated via the update control signal, and generates and outputs the feedback signal.
The frequency division number updating control means includes an A / D conversion means for converting the current / voltage phase difference signal into a digital value, and temporarily stores a digital value of the current / voltage phase difference signal by the A / D conversion means. A ROM that stores a predetermined control law that defines the content of the arithmetic processing and a reference voltage data value that is defined as a reference voltage value for relative value comparison with a digital value of the current / voltage phase difference signal; The current
A difference between the digital value of the voltage phase difference signal and the reference voltage data value is calculated, and the difference is used as an input to perform an arithmetic process based on the control law, and the variable frequency division included in the loop of the PLL tracking means is performed. And an arithmetic means for generating and outputting the update control signal for updating the frequency division number.

Further, the frequency division number updating control means may be constituted by a microcomputer.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In an ultrasonic transducer driving apparatus according to the present invention, a means for setting a frequency of a drive signal for an ultrasonic transducer is obtained by inputting a predetermined reference frequency signal as an input. PLL tracking means for generating and outputting a signal having a frequency corresponding to the frequency, and a differential output between a voltage phase signal and a current phase signal of a drive signal for the ultrasonic vibrator as a current / voltage phase difference signal, And a frequency division number updating control means for performing an arithmetic processing based on the control rule described above and generating and outputting an update control signal for updating the frequency division number of the frequency dividing means included in the loop of the PLL tracking means. It is characterized by:

FIG. 1 is a block diagram showing one embodiment of the present invention. The present embodiment is an example in which a microcomputer is used as the frequency division number update control means. As shown in FIG. 1, the frequency division number update control means corresponds to the ultrasonic transducer 10 to be driven. Microcomputer 1, phase comparator (1) 2, and low-pass filter 3
A voltage-controlled oscillator 4, a variable frequency divider 5, a fixed frequency divider 6, an amplifier 7, a current phase detector 8,
A phase comparator (1) 2, a low-pass filter 3, a voltage-controlled oscillator 4
The variable frequency divider 5 forms the PLL tracking means.

In FIG. 1, at the time of startup, first,
When the power is turned on, the setting of the input / output port of the microcomputer 1, the setting of the time of the built-in timer, the setting of the clock frequency to be supplied to the phase comparator 2, and the like are performed.
Next, a predetermined frequency division number is preset for the variable frequency divider 5 by computer control. The pre-setting of the frequency division number for the variable frequency divider 5 is performed by setting the driving frequency under computer control.
This is important as a means for avoiding a pull-in abnormality of the PLL tracking means due to the sub-resonance frequency. After the operation preparation system of the microcomputer 1 has been prepared in this way, the activation switch for the ultrasonic vibrator 10 is turned on for the first time.

When the start switch is turned on, the microcomputer 1 generates a reference frequency signal S1 generated by dividing the frequency of the clock signal of the microcomputer.
Is output and input to the phase comparator (1) 2. The phase comparator (1) 2 also receives a frequency-divided signal S2 output from the variable frequency divider 5 and functioning as a feedback signal. The phase of the reference frequency signal S1 and the frequency-divided signal S2 are also input to the phase comparator (1). Are compared to output a phase difference signal S3, which is input to the voltage controlled oscillator 4 via the low-pass filter 3 as the control voltage A1. The voltage controlled oscillator 4 receives the input of the control voltage A1, oscillates and outputs a signal S4 whose frequency is controlled by the control voltage A1, and inputs the signal S4 to the variable frequency divider 5 and the fixed frequency divider 6 The driving signal S5 is generated by dividing the frequency by N1.
In the steady operation state, the PLL circuit including the phase comparator (1) 2, the low-pass filter 3, the voltage-controlled oscillator 4, and the variable frequency divider 5 generates the reference frequency signal S1.
Is equal to the frequency f2 of the frequency-divided signal S2 output from the variable frequency divider 5 (f1 = f2).
Therefore, assuming that the frequency division number of the variable frequency divider (2) 5 is N2, the frequency f4 of the signal S4 oscillated and output from the voltage controlled oscillator 4 is f4, and the relationship is f4 = f1 * N2.

The drive signal S5 is amplified by the amplifier 7, applied to the ultrasonic vibrator 10 via the current phase detector 8, and driven, and the phase is compared as the voltage phase signal θV of the drive signal S5. Input to the container (2) 9. A signal S7 is output from the current phase detector 8 as a current phase signal θI of the drive signal S5, and is input to the phase comparator (2) 9. The phase comparator (2) 9 compares the phases of these two signals to generate and output an analog current / voltage phase difference signal A2, which is input to the microcomputer 1. This current / voltage phase difference signal A
2 is converted into a digital current / voltage phase difference signal every 1 msec by an A / D converter inside the microcomputer 1 and temporarily stored in the RAM inside the microcomputer 1 as a current / voltage phase difference signal data value. Is stored.

On the other hand, when the phase difference between the current and the voltage of the drive signal applied to the ultrasonic vibrator 10 is reduced to zero in the ROM built in the microcomputer 1, the phase comparator (2) 9 A reference voltage data value corresponding to the voltage level of the output current / voltage phase difference signal A2 is stored. When the reference voltage data value when the current / voltage phase difference becomes zero is Rd, and the current / voltage phase difference signal data value temporarily stored in the RAM is Yd,
In comparing and comparing the two voltage levels, Rd> Yd,
Any one of Rd = Yd and Rd <Yd holds. In the case of Rd> Yd, the frequency division number of the variable frequency divider 5 is preset so that the current driving frequency is driven at a driving frequency lower than the basic resonance frequency fr of the ultrasonic transducer 10. Means that
When Rd = Yd, it means that the frequency division number of the variable frequency divider 5 is preset so that the current driving frequency is driven by the basic resonance frequency fr of the ultrasonic transducer 10, When Rd <Yd, the frequency division number of the variable frequency divider 5 is preset so that the current driving frequency is driven by a driving frequency higher than the basic resonance frequency fr of the ultrasonic vibrator 10. That means.

Next, in the microcomputer 1, an arithmetic process for setting the frequency division number of the variable frequency divider 5 is performed based on a predetermined control law stored in the ROM. First, the current / voltage phase difference signal data value Yd temporarily stored in the RAM and the ROM
A comparison and collation process for obtaining a difference from the reference voltage data value Rd stored therein is performed. Upon receiving the result of the comparison and collation processing, an arithmetic processing for updating and setting the frequency division number of the variable frequency divider 5 is performed based on the control law, and an update control signal for controlling the update of the frequency division number is performed. D1 is generated and input to the variable frequency divider 5 via the I / O port. In the variable frequency divider 5, the update control signal D
The set value of the frequency division number N2 is updated under the control of 1.
In this embodiment, the arithmetic processing for updating the set value of the frequency dividing number N2 is performed every 10 msec. By repeatedly performing this update processing, the set value of the frequency dividing number N2 of the variable frequency divider 5 is updated so that the phase difference between the current and the voltage flowing through the ultrasonic transducer 10 sequentially converges to zero. Eventually, a tracking operation with respect to the driving frequency is performed so that Rd = Yd. In the steady operation state, as described above, the frequency f1 of the reference frequency signal S1 and the frequency f2 of the frequency-divided signal S2 output from the variable frequency divider 5 are substantially equal to each other by the cooperative operation with the PLL tracking means. Assuming that the frequency of the signal S4 output from the voltage controlled oscillator 4 is f4, f4 = f1 × N2, and the driving frequency f5 of the driving signal S5 is f5 = f1 × (N2 //
N1).

That is, in this embodiment, the frequency setting means of the drive signal for the ultrasonic transducer is constituted by the phase comparator (1) 2, the low-pass filter 3, the voltage controlled oscillator 4, and the variable frequency divider 5. PLL tracking means, and a voltage phase signal θV and a current phase signal θI of the drive signal.
, And generates and outputs an update control signal D1 for updating the frequency division number N2 of the variable frequency divider 5 included in the loop of the PLL tracking means. By including the frequency division number update control means constituted by the microcomputer 1,
By the mutual cooperation, the stability of the driving frequency is maintained by the PLL tracking means, and the basic resonance frequency of the ultrasonic transducer 10 is accurately captured by the microcomputer 1 functioning as the frequency division number updating control means. Tracking can be performed, and the problem in the above-described conventional ultrasonic transducer driving device can be solved. That is, regardless of the existence of the sub-resonance frequency, the ultrasonic vibrator can always be driven accurately at the basic resonance frequency, and the driving efficiency of the ultrasonic vibrator driving device can be improved. At the same time, the operability of the device is significantly improved.

The ultrasonic vibrator driving apparatus according to the present invention is generally applicable to an actuator utilizing ultrasonic waves.
It is widely applied as a drive device that has the ability to respond to environmental changes, and as an example, it can be effectively used as a drive device for a bolted Langevan-type ultrasonic micromachining machine. , Ultrasonic cutter,
The present invention is also effectively applied to various ultrasonic transducer driving devices including an ultrasonic cleaner and an ultrasonic scaler for dental treatment.

[0019]

As described above, the present invention is applied to an ultrasonic transducer driving device for driving an ultrasonic transducer,
PLL tracking means for inputting a predetermined reference frequency signal and generating and outputting a signal having a frequency corresponding to the drive frequency as means for setting the frequency of the drive signal; voltage phase signal and current phase signal of the drive signal And a frequency division number update control means for performing an arithmetic processing by inputting a difference output from the frequency division means in the loop of the PLL tracking means. The resonance frequency can be accurately captured and tracked, and the driving frequency for the ultrasonic vibrator can be always stably maintained, so that the driving efficiency for the ultrasonic vibrator can be significantly improved. In addition, even in a situation corresponding to a change in the resonance frequency due to a load change and a temperature characteristic to the ultrasonic transducer, the basic resonance frequency can be quickly and stably maintained. Can perform tracking number, there is an effect that the driving operation for the ultrasonic transducers can be stably maintained.

When the frequency dividing number updating control means is constituted by a microcomputer, the drive frequency for the ultrasonic vibrator can be set to an arbitrary value by changing the numerical value of ROM data contained in the microcomputer. This has the effect that the frequency can be changed as appropriate and set.
By intentionally changing and inputting the level of the analog data value of the voltage phase difference signal and changing the reference voltage data value at which the current / voltage phase difference becomes zero, a frequency slightly deviating from the basic resonance frequency is selected. This makes it possible to make the output of the ultrasonic transducer variable.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

FIG. 2 is a block diagram showing a conventional example.

FIG. 3 is a block diagram showing another conventional example.

FIG. 4 is a diagram illustrating impedance characteristics of an ultrasonic transducer.

FIG. 5 is a diagram illustrating impedance phase characteristics of the ultrasonic transducer when the load increases.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Microcomputer 2 Phase comparator (1) 3, 15, 17 Low-pass filter 4, 11, 18 Voltage controlled oscillator 5 Variable frequency divider 6 Fixed frequency divider 7, 12, 19 Amplifier 8 Current phase detector 9 Phase Comparator (2) 10, 16 Ultrasonic transducer 13 Phase detector 14, 24 Phase comparator 20 Detection circuit 21 Reference oscillator 22 Switch circuit 23 Control circuit

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[Procedure amendment]

[Submission date] August 5, 1998 (1998.8.5)

[Procedure amendment 2]

[Document name to be amended] Drawing

[Correction target item name] All figures

[Correction method] Change

[Correction contents]

FIG.

FIG. 2

FIG. 5

FIG. 3

FIG. 4

Claims (3)

[Claims] 1. An ultrasonic vibrator driving apparatus for driving an ultrasonic vibrator at a resonance frequency, wherein a driving frequency setting means generates a signal having a frequency corresponding to the driving frequency by receiving a predetermined reference frequency signal as an input. And a differential output between a voltage phase signal and a current phase signal of a drive signal for the ultrasonic transducer as a current / voltage phase difference signal, and perform arithmetic processing based on a predetermined control law. And a frequency division number updating control means for generating and outputting an update control signal for updating the frequency division number of the frequency dividing means included in the loop of the PLL tracking means. apparatus. A first phase comparator for comparing a phase of the reference frequency signal with a phase of a feedback signal to output a phase difference voltage; and receiving the phase difference voltage by inputting the phase difference voltage. A low-pass filter that extracts and outputs a low-frequency component of the phase difference voltage, a voltage-controlled oscillator that oscillates and outputs a signal whose frequency is controlled by the output voltage of the low-pass filter, and an output signal of the voltage-controlled oscillator. A variable frequency divider that divides the frequency of the output signal in accordance with the division number updated via the update control signal and generates and outputs the feedback signal. A / D conversion means for converting the current / voltage phase difference signal into a digital value, a RAM for temporarily storing the digital value of the current / voltage phase difference signal by the A / D conversion means, Arithmetic processing A ROM for storing a reference voltage data value defined as the reference voltage value for the relative values compared against the digital value of a predetermined control law, as well as the current-voltage phase difference signal defining the content of the current and
A difference between the digital value of the voltage phase difference signal and the reference voltage data value is calculated, and the difference is used as an input to perform an arithmetic process based on the control law, and the variable frequency division included in the loop of the PLL tracking means is performed. 2. The ultrasonic transducer drive device according to claim 1, further comprising: an arithmetic unit that generates and outputs the update control signal for updating the frequency division number to the unit. 3. The ultrasonic transducer driving device according to claim 1, wherein said frequency division number updating control means is constituted by a microcomputer.