JPH04107011A - Pll circuit - Google Patents

Abstract

PURPOSE:To accurately keep a required output frequency by storing the voltage obtained from a phase comparator through a filter and oscillating and driving a voltage controlled oscillator by the stored voltage in the case of abnormality. CONSTITUTION:An analog memory 5 consists of a capacitor or the like because the voltage outputted from an LPF 2 is outputted and is stored in this memory. If an input signal fi is broken or is abnormal by some cause, a switching circuit 3 is switched by a signal S from a detection circuit 6, and the voltage from the memory 5 where the output voltage of the LPF 2 for input signal break or abnormality is inputted to a voltage controlled oscillator 4 through the circuit 3. Therefore, the oscillator 4 is oscillated and driven by the output voltage of the LPF 2 for a break or abnormality of the signal fi. An output signal fo of the oscillator 4 has the same value as before and after the break of abnormality of the input fi, and the output frequency of the PLL circuit is not changed. Consequently, the output signal fo having the accurate required frequency is kept regardless of the variance in characteristic of the voltage controlled oscillator, and signal transmission or the like of a communication device is performed without hindrance.

Description

[Detailed Description of the Invention] [Summary] Regarding a PLL circuit that generates an arbitrary frequency whose phase and frequency are synchronized with an external human input signal, even if the characteristics of the voltage controlled oscillator vary due to changes over time or temperature, etc. A phase comparator that compares the phase of the input signal and output signal with the aim of accurately maintaining the required output frequency;
a filter that smoothes the voltage output from the phase comparator in proportion to the direction and magnitude of the phase; and a detection means that detects disconnection or abnormality of the input signal and generates a signal;
a memory means for storing the output voltage of the filter and outputting it in accordance with the detection signal of the detection means; a switching means operated in response to the detection signal of the detection means and switching from the filter to the memory means; and a voltage controlled oscillator that is driven to oscillate by the obtained output voltage from the filter and the voltage from the memory means.

[Industrial application field]

The present invention is a PLL (Phase-
(Locked Loop) circuit.

[Conventional technology] FIG. 2 is a block diagram of a conventional PLL circuit.

In the figure, 1 is a phase comparator, 2 is a low-pass filter,
3 is the output voltage from the low-pass filter 2 and the constant voltage v
, 4 is a voltage controlled oscillator controlled by the voltage output from the switching circuit 3.

In the PLL circuit configured as described above, the phase comparator I compares the phases of the reference input signal f8 and the output signal f0 of the voltage controlled oscillator. If there is a phase difference between the input signal f and the output signal f0, the phase comparator 1 outputs a voltage proportional to the direction and magnitude of the phase. This voltage is smoothed by a low-pass filter 2 and input to a voltage controlled oscillator 4 through a switching circuit 3. This changes the frequency f0 of the output signal of the voltage controlled oscillator 4, and f,=
The oscillation state of f is maintained.

On the other hand, if a disconnection or abnormality occurs in the reference input signal f,
This is detected by a detection circuit (not shown), and the detection signal S causes the switching circuit 3 to switch to the voltage inside the PLL circuit.
By switching to the 1 side, a constant voltage v is applied to the voltage controlled oscillator 4. As a result, the voltage controlled oscillator 4 is driven with a constant voltage and outputs a predetermined frequency f0.

[Problem to be solved by the invention]

By the way, the internal constant voltage v1 in the conventional PLL@171 as described above is adjusted so that the output frequency of the voltage controlled oscillator 4 becomes a predetermined value at the time of shipment from the factory. There is a problem in that the output frequency of the PLL circuit changes if the characteristics of No. 4 change over time or if the operating temperature conditions of the PLL circuit differ from those when adjusted at the factory.

The present invention has been made in view of the above points, and an object of the present invention is to provide a PLL circuit that can accurately maintain a desired output frequency even if the characteristics of a voltage controlled oscillator change due to aging, temperature changes, etc. .

[Means to solve the problem]

The present invention will be described in conjunction with FIG. 1 which is an embodiment. The present invention has an input signal r8 and an output signal f. A phase comparator 1 that compares the phase of the phase comparator 1, a filter 2 that smoothes the voltage output from the phase comparator 1 in proportion to the direction and magnitude of the phase, and a filter 2 that detects disconnection or abnormality of f8 of the input signal. a detection means 6 for generating a signal, a memory means 5 for storing the output voltage of the filter 2 and outputting the output voltage according to the detection signal from the detection means 6, and a memory means 5 operated by the detection signal from the detection means 6;
switching means 3 for switching from the filter 2 to the memory means 5;
It comprises a voltage controlled oscillator 4 which is driven to oscillate by the output voltage from the filter 2 obtained through the switching means 3 and the voltage read from the memory means 5.

[For production]

When the input signal f is disconnected or abnormal, the detection means 6 that detects this switches and connects the switching means 3 to the memory means 5. The voltage is input to the voltage controlled oscillator 4 to cause it to oscillate.

Thereby, even if the characteristics of the voltage controlled oscillator 4 vary due to changes over time, temperature changes, etc., an output signal with an accurate required frequency can be obtained.

[Example] An embodiment of the present invention will be described below with reference to FIG.

In the figure, the PLL circuit has a reference human input signal f and an output signal f, as in the case shown in FIG. a phase comparator 1 that compares the phase of the phase comparator 1, a low-pass filter 2 that smoothes the voltage proportional to the direction and magnitude of the phase output from the phase comparator circuit, a switching circuit 3, and a voltage output from the switching circuit 3. A voltage controlled oscillator 4 driven by a voltage is provided.

The analog memory (corresponding to memory means in the claims) 5 stores the voltage output from the low-pass filter 2, and is composed of a capacitor and the like.

The input side of the analog memory 5 is connected to the output side of the low-pass filter 2, and the output side thereof is connected to the input terminal of the switching circuit 3. Further, the output side of the low-pass filter 2 is connected to the input terminal a of the switching circuit 3.

The disconnection or abnormality of the input signal f is detected by a detection circuit (corresponding to the detection means in the claims) 6, and the detection signal S is input as a continuous output command to the analog memory 5 and a switching command to the switching circuit 3. It has become.

Next, the operation will be explained.

When there is no interruption or abnormality in the input signal f, the switching circuit 3 is switched and connected to the input terminal a. Therefore, the reference input signal f from the outside and the output signal f of the voltage controlled oscillator 4
The phase with 0 is compared by a phase comparator l. If there is a phase difference here, the phase comparison circuit 1 outputs a voltage proportional to the direction and magnitude of the phase. This voltage is smoothed by a low-pass filter 2 and input as a DC level voltage v to a voltage controlled oscillator 4 through a switching circuit 3.

As a result, the voltage controlled oscillator 4 is driven to oscillate in accordance with the voltage vf, and outputs a signal f having a frequency synchronized with the input signal f1.
0 is output. That is, the PLL circuit operates in a loop so that f,=f, is maintained, and is in a stable state. Further, the voltage V outputted from the low-pass filter 2 as the input signal f changes is stored in the analog memory 5, and the stored contents also change.

On the other hand, when the input signal f is cut off or abnormal for some reason, the signal S from the detection circuit 6 that detects this switches the switching circuit 3 to the input terminal.At the same time, the low-pass filter 2 output voltage vf
Outputs the memory voltage from the analog memory 5 that stores
This voltage is input to the voltage controlled oscillator 4 through the switching circuit 3.

As a result, the voltage controlled oscillator 4 is driven to oscillate by the output voltage of the low-pass filter 2 when the input signal f is disconnected or abnormal.

In other words, the filter output voltage at the time when the input signal f becomes disconnected or abnormal is a feedback command value that takes into account the characteristic fluctuations of the voltage controlled oscillator 4 such as changes over time or temperature changes. Output signal f0
is the same value before and after the input f is disconnected or abnormal, and the output frequency of the PLL circuit does not change.

In this way, in this embodiment, even if the characteristics of the voltage controlled oscillator change due to changes over time or temperature,
The output signal f0 of the correct required frequency can be maintained without being affected by this, and signal transmission etc. of communication equipment can be performed without any trouble.

It goes without saying that the present invention can be modified in various ways within the scope of the claims.

〔Effect of the invention〕

As explained above, according to the present invention, the voltage obtained from the phase comparator through the filter is stored in the memory means, and when the input signal is interrupted or abnormal, the voltage controlled oscillator is driven to oscillate with the voltage stored in the memory means. Therefore, even if the characteristics of the voltage controlled oscillator change due to changes over time or temperature, the output frequency can be accurately maintained at the desired frequency.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional PLL circuit. In the figure, l is a phase comparator, 2 is a low-pass filter, 3 is a switching circuit, 4 is a voltage controlled oscillator, and 5 is an analog memory.

Claims (1)

[Claims] (1) A phase comparator that compares the phases of an input signal and an output signal, a filter that smoothes a voltage output from the phase comparator in proportion to the direction and magnitude of the phase, and a disconnection of the input signal. or a detection means that detects an abnormality and generates a signal; a memory means that stores the output voltage of the filter and is outputted by the detection signal of the detection means; and a memory means that is operated by the detection signal of the detection means and that filters the A PLL circuit comprising: switching means for switching from the filter to the memory means; and a voltage controlled oscillator driven to oscillate by the output voltage from the filter obtained through the switching means and the voltage from the memory means.