JP2000040481A - Sample holder, semiconductor manufacturing device, semiconductor inspection device, circuit pattern inspection device, charged particle beam application device, calibrating board, sample holding method, circuit pattern inspection method and charged particle beam application method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable machining, analysis and inspection for preventing accuracy deterioration of the relationship between a sample position and an irradiating position of an electron beam of the sample end part by arranging an operation means for arithmetically operating a strain quantity of a primary charged particle beam characteristic of the outer peripheral part from a standard mark image signal of two surfaces, making a deflection correcting table according to a sample height, and updating it. SOLUTION: A calibrating wafer 17 embedded with a standard mark-applied sample 17 of two surfaces different in thickness, is loaded in the central part of a sample stand 10, and an image of the central part of a surface height of a standard mark is stored in the central part standard mark signal storage part 35. Next, a sample 17 is also similarly installed in the outermost peripheral part, and an image is acquired to be preserved in the outer peripheral part standard mark signal storage part 36. A deflection correcting table to an optional height is calculated through the comparison operation part 37, the outer peripheral part strain quantity storage part 38 and a removal operation circuit 39 of an outer peripheral part strain quantity to be preset in a renewal control means 41 of a correction table so that the table is renewed in the desired timing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sample holder for holding a sample such as a semiconductor wafer, a semiconductor manufacturing apparatus having the sample holder, a semiconductor inspection apparatus, a circuit pattern inspection apparatus,
The present invention relates to a charged particle beam application device, a calibration substrate, a sample holding method, a circuit pattern inspection method, and a charged particle beam application method.

[0002]

2. Description of the Related Art With the miniaturization of circuit patterns on semiconductor wafers, circuit pattern inspection apparatuses using electron beams have been put to practical use.

For example, Japanese Patent Publication No. 59-192943, Japanese Patent Publication No. 5-258703, Sandland, et al.
al., “An electron-beam inspection system for x-ra
y maskproduction ”, J. Vac. Sci. Tech. B, Vol. 9, N
o.6, pp.3005-3009 (1991), reference Meisburger, et al.,
“Requirements and performance of an electron-beam
column designed for x-ray mask inspection ”, J. Va
c. Sci. Tech. B, Vol. 9, No. 6, pp. 3010-3014 (1991),
Literature Meisburger, et al., “Low-voltage electron-opti
cal system for the high-speed inspection of integr
ated circuits ”, J. Vac. Sci. Tech. B, Vol. 10, No.
6, pp.2804-2808 (1992), reference Hendricks, et al., “Cha
racterization of a New Automated Electron-Beam Waf
erInspection System ”, SPIE Vol. 2439, pp.174-183
(20-22 February, 1995) and the like are known.

In order to carry out high-throughput and high-precision inspection following the increase in the diameter of a wafer and the miniaturization of a circuit pattern, it is necessary to acquire a high SN image at a very high speed. Therefore, one of ordinary scanning electron microscopes (SEM)
The number of electrons irradiated by using a large current beam of 00 times or more (10 nA or more) is secured, and a high SN ratio is maintained. Furthermore, high-speed and high-efficiency detection of secondary electrons and reflected electrons generated from the substrate is essential.

In addition, a semiconductor substrate having an insulating film such as a resist is irradiated with a low-acceleration electron beam of 2 KeV or less so as not to be affected by charging. This technology is described in “The Electron and Ion Beam Handbook (2nd Edition)” edited by the 132nd Committee of the Japan Society for the Promotion of Science (Nikkan Kogyo Shimbun, 1986).
It is described on pages 22 to 623. However, with a large current,
In addition, low-acceleration electron beams cause aberrations due to the space charge effect, making it difficult to perform high-resolution observation.

As a method for solving this problem, there is known a method of decelerating a high acceleration electron beam immediately before a sample and irradiating the sample with a substantially low acceleration electron beam. For example, there are techniques described in Japanese Patent Application Laid-Open Nos. H2-142045 and 6-139985.

Hereinafter, an example of an electron optical system of a conventional circuit pattern inspection apparatus will be schematically described with reference to FIG. FIG. 9 is a schematic view of an electron optical system of a circuit pattern inspection apparatus according to the related art.

The primary electron beam 201 emitted from the electron gun 1 by the voltage of the extraction electrode 2 passes through the condenser lens 3, the scanning deflector 5, the diaphragm 6, the shield pipe 7, the objective lens 9 and the like, and is converged and deflected. Irradiation is performed on a substrate to be inspected 10 such as a semiconductor device on the XY stage 11 and the rotary stage 12. A deceleration voltage (hereinafter, referred to as a retarding voltage) is applied to the inspection target substrate 10 from a high-voltage power supply 23 for decelerating the primary electron beam. The first secondary electrons 202 are generated from the substrate to be inspected 10 by the irradiation of the primary electron beam 201. The first secondary electrons 202 are accelerated to an energy of several keV by the retarding voltage. An E-cross B deflector 8 is provided adjacent to the electron gun side of the objective lens 9.

The E-cross B deflector 8 is used for the primary electron beam 2
01 is a deflector that deflects the first secondary electrons 202 by superimposing them on the first secondary electrons 202 because the amounts of deflection by the electric field and the magnetic field cancel each other. The accelerated first secondary electrons 202 are deflected by the E-cross B deflector 8, and further, an attraction voltage between the externally attached suction electrode 14 and the secondary electron detector 13. Are attracted to the electric field formed and incident on the secondary electron detector 13.

The secondary electron detector 13 is constituted by a semiconductor detector. The first secondary electrons 202 are incident on the semiconductor detector to form electron-hole pairs, which are taken out as a current and converted into electric signals. This output signal is further amplified by the preamplifier 21 and becomes a luminance modulation input for an image signal. After the image of one area on the substrate is obtained by the operation of the electron optical system described above, the image output signal is delayed by one screen, and the image of the second area is similarly obtained. The two images are compared by an image comparison and evaluation circuit, and a defective portion of the circuit pattern is detected. Here, the irradiation position of the primary electron beam 201 is determined by the scanning deflection signal input to the scanning deflector 5 as the position where the beam is irradiated onto the substrate.

However, when the surface height of the substrate fluctuates due to the warpage of the wafer or the like, even if scanning is performed with the same deflection signal, the area of the substrate irradiation position of the electron beam substantially fluctuates, and the beam is irradiated to the same area. No deflection is obtained.

In view of this, the following deflection correction method has conventionally been employed in electron beam application apparatuses such as an electron beam drawing apparatus.

(1) At least two samples with standard marks having different thicknesses are installed on the outermost peripheral portion of the sample table, and the displacement of the image signal of the standard mark at each height is calculated. (2) Along with the calculation of the displacement, an optical sensor for sequentially measuring the height of the sample surface is installed and operated to signal the height of the standard mark.

(3) A deflection correction table corresponding to the height is calculated and stored from the positional shift between the height signal of the standard mark and the image signal, and the deflection correction is performed according to the height of the substrate surface when observing the substrate. The signal is calculated to correct the deflection.

According to this technique, even when the height of the wafer surface fluctuates due to a warp of the semiconductor wafer or the like, the deflection signal is corrected and the same deflection area can be irradiated with the electron beam regardless of the height of the wafer surface. Become like This technology is
For example, it is described in Japanese Patent Publication No. 56-103420. According to the present technology, the reference mark of the outer peripheral portion can be observed any number of times while holding the wafer, and the deflection correction table can be easily updated. Therefore, even with respect to the drift of the primary beam deflection amount due to the time change of the electron optical system, the standard mark is re-observed about a dozen times at a certain time interval during processing of one wafer, and the deflection correction table is changed each time. By updating, the deflection correction can follow the time change.

However, a circuit pattern inspection apparatus embodying the above-described deflection correction method has not been realized until now.

It is the gist of the present invention that the above-described deflection correction method is also employed in a circuit pattern inspection apparatus as a deflection correction method corresponding to the warpage of a wafer. However, when the present deflection correction method is employed as it is in a circuit pattern inspection apparatus, there are the following problems.

By applying a retarding voltage to the substrate, there is a problem that the primary electron beam is affected by the retarding electric field immediately before irradiating the substrate.

Generally, the electric field change is distributed axially symmetrically with respect to the center axis of the primary electron beam. Therefore, by adjusting the deflection sensitivity uniformly irrespective of the wafer position, the primary electron beam can be adjusted to a desired area. Can be deflected. However, in the outer peripheral portion of the wafer, there is a problem that an asymmetrical disturbance of the retarding electric field occurs on the axis due to the cross-sectional shape of the wafer itself and the cross-sectional structure of the end of the sample stage on which the wafer is placed.

In the circuit pattern inspection apparatus, since a signal is obtained by one scanning with a large current, the beam diameter is reduced to a desired value and the retarding voltage is several times or more as compared with other electron beam application apparatuses in order to irradiate at a low acceleration. High voltage. Therefore, there is a problem in that the amount of change in the retarding electric field is larger than in other electron beam application devices.

Therefore, there is a problem that a so-called beam distortion occurs in the substrate irradiation area of the primary beam due to the same deflection signal, depending on whether or not the observation position of the substrate is near the outer peripheral portion on the wafer. is there.

In this situation, when a deflection correction table is created by providing two standard marks having different thicknesses on the outermost peripheral portion of the sample table as in the case of other electron beam application devices, the above-described sample is added to the deflection correction table. The influence of the beam distortion peculiar to the outer periphery of the table is added. As a result, even if the deflection correction table is referred to from the measurement result of the sample surface height at the center of the sample table, it is not possible to obtain an appropriate deflection correction signal for the position, and the beam may shift the irradiation position. is there.

This beam irradiation position shift causes a shift in pixels of an image signal obtained thereby, and causes a reduction in accuracy in the comparative inspection of images. If this pixel shift exceeds a certain allowable range, a circuit pattern inspection apparatus for comparing and inspecting images has a problem that the inspection accuracy is fatally reduced.

On the other hand, in a semiconductor manufacturing apparatus or a semiconductor inspection apparatus, an electron beam application apparatus which irradiates a sample with an electron beam to process or inspect the sample must irradiate the electron beam in a vacuum. Further, in order to improve the processing accuracy of the sample or the resolution of an image obtained during the inspection, it is necessary to control the irradiation energy intensity of the generated electron beam.

In recent years, an electron beam lithography apparatus for processing a semiconductor pattern by irradiating an electron beam, a length measuring SEM (scanning electron microscope length measuring apparatus) for measuring the width of a pattern on a semiconductor surface,
An electron beam application device such as an analytical SEM that analyzes a semiconductor material by irradiating an electron beam employs a method called retarding, which applies a voltage to a sample to control the intensity of the electron beam irradiation energy. I have. This technique is described in, for example, Japanese Patent Publication No. Hei 5-258703 and Japanese Patent Publication No. Hei 6-188294.

However, these measurement SEM and analysis SEM
In a sample holder of an electron beam application apparatus including the above, no consideration was given to the fluctuation of the electric field generated at the end of the sample due to the application of the retarding voltage. As a result, even if you try to irradiate the electron beam to the end of the sample,
Due to the fluctuation of the electric field, the accuracy of the relationship between the electron beam irradiation position and the sample position is significantly reduced, and therefore,
The portion near the end of the sample could not be processed, analyzed or inspected.

[0027]

SUMMARY OF THE INVENTION A first object of the present invention is to perform processing, analysis and inspection while preventing a decrease in the accuracy of the relationship between the electron beam irradiation position at the end of the sample and the sample position. Is to do so.

A second object of the present invention is to irradiate an electron beam onto a sample without deteriorating the accuracy of the irradiation position in an electron beam application apparatus having a function of controlling the electron beam irradiation energy by a retarding voltage. And

[0029]

As a means for achieving the first object of the present invention, a representative example of a circuit pattern inspection apparatus according to the present invention will be described.

The circuit pattern inspection apparatus according to the present invention converges the primary charged particle beam and converts the first and second circuit patterns of the sample.
An irradiation optical system that scans and deflects the area, deceleration of the primary charged particle beam, acceleration / deceleration means for accelerating secondary charged particles and reflected electrons generated from the sample by the irradiation, and a sample stage holding the sample. A sensor for measuring a surface height of an irradiation position of the primary charged particle beam on the sample, a detector for detecting charged particles generated from the sample, and forming an image of an irradiation area of the sample from the detection signal. In the circuit pattern inspection apparatus having the image forming means, the sample stage is configured such that at least two standard mark samples having different thicknesses in the beam axis direction can be set on the outer peripheral portion of the substrate setting portion, and is substantially similar to the standard mark sample. A storage means for storing an image signal of a standard mark sample at a central portion of at least two substrate mounting portions, and a distortion amount of a primary charged particle beam peculiar to an outer peripheral portion from both standard mark image signals Calculating means for calculating; removing means for removing the distortion amount peculiar to the outer peripheral portion from the outer peripheral portion standard mark image signal; and a deflection correction table corresponding to the sample height from the outer peripheral portion standard mark image signal after removing the distortion amount. Means for creating and storing the data, a deflection correction signal generating means for extracting a deflection correction signal from the deflection correction table in accordance with the surface height signal obtained by the sensor, and irradiating the outer peripheral standard mark sample at a desired timing. And a control means for updating the deflection correction table.

It should be noted that a shield electrode is provided near the substrate in order to reduce disturbance of the retarding electric field.

The circuit pattern inspection apparatus having the above configuration and the method thereof will be functionally described. The circuit pattern inspection apparatus can obtain a characteristic distortion amount of the outer peripheral portion of the sample by comparing the height dependence of the amount of deflection correction at the central portion of the sample stage with respect to the outer peripheral portion of the sample. By calculating the height dependence of the deflection correction amount by removing the distortion amount peculiar to the outer peripheral portion from the standard mark signal at the outer peripheral portion, it is possible to know a correction amount equivalent to the deflection correction amount obtained at the central portion. .

In addition, since an appropriate deflection correction table can be created only from the standard marks on the outer peripheral portion, the deflection correction table on the outer peripheral portion is calculated and updated a desired number of times while the wafer is installed. be able to. As a result, it is possible to accurately obtain a deflection correction table including a surface height dependency that can follow a beam drift or the like without lowering the throughput.

On the other hand, in the outermost peripheral portion of the wafer, there is a region where a position shift that cannot be completely corrected by the same correction table exists. If the image comparison result in this region is output as it is, a large amount of erroneous detection will occur. May occur. For this reason, in the present invention, a configuration is also implemented in which inspection is not performed in a region on the wafer that cannot be completely corrected by the same correction table. As a result, high-precision inspection without erroneous detection has become possible.

Further, by providing a shield electrode at the same potential as the retarding voltage of the sample near the sample, disturbance of the electric field near the sample can be reduced and the wafer can be corrected by the same correction table. A larger area was realized.

Due to these effects, the circuit pattern inspection apparatus according to the present invention does not cause a beam irradiation position shift under a condition of applying a high retarding voltage without deteriorating the accuracy, and does not cause the displacement of the insulator or the insulator. Capable of acquiring a circuit pattern in the manufacturing process of a semiconductor device containing a conductive substance mixed with an electron beam at high speed and stably as an image with high irradiation position accuracy, and automatically comparing and inspecting the image to detect defects without error. It is.

Further, in order to achieve the second object of the present invention, the present invention employs the following means.

The electron beam application apparatus includes a vacuum chamber for irradiating a sample such as a semiconductor device with an electron beam, a loader for transferring the sample into the vacuum chamber, and a movable stage for mounting the sample and adjusting the irradiation position of the electron beam. , A sample holder between the stage and the sample for holding the sample, a power supply for applying a retarding voltage to the sample, a position measuring device for measuring the movement or position of the stage, and a sample for processing and observation of the sample It consists of an electron source and a deflector that irradiates the sample with an electron beam, and an information processing device that observes, analyzes, and inspects the sample using information obtained by detecting reflected electrons and secondary electrons generated from the sample. I have. The boundary between the sample holder and the sample on the side of the electron beam irradiation surface is set to be substantially the same as the height of the sample surface. In this way, the electric field distribution on the surface of the sample becomes substantially uniform over the end of the sample, and the fluctuation of the electric field caused by the retarding voltage can be prevented. As a result, it is possible to irradiate the entire surface of the sample with the electron beam without lowering the position accuracy.

[0039]

Embodiments of the present invention will be described below with reference to the drawings.

Hereinafter, embodiments of the circuit pattern inspection apparatus and method and the calibration substrate according to the present invention will be described with reference to FIGS. 1 to 8.

Embodiment 1 A circuit pattern inspection apparatus according to an embodiment of the present invention will be described with reference to FIGS.

The basic concept of the circuit pattern inspection apparatus according to the present embodiment is that the cross-sectional shape of the outer peripheral portion of the substrate and the sample table which becomes apparent due to the high retarding voltage applied to the substrate is high. A high-precision inspection is performed by optimizing the deflection correction table as much as possible, taking into account the disturbance of the electric field due to the retarding voltage.

Another object of the present invention is to provide an electrode for flattening the disturbance of the retarding electric field so as to reduce the area where the correction cannot be made to a practically acceptable range.

FIG. 1 is a longitudinal sectional view showing the configuration of a circuit pattern inspection apparatus according to the present invention. With reference to FIG. 1, a circuit pattern inspection apparatus according to the present embodiment will be described in detail. The circuit pattern inspection apparatus roughly includes an electron optical system 101, a sample chamber 102, a control unit 103, and an image processing unit 104.

The electron optical system 101 comprises an electron gun 1, an electron beam extraction electrode 2, a condenser lens 3, a scanning deflector 5, a diaphragm 6, a shield pipe 7, an E cross B deflector 8,
It comprises an objective lens 9, a ground electrode 15, and a shield electrode 16.

The sample chamber 102 includes an XY stage 11, a rotary stage 12, an optical sample height measuring device 26, and a position monitoring length measuring device 27. The secondary electron detector 13 has an objective. An output signal of the secondary electron detector 13 located below the lens 9 is amplified by a preamplifier 21 and converted into digital data by an AD converter 22.

The image processing unit 104 includes an image storage unit 30a,
30b, an operation unit 33, and a defect determination unit 34. The captured electron beam image and optical image are displayed on the monitor 3
2 is displayed.

Operation commands and operation conditions of each section of the circuit pattern inspection apparatus are input and output from the control section 103. In advance, conditions such as an acceleration voltage at the time of generation of an electron beam, an electron beam deflection width, a deflection speed, a moving speed of a sample stage, and a signal fetch timing of a detector are input to the control unit 103.

Further, a correction signal is generated from the signals of the optical sample height measuring device 26 and the position monitoring length measuring device 27, and the power supply 25 of the objective lens 9 is applied so that the primary electron beam 210 is always irradiated to the correct position. The correction signal is sent from the correction control circuit 28 to the scanning signal generator 24.

The electron gun 1 uses a diffusion-supply type thermal field emission electron source. As a result, it is possible to obtain a comparative inspection image with small fluctuations in brightness and to increase the electron beam current, thereby enabling high-speed inspection.

The primary electron beam 201 is extracted from the electron gun 1 by applying a voltage to the extraction electrode 2. The primary electron beam 201 is accelerated by applying a high negative potential to the electron gun 1. Thereby, the primary electron beam 201 has energy corresponding to the potential, for example, 12 k in this embodiment.
The substrate 1 moves toward the XY stage 11 at eV, is converged by the condenser lens 3, is further narrowed down by the objective lens 9, and is mounted on the XY stage 11.
0 (specifically, a wafer or a chip).

A high voltage power supply 23 can apply a negative voltage, that is, a retarding voltage, to the substrate 10 to be inspected. A ground electrode 15 was provided between the test substrate 10 and the E-cross B deflector 8, and a retarding electric field was formed between the ground electrode 15 and the test substrate 10. By adjusting the high-voltage power supply 23 connected to the substrate 10 to be inspected, it is possible to easily adjust the electron beam irradiation energy to the substrate 10 to be inspected to an optimum value.

In this embodiment, a negative potential of -11.5 kV is applied to the substrate to be inspected 10 as a retarding voltage. The image formation includes a method in which the XY stage 11 is stopped and the primary electron beam 201 is two-dimensionally scanned, and a method in which the primary electron beam 201 scans only one-dimensionally, and is moved in a direction substantially orthogonal to the scanning direction. 11 can be selected from any of the following methods.

To inspect only a specific place, X
-Inspection is performed while the Y stage 11 is stationary,
When inspecting a wide range of the XY stage, if the XY stage 11 is continuously moved and inspected, efficient inspection can be performed.

In order to obtain an image of the substrate to be inspected 10, the substrate to be inspected 10 is irradiated with a narrowed down primary electron beam 201 to generate first secondary electrons 202. By detecting in synchronization with scanning and movement of the XY stage 11, a surface image of the substrate to be inspected 10 is obtained. In this embodiment, the generated first secondary electrons 2
02 is applied by the reflection member 300, and the generated secondary electrons 203 are detected by the secondary electron detector 13.

In the automatic inspection according to the present embodiment, it is essential that the inspection speed is high. Therefore, scanning is performed at a low speed with a beam current on the order of pA as in a normal SEM, or scanning is not performed a plurality of times. In view of this, an image is formed by a single scan with a large current electron beam of, for example, 100 nA, which is about 100 times or more that of a normal SEM.

One image is acquired at 1000 × 1000 pixels in 10 msec. The image signal is delayed by one image, and the image comparison and evaluation are performed in synchronization with the capture of the next image. A search for defects on the inspection substrate 10 was performed.

FIG. 2 is a plan view showing a state of mounting a substrate to be inspected on a circuit pattern inspection apparatus, and FIG. 3 is an electric field distribution diagram showing a result of a simulation of an internal electric field of the circuit pattern inspection apparatus. The substrate 10 to be inspected is an XY stage 1
1 With the above configuration, when a retarding voltage is applied to the substrate to be inspected 10, a retarding electric field along the shape of the substrate to be inspected 10 is generated.

As shown in FIG. 2, the XY stage 11 has four protrusions C ₁ , C ₂ , C ₃ , C ₄ around the substrate 10 to be inspected.
The provided a movably installed configuration with the inner one C ₁ is interposed a spring that. The surface of the substrate to be inspected 10 is macroscopically regarded as flat, and when observing the center of the substrate, FIG.
It is considered that the electric field distribution does not have the disturbance shown in FIG.

On the other hand, as shown in FIG. 2, in the outer peripheral portion of the substrate 10 to be inspected, the cross-sectional shape of the substrate to be inspected 10 itself is not uniform, and the protrusions C ₁ , C ₂ , C ₂ for suppressing the substrate are not provided.
_3, C ₄ has an electric field is disturbed by the projection around as in FIG. 3 (b). Here, the disturbance of the retarding electric field is reduced by the shield electrode 16 provided between the test substrate 10 and the ground electrode 15. The distribution of the electric field affects the primary electron beam 201 as follows.

FIG. 4 is a schematic diagram illustrating the electron trajectory, and FIG. 5 is a relationship diagram showing the relationship between the spread of the electron irradiation position and the deflection position. As shown in FIG. 4, the primary electron beam 201 does not irradiate the inspection target substrate 10 with a linear trajectory from an intersection of a beam axis and a deflecting beam line, that is, a so-called deflection fulcrum (not shown). The speed is reduced as approaching the vicinity of the substrate to be inspected 10, and is expanded by a minute amount compared to the linear trajectory due to the axially symmetrical deflection effect of the retarding electric field. When the primary electron beam 201 irradiates the central portion of the substrate 10 to be inspected, the surface of the substrate 10 to be inspected is considered to be macroscopically substantially flat, and this axially symmetric spread may be considered.

At the time of irradiation of the central portion of the substrate 10 to be inspected shown in FIG. 4, the primary electron beam 201 reaches an irradiation position x1 which changes linearly with respect to the irradiation position x0 by the deflection signal. The irradiation position x1 is, as shown in FIG.
Is a value corresponding to the surface height of.

On the other hand, when irradiating the outer peripheral portion of the substrate 10 to be inspected, the primary electron beam 201
Due to the disturbance of the near electric field generated according to the cross-sectional shape of 0, a further deflecting effect is exerted. As shown in FIG. 5, when observing the outer peripheral portion, the irradiation position x2 of the primary electron beam 201 moves substantially parallel to one direction on the substrate 10 to be inspected. The movement amount (x2−x1) is the beam distortion amount, and depends on the cross-sectional shape near the irradiation position.

As a result of examination, it has been found that this movement amount (x2-x1) can reach about several tens of percent of the deflection width. At the same time, the amount of beam distortion (x2-x1)
It is also found that does not strictly change linearly with respect to the expected irradiation position. Since the beam distortion at the outer peripheral portion of the substrate is non-linear and non-negligible, the following two problems occur.

The correction at the time of observing the outer peripheral portion and the correction at the time of observing the central portion cannot be completely corrected by the same correction table, and the standard mark sample for generating the deflection correction table is the XY stage 11. In the case where the correction table is provided on the outer peripheral portion, the correction table has an amount including the distortion of the primary electron beam 201, and there is a problem that an appropriate deflection correction cannot be achieved.

The purpose of the present circuit pattern inspection apparatus is to perform high-speed automatic image comparison inspection.
It is necessary to generate a deflection correction table that follows the beam drift due to the time change and has a short required time.

Therefore, in the configuration of the circuit pattern inspection apparatus according to the present invention, the image comparison inspection is performed while correcting the deflection in the procedure shown in FIG. FIG. 6 is a flowchart for explaining the operation procedure and a plan view of the mounted substrate to be inspected. First, a basic calibration flow is performed at the time of periodic maintenance of the circuit pattern device, and the like.

Specifically, a sample (+200 μm, −2
(00 μm) is loaded, and an image at the center of the surface heights zH and zL of the standard mark is obtained. The central standard mark signal storage unit 35 stores the image signals of the two surfaces. Surface height z of the standard mark
H and zL are set to the same width as the surface height fluctuation width due to the warpage of the substrate 10 to be inspected. Next, similarly, samples 17 with two standard marks having different thicknesses are set on the outermost peripheral portion, and an image is obtained, and is stored in the peripheral standard mark signal storage unit 36.

FIG. 7 shows an example of the image signal of the standard mark obtained in the present invention. FIG. 7 is a schematic diagram illustrating an example of an image display.

As shown in FIG. 7, the true configuration of the standard mark [xk], the central standard mark signal [x3], and the outer peripheral standard mark signal [x2] form different mark images. I do. The storage unit 35 for the central standard mark signal [x3] and the peripheral standard mark signal [x3]
The signal read from the storage unit 36 of [2] is compared with the comparison operation unit 37.
Is converted into a deflection distortion coefficient [B]. That is, the outer peripheral distortion coefficient B is calculated from the displacement of the signal of the standard mark between the central part and the outer peripheral part, and stored in the outer peripheral distortion amount storage unit 38.

The outer peripheral distortion coefficient B is defined by the following equations (1) and (2).

[X2 (zH)] = [B (zH)] [x3 (zH)] (1) [x2 (zL)] = [B (zL)] [x3 (zL)] (2) The calibration flow using the next outer peripheral standard mark is performed for each wafer while the outer peripheral distortion amount B during the periodic maintenance is stored. As in the case of the basic calibration, an image of a sample having two standard marks with heights zH and zL installed on the outermost peripheral portion of the sample table is formed. | ZH−zL | is 400 μm.

Then, [x2 (zH)] and [x2 (zL)] of the position signals of the standard marks on the outer peripheral portion are stored in the storage unit 36. This is compared with the true configuration position xk of the standard mark and the signal [x2] of the outer standard mark by an outer peripheral distortion removal calculation circuit 39 to calculate the outer peripheral deflection distortion coefficient C.

The outer peripheral deflection distortion coefficient C is defined by the following equations (3) and (4).

[X2 (zH)] = [C (zH)] [xk] = ([A (zH)] + [B (zH)]) [xk] (3) [x2 (zL)] = [ C (zL)] [xk] = ([A (zL)] + [B (zL)]) [xk] (4) Next, in the distortion amount, the standard mark is the outermost periphery of the sample table. Therefore, the distortion amount peculiar to the outer peripheral portion is included.

The distortion [B] generated only in the outer peripheral part from the difference between the outer peripheral standard mark signal and the central standard mark signal shown in the above equations (1) and (2) is substituted into the above equations (3) and (4). Then, the distortion coefficient [B] of the outer peripheral part is subtracted, and the deflection distortion coefficient [A] equivalent to the distortion amount of the central part is calculated.

The deflection distortion coefficient [A] is defined by the following equations (5) and (6).

[A (zH)] = [C (zH)] − [B (zH)] (5) [A (zL)] = [C (zL)] − [B (zL)] (6) The deflection distortion coefficient [A] is obtained for each of two surfaces of the sample of the standard mark, and the deflection distortion coefficient [A] is obtained.
, A deflection correction table for an arbitrary height can be calculated in the storage unit 40.

The deflection correction table can be completed by obtaining the respective values using a so-called interpolation method, assuming that the height dependence is linear.

[A (z)] = ([A (zH)] − [A (zL)]) * (z−zL) / (zH−zL) + [A (zL)] (7) The calibration of the deflection correction table in stages requires the replacement of the substrate 10 to be inspected, and the frequent correction of the deflection correction table which is not affected by the beam distortion without frequently performing a basic calibration flow requiring a long time. It is now possible.

After completing and storing the deflection correction table according to the calibration flow described above, the normal inspection is started.

First, a region to be inspected on the substrate to be inspected 10 is sequentially measured by the sample height measuring device 26, a height signal is sent to the deflection correction signal generating circuit 29, and the deflection correction signal is referred to by referring to the deflection correction table. , The primary electron beam 201 is deflected, and an image signal is taken out. The extracted image signals are delayed by one image in a delay circuit 31 and compared by an arithmetic unit 33, and a defect determination unit 34 determines the presence or absence of a defect. In the present embodiment, the deflection correction table is stored in the electron optical system 1.
In order to follow the drift of the primary electron beam 201 accompanying the time change of 01 with high accuracy, the correction table update control means 41 performs the image observation of the outer peripheral standard mark 17 and the update of the deflection correction table for each wafer. At one time.

The new outer peripheral mark signal and the existing outer peripheral distortion amount are arithmetically processed to generate and update a deflection correction table from which the distortion amount has been removed. The table update can be set in advance in the correction table update control unit 41 so as to be performed at a desired timing.

In this embodiment, as shown in FIG.
The inspection invalid area control means 42 determines that inspection is impossible for an area where the deflection cannot be completely corrected by the same deflection correction table up to 10 mm from the outer periphery of the substrate 10 to be inspected. The irradiation of the line 201 itself was not performed.

Since the XY stage 11 has an anisotropic configuration, the beam distortion is not uniform, and the correction in consideration of the substrate position dependence of the correction table is very complicated and takes a long time. This is because

Further, a sample with an outer peripheral standard mark is configured to have a width of 10 mm in consideration of a beam within a range that can be corrected by the same deflection correction table, and an image is acquired at the center of the sample surface at each height. It was taken. The sample with the center standard mark was configured to have an area larger than that of the sample with the outer standard mark, and was operated so as to form an image of the standard mark at a position 10 mm or more away from the boundary between the two surfaces.

As a result of implementing the present invention, the erroneous detection rate was able to be reduced by about 20% as compared with the result obtained by performing the deflection correction without considering the beam distortion using the same electron optical system.

In the above embodiment, the case where an electron source and an electron beam are used has been described. However, when a charged particle source and a charged particle beam are used, the same configuration as the above-mentioned electron optical system is called an irradiation optical system. To

[Embodiment 2] Next, an example of a circuit pattern inspection apparatus according to another embodiment of the present invention will be described with reference to FIG.

FIG. 8 is a plan view showing the state of mounting the substrate to be inspected, similarly to FIG. In this embodiment, the XY stage 1
1 is the same as the first embodiment except that it has an isotropic configuration, and the description is not complicated. Therefore, only a partial configuration diagram is shown. The XY stage 11 is configured so that the periphery of the substrate 10 to be inspected as a sample has a height within +100 μm from the substrate surface and a width of 10 mm in the radial direction from the outer periphery, and employs an electrostatic chuck method. .

A portion having a central angle of 180 degrees or more around the substrate 10 to be inspected is made movable in the radial direction, and after the substrate is installed, the movable portion is closest to the substrate and fixed at a position in contact with the outer periphery of the substrate. Although this configuration was complicated and had some difficulties in actual operation, the beam distortion generated at the end of the substrate 10 to be inspected was reduced, and inspection was possible over almost the entire surface, up to 3 mm from the outer periphery. In this case, the inspection invalid area control means 42
There is no need to issue an invalid signal.

[Embodiment 3] Next, still another embodiment according to the present invention will be described. Although this embodiment is not shown,
The inner diameter of the shield electrode 16 in Example 1 was reduced by half from 30 mmφ to 15 mmφ. As a result, the disturbance of the retarding voltage was reduced, and inspection was possible up to 7 mm from the outer periphery.

As described above, according to the present invention, the disturbance of the electric field generated near the outer peripheral portion of the substrate to be inspected 10 which is a sample to which a high negative retarding potential is applied is considered in advance, and the distortion of the outer peripheral portion is reduced. It is possible to obtain a circuit pattern inspection apparatus or an inspection method for performing highly accurate deflection correction of the primary electron beam 201 according to the height of the irradiation position of the substrate without being affected. For this purpose, the deflection correction table is taken from the position of the outer peripheral inspection mark, but the diameter of the XY stage 11 is made sufficiently larger than the wafer, and the installation position of the standard mark 17 is sufficiently inside so as not to cause beam distortion. It can be installed.

Also, by changing the retarding voltage, the influence of the disturbance of the electric field changes, and the inspection effective area changes accordingly. If the control means 42 is configured in consideration of this, the inspection can be performed with less waste. Becomes possible. It should be noted that the numerical values described in the embodiments are merely examples, and it is needless to say that implementation with different specifications is also possible. Considering conditions such as the size and thickness of the substrate, the fluctuation width of the surface height due to warpage, and the retarding voltage, the width and height of the projections for holding the substrate on the sample stage and the holes for dropping the substrate, and the standard mark sample By optimizing the thickness, size, etc., the circuit pattern can be inspected more efficiently and with high accuracy.

As described above, according to the present invention, under the condition of applying a high retarding voltage, the beam is not affected by the beam distortion at the outer peripheral portion of the substrate without deteriorating the accuracy. As a result, it is possible to perform deflection correction according to the sample height, and as a result, the beam irradiation position does not shift in the comparative inspection image, and the circuit in the manufacturing process of the semiconductor device in which the insulator or the insulator and the conductive material are mixed is not generated. The pattern can be acquired at high speed and stably by the electron beam as a high-precision image of the irradiation position, and the image can be automatically compared and inspected to detect a defect without error. Further, the result can be reflected in the manufacturing conditions of the semiconductor device, so that the reliability of the semiconductor device can be improved and the defect rate can be reduced.

[Embodiment 4] Next, still another embodiment according to the present invention will be described.

As an example of the electron beam application apparatus, an example of a semiconductor inspection apparatus using an electron beam will be described below. FIG.
FIG. 0 shows a longitudinal sectional view of a main part of a semiconductor inspection apparatus using an electron beam. In a semiconductor inspection apparatus, it is inspected whether a circuit pattern formed on a semiconductor wafer or a circuit pattern mask for transferring a circuit pattern to the wafer is as desired, and the wafer or the mask becomes a sample.

In FIG. 10, the electron optical system of the semiconductor inspection apparatus includes an electron gun 502 that is supplied with electricity from a power supply 501 and emits electrons, and an electron beam 5 drawn from the electron gun 502.
03, a converging lens 506a and an objective lens 506b for converging and irradiating the electron beam 503 on the wafer 510 as a sample,
A deflector 511 for deflecting the electron beam 503 to irradiate a desired position on the wafer 510, a secondary electron detector 515 for detecting secondary electrons generated from the wafer 510 by irradiation of the electron beam 503, and the secondary electron detector 515. Secondary electron detector 5
It comprises a mirror body 505 having a built-in Wien filter 514 for changing the direction to the direction of 15. The magnitude of the current applied to the deflector 511 and the objective lens 506b is controlled by the controller 5
13 is controlled.

The wafer 510 is transferred from the load lock chamber 519 to the sample chamber 507 by the transfer device 520 and placed on the sample holder 521. The position of the sample holder 521 is fixed by a pallet guide 526 of a movable stage 508. The mirror body 505 and the sample chamber 507 are
A vacuum is maintained at 4a, 504b, 504c, 504d. A gate valve 518 is provided between the load lock chamber 519 and the sample chamber 507, and is opened only when the wafer 510 is transferred.

Since the scanning range of the electron beam 503 by the deflector 511 is narrower than the size of the wafer 510, the stage 508 is moved continuously or intermittently to irradiate the circuit pattern of the wafer 510 to be inspected with the electron beam 503. I do.
At this time, the position of the wafer 510 is adjusted by the stage 50.
8 is measured by the laser interferometer 512 and the control device 51
The correction is performed by superimposing a correction amount indicating the position of the stage 508 on the amount of deflection of the electron beam 503 in step 3.

Secondary electrons generated from the wafer 510 by irradiation with the electron beam 503 are deflected by the Wien filter 514 in the direction of the secondary electron detector 515 and detected.
The detected amount of secondary electrons is amplified by the amplifier 516 and then output from the information processing device 517 as an image signal.

To improve the resolution of the secondary electron image, the voltage of the electron beam 503 may be increased, but the sample may be destroyed depending on the type of the irradiated sample. In order to prevent this, a retarding power supply 509 is used.
A negative retarding voltage is applied to the sample from
A method of decelerating 3 before the sample is known. This method is particularly effective for a sample such as a semiconductor wafer.

FIG. 11 is a perspective view showing the configuration of the stage 508 and the sample holder 521, and a part thereof is shown in a cross section.

The sample holder 521 is placed on the stage 508.
Is guided by the pallet guide 526 and the position is fixed. The wafer 510 is placed on the sample holder 521 by the electrostatic chuck 52.
Posted via 1a. The periphery of the wafer 510 is surrounded by a holding plate 521b. The sample holder 521 is provided with a transfer port 531 for loading and unloading a wafer. The stage 508 is moved by the drive rods 525a and 525b in the direction guided by the straight guides 527a and 527b.

FIG. 12 shows the sample holder 521 shown in FIG.
12A and 12B are a plan view and a vertical sectional view, respectively.
12B shows the state before the movement of the holding plate 521b around the wafer 10, and FIG.

In FIG. 12A, when the wafer 510 is transferred from the transfer port 531 into the sample holder 521, it is placed on the electrostatic suction device 521a. Next, lift mechanism 5
28, the lift direction 53 as shown in FIG.
6, is raised to almost the same height as the holding plate 521b,
The height of the surface of the wafer 510 is substantially the same as the height of the surface of the holding plate 521b of the sample holder 521. Next, the holding plate 521 b divided into two or more pieces is moved in the sliding direction 535 toward the center of the wafer 510 in the holding machine sliding mechanism 532.
And contacts the edge of the wafer 510. In the embodiment of the present drawing, an example is shown in which the holding plate 521b is divided into four pieces.

Here, it is desirable that the height of the surface of the wafer 510 and the height of the surface of the holding plate 521b of the sample holder 521 are completely the same, but it is not possible to make them completely the same due to processing accuracy, assembly accuracy and the like. Have difficulty. Therefore, it is necessary to consider the dimensional tolerance with respect to the identity of the heights of the two, and the inventors have found this through experiments. Details will be described later.

Further, in this embodiment, there is a slight gap 537 between the wafer 510 and the holding plate 521b, and it is desirable that there is no gap. However, a gap 537 is formed due to the degree of processing accuracy of the outer peripheral dimension of the wafer 510 and the dimension of the holding plate 521b. The dimensional tolerance of the gap will be described later.

Embodiment 5 FIG. 13 shows another embodiment of the present invention, and is a plan view and a longitudinal sectional view of a sample holder 521. The wafer 510 is placed on the electrostatic suction device 521a,
One of the plurality of holding pins 539 moves in the pin moving direction 540, and the position of the wafer 510 is fixed. Next, the holding plate 521c moves in the lift direction 536, and the height of the surface of the wafer 510 and the height of the surface of the holding plate 521c become substantially the same.

FIGS. 14 and 15 show the structure of a conventional sample holder. FIG. 14 is a plan view and a side view of a conventional sample holder.

In FIG. 14, a wafer 510 is placed on a support 530 fixed on a sample holder 521, and the position is fixed by a plurality of bearings 529. Therefore, the height of the sample holder 521 around the edge of the wafer 510 is lower by the thickness of the wafer 510.

FIG. 15 is a plan view and a side view of a conventional sample holder. In FIG. 15, a wafer 510 is placed on an electrostatic chuck 521a fixed on a sample holder 521, and the position is fixed by a plurality of claws 523a, 523b, 523c. The cross-sectional shape of the claw 523a is shown in FIG.
As shown in FIG. 15 (c), the shape of the nail 523b as shown in FIG. 15C and the shape of the nail 523c as shown in FIG.
23a, 523b, and 523c project. The simulation described below was performed on the assumption that such a conventional sample holder was used.

FIGS. 16 to 18 are electric field distribution diagrams simulating the distribution of the electric field on the surface of the wafer 510 when the wafer 510 is fixed to the sample holder 521 and irradiated with an electron beam 503 by applying a retarding voltage. is there. The plurality of lines are equipotential lines 524 connecting equal voltages.

FIG. 16 shows an electron beam 5 at the center of wafer 510.
03 is shown. The center of the figure is the locus of the electron beam 503. The equipotential lines 524 on the surface of the wafer 510 are parallel to the surface of the wafer 510 up to the vicinity of the shield electrode 541, and no change such as disturbance is observed. In such a portion, there is no dimensional influence due to the retarding potential on the electron beam 503. In the vicinity of the shield electrode 541, the equipotential line 524 is apart from the surface of the wafer 510.

FIG. 17 shows an electric field distribution diagram based on the results of an electric field simulation when the protrusion of the sample holder 521 is 1 mm higher than the wafer 510 at the end of the wafer 510. FIG. 17A shows a case where the irradiation position of the electron beam 503 is 5 mm away from the protrusion, and FIG. 17B shows a case where the irradiation position of the electron beam 503 is 10 mm away from the protrusion.

When comparing FIG. 17A and FIG. 17B,
The electron beam 503 in FIG.
The closer to, the more the electric field fluctuates. In the range of 5 mm from the protrusion, the electric field fluctuates, and it is expected that the irradiation position of the electron beam 503 is likely to be disturbed.

FIG. 18 shows an electric field distribution diagram based on the results of an electric field simulation when the periphery of the edge of the wafer 510 is a space. FIG. 18A shows the case where the irradiation position of the electron beam 503 is 5 mm from the edge of the wafer, and FIG.
Is 10 mm from the edge of the wafer.

A comparison between FIGS. 18A and 18B shows that
The variation of the equipotential lines 524 is larger in the case (a) than in the case (b), that is, as the irradiation position of the electron beam 503 is closer to the end of the wafer 510, and the irradiation position of the electron beam 503 is more likely to be disturbed. It is expected that. Therefore, the wafer 510
It should be understood that it is necessary to avoid providing a large space at the end of.

Therefore, when a projection or a low space with a height is provided outside the edge of the wafer 510, the irradiation position of the electron beam 503 should not be disturbed by at least 10 mm inside the edge of the wafer 510. I understood.

Referring to the electric field distribution diagram based on the results of the electric field simulation described above, in order to prevent the electric field at the edge of the wafer 510 from fluctuating and to prevent the irradiation position of the electron beam 503 from being affected, the sample holder 521 is required. It has been found that setting the periphery of the edge of the wafer 510 to the same height as the surface of the wafer 510 is effective.

Although it is difficult to make the height of the wafer 510 and the height of the sample holder 521 completely the same due to errors in machining and assembly, etc., the experiments by the inventors were difficult. According to this, the end surface of the wafer 510 and the sample holder 5
If the height difference of the electron beam 21 is ± 200 μm,
It was found that the influence on the irradiation position was almost negligible.

The wafer 5 shown in FIGS.
A gap 537 is formed between the plate 10 and the holding plates 521b and 521c due to the problem of the processing accuracy of the two. According to experiments by the inventors, it has been found that if the gap 537 is 0.5 mm or less, the effect on the irradiation position of the electron beam 503 can be almost ignored.

As described above, in the electron beam application device having the function of controlling the electron beam irradiation energy by the retarding voltage, the height of the sample and the sample holder for holding the sample are made substantially the same, or Irradiation of the electron beam at the end of the sample without deterioration of the irradiation position is also possible by providing a permissible dimension on the sample and providing a range with almost the same height to prevent fluctuations in the electric field. can do.

[0124]

As described above, according to the present invention, the accuracy of the relationship between the electron beam irradiation position at the end of the sample and the position of the sample can be prevented from being lowered, and processing, analysis and inspection can be performed. Has the effect of becoming

Further, in an electron beam application device having a function of controlling the electron beam irradiation energy by the retarding voltage, there is an effect that the sample can be irradiated with the electron beam without lowering the accuracy of the irradiation position.

[Brief description of the drawings]

FIG. 1 is a longitudinal sectional view showing a configuration of a circuit pattern inspection apparatus according to the present invention.

FIG. 2 is a plan view showing a mounting state of a substrate to be inspected.

FIG. 3 is an electric field distribution diagram showing a result of a simulation of an internal electric field.

FIG. 4 is a schematic diagram illustrating an electron orbit.

FIG. 5 is a relationship diagram showing a relationship between a spread of an electron irradiation position and a deflection position.

FIG. 6 is a flowchart illustrating an operation procedure of the circuit pattern inspection apparatus according to the present invention, and a plan view of a mounted substrate to be inspected.

FIG. 7 is a schematic diagram showing an example of image display.

FIG. 8 is a plan view showing a mounting state of a substrate to be inspected.

FIG. 9 is a longitudinal sectional view showing a configuration of a circuit pattern inspection apparatus according to a conventional technique.

FIG. 10 is a longitudinal sectional view of a main part of a semiconductor inspection device using an electron beam.

FIG. 11 is a perspective view showing a configuration of a stage and a sample holder of a semiconductor inspection apparatus using an electron beam, with a partial cross section.

FIG. 12 is a plan view and a longitudinal sectional view of the sample holder of FIG. 2;

FIG. 13 is a plan view and a longitudinal sectional view of a sample holder.

FIG. 14 is a plan view and a side view of a conventional sample holder.

FIG. 15 is a plan view and a cross-sectional view showing a sample holding configuration of a conventional sample holding machine.

FIG. 16 is an electric field distribution diagram showing a result of an electric field distribution simulation of a longitudinal section on a sample surface.

FIG. 17 is an electric field distribution diagram showing a result of an electric field distribution simulation of a longitudinal section on a sample surface.

FIG. 18 is an electric field distribution diagram showing a result of an electric field distribution simulation of a longitudinal section on a sample surface.

[Explanation of symbols]

1. Electron gun, 5. Scanning deflector, 8. E cross B deflector,
Reference numeral 9: Objective lens, 10: substrate to be inspected, 11: XY stage, 13: secondary electron detector, 26: optical sample height measuring device, 34: defect determination unit, 35: central standard mark signal storage Unit, 36: outer peripheral standard mark signal storage unit, 37: comparison operation unit, 38: outer peripheral distortion amount storage unit, 39: outer peripheral distortion amount removal operation circuit, 40: deflection correction table calculation / storage unit, 41: correction Table update control means, 201: primary electron beam, 202: first secondary electron, 203: second secondary electron, 503: electron beam, 510: wafer, 521: sample holder.

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Atsuko Takato 1-280 Higashi Koigakubo, Kokubunji-shi, Tokyo Inside the Central Research Laboratory, Hitachi, Ltd. (72) Inventor Hideji Sugiyama 882 Omo, Oaza-shi, Hitachinaka City, Ibaraki Pref.

Claims (23)

[Claims] An irradiation optical system for converging a primary charged particle beam and scanning and deflecting first and second regions of a circuit pattern of a sample, decelerating the primary charged particle beam, and irradiating the primary charged particle beam from the sample by the irradiation. Acceleration / deceleration means for accelerating secondary charged particles and reflected electrons, a sample stage for holding the sample, a sensor for measuring a surface height of an irradiation position of the primary charged particle beam on the sample, and a sensor generated from the sample. In a circuit pattern inspection apparatus having a detector for detecting charged particles, and an image forming means for forming an image of an irradiation area of the sample from the detection signal, the sample table is provided on an outer peripheral portion of a substrate mounting portion. A configuration in which at least two standard mark samples having different thicknesses in the beam axis direction of the line can be set, and image signals of the standard mark sample and the central standard mark sample of at least two substrate mounting portions are provided. Storage means for storing; calculating means for calculating the distortion amount of the primary charged particle beam specific to the outer periphery from the standard mark image signals on the two surfaces; and removing the distortion amount specific to the outer periphery from the outer standard mark image signal Removing means, a storage means for creating and storing a deflection correction table corresponding to the sample height from the outer peripheral standard mark image signal after removing the distortion amount, and the above-described method according to the surface height signal obtained by the sensor. A circuit comprising: a deflection correction signal generating circuit for extracting a deflection correction signal from a deflection correction table; and control means for irradiating the outer peripheral standard mark sample at a desired timing and updating the deflection correction table. Pattern inspection device. An irradiation optical system for converging the primary charged particle beam and scanning and deflecting the first and second regions of the circuit pattern of the sample, and decelerating the primary charged particle beam and generating the beam from the sample by the irradiation. Acceleration / deceleration means for accelerating secondary charged particles and reflected electrons, a sample stage for holding the sample, a sensor for measuring a surface height of an irradiation position of the primary charged particle beam on the sample, and a sensor generated from the sample. In a circuit pattern inspection apparatus having a detector for detecting charged particles and an image forming means for forming an image of an irradiation area of the sample from the detection signal, the sample stage is provided on an outer peripheral portion of a substrate installation portion with the primary charged particle beam. A standard mark sample having at least two surfaces having different thicknesses in the beam axis direction can be set, and a deflection correction table corresponding to the sample height is calculated and stored from the image signals of the two standard marks. Means for inputting a surface height signal of the sample obtained by measurement of the sensor, and a deflection correction signal generating circuit for extracting a deflection correction signal corresponding to the surface height from the deflection correction table; Control means for irradiating a mark at a desired timing and updating a deflection correction table. 3. An irradiation step of converging a primary charged particle beam from a charged particle source by an irradiation optical system to scan and deflect the first and second regions of a sample placed on a table, and decelerating the primary charged particle beam. And the acceleration / deceleration step of accelerating the secondary charged particles and the reflected particles generated from the sample by the irradiation, the detection step of detecting the generated charged particles, and the image forming step of forming an image from the detection signal. A circuit pattern inspection method including a measurement step of measuring a surface height of an irradiation position of a primary charged particle beam on the sample and a comparison step of comparing the images obtained in the first and second regions of the sample. An obtaining step of irradiating at least two standard mark samples having different thicknesses in a beam axis direction of the primary charged particle beam provided on an outer peripheral portion on the sample stage to obtain an image signal, and an outer periphery provided on the sample stage. Part standard A storage step of storing image signals obtained from at least two central standard mark samples substantially similar to the mark, and calculating the amount of beam distortion of the charged particle beam peculiar to the outer peripheral part from the stored both standard mark signals Calculation step, a removal step of removing the distortion amount peculiar to the outer periphery from the outer periphery standard mark image signal, and a deflection correction table corresponding to the sample height from the signal of the outer periphery standard mark after removing the distortion amount. A calculation / storage step, a deflection correction signal generating step of extracting a deflection correction signal from the deflection correction table according to the surface height signal obtained in the measurement step, and irradiating the outer peripheral standard mark at a desired timing. A control step of updating a deflection correction table. 4. An irradiation step of converging a primary charged particle beam from a charged particle source by an irradiation optical system and scanning and deflecting first and second regions of a sample placed on a table, and decelerating the primary charged particle beam. And the acceleration / deceleration step of accelerating the secondary charged particles and the reflected particles generated from the sample by the irradiation, the detection step of detecting the generated charged particles, and the image forming step of forming an image from the detection signal. A circuit pattern inspection method including a measurement step of measuring a surface height of an irradiation position of a primary charged particle beam on the sample and a comparison step of comparing the images obtained in the first and second regions of the sample. Irradiating at least two standard mark samples having different thicknesses in the beam axis direction of the primary charged particle beam provided on the outer peripheral portion on the sample stage to obtain an image signal, and an image of the two standard marks Signal Calculating and storing a deflection correction table according to the sample height, and a deflection correction signal generating step of inputting a surface height signal obtained in the measurement step and extracting a deflection correction signal from the deflection correction table. A control step of updating the deflection correction table with the outer peripheral standard mark at a desired timing. 5. An irradiation optical system for irradiating a primary charged particle beam on a sample by scanning and deflecting an area on the sample, a sample stage for holding the sample, and decelerating the primary charged particle beam. Acceleration / deceleration means for accelerating secondary charged particles and reflected particles generated from the sensor, a sensor for measuring the surface height of the irradiation position of the primary charged particle beam on the sample, and secondary charged particles and reflection generated from the sample A detector for detecting the particles, and an image forming means for forming an image from the detection signal, wherein the sample stage has at least two standard mark samples having different thicknesses in the axial direction of the primary charged particle beam on the outer peripheral portion. A configuration that can be installed, and further, at least two central standard marks substantially similar to the outer peripheral standard marks of the sample table,
Means for storing the image signal of the central standard mark sample, storing the amount of distortion of the primary charged particle beam peculiar to the outer periphery obtained by comparing the two image signals, and An arithmetic circuit for removing the distortion amount peculiar to the section;
Means for calculating and storing a deflection correction table corresponding to the sample height from the outer peripheral standard mark signal after removing the distortion amount,
A deflection correction signal generating circuit for extracting a deflection correction signal from the deflection correction table according to the surface height obtained by the sensor, and irradiating the external standard mark at a desired timing;
A charged particle beam application device comprising: a control unit for updating a deflection correction table. 6. An irradiation step of irradiating a primary charged particle beam by scanning and deflecting one area on a sample by an irradiation optical system, decelerating said primary charged particle beam, and further comprising secondary charged particles and reflection generated from said sample. An acceleration / deceleration step of accelerating particles, a step of measuring a surface height of an irradiation position of the primary charged particle beam of the sample, a detection step of detecting charged particles generated in the sample, and forming an image from the detection signal An image forming step, an acquiring step of obtaining image signals of at least two standard mark samples having different axial thicknesses of the primary charged particle beams provided on the outer peripheral portion from the sample portion, and a process similar to the standard mark on the outer peripheral portion. A storage step of storing an image signal of a central standard mark sample of at least two surfaces, and a step of comparing the two standard mark image signals, calculating and storing the distortion amount of the primary charged particle beam specific to the outer peripheral part; A removal step of removing the distortion amount peculiar to the outer periphery from the image signal of the outer periphery standard mark, and a calculation / storage step of calculating and storing a deflection correction table corresponding to the sample height from the signal after the distortion removal, A deflection correction signal generation step of inputting the surface height signal obtained in the measurement step and extracting a deflection correction signal corresponding to the height from the deflection correction table, and irradiating the external standard mark at a desired timing to deflect And a control step of updating the correction table. 7. A substrate having a circuit pattern, the substrate having at least two types of surfaces having different heights, each surface having substantially the same standard mark, A calibration substrate, wherein a difference in surface height is set to a range including a height variation range due to warpage generated in the entire substrate. 8. An electron beam application apparatus for irradiating an electron beam on a surface of a sample to process the sample, or detecting secondary electrons generated by the irradiation and observing a surface state of the sample. A sample holding device for holding a sample, comprising: a positioning portion for positioning the sample in proximity to an end of the sample when holding the sample; and a height of a surface of an end of the sample and a height of the positioning portion. And a sample holder characterized by being substantially the same. 9. The sample holder according to claim 8, wherein the difference between the height of the surface of the end portion of the sample and the height of the positioning portion is 200 micrometers or less. 10. The sample holder according to claim 8, wherein a gap between the end of the sample and the positioning portion is 0.5 mm or less. 11. The apparatus according to claim 8, wherein the height of the surface of the end portion of the sample and the height of the positioning portion are substantially the same within a range of at least 10 mm or more from the end portion of the sample. Sample holding machine. 12. A semiconductor manufacturing apparatus for manufacturing a semiconductor wafer, comprising: a processing chamber for processing the sample by irradiating the surface of the sample with an electron beam; and a positioning section for positioning the sample, and carrying the sample into the processing chamber. And a sample holder having a height of a surface of an end portion of the sample and a height of the positioning portion when the sample is held. 13. The semiconductor manufacturing apparatus according to claim 12, wherein a difference between a height of a surface of an end portion of the sample and a height of the positioning portion of the sample holder is 200 micrometers or less. . 14. The semiconductor manufacturing apparatus according to claim 12, wherein a gap between an end portion of the sample and the positioning portion of the sample holder is 0.5 mm or less. 15. The apparatus according to claim 12, wherein the height of the surface of the end portion of the sample and the height of the positioning portion of the sample holder are substantially the same within a range of at least 10 mm or more from the end portion of the sample. A semiconductor manufacturing apparatus, characterized in that: 16. A semiconductor inspection apparatus for irradiating a surface of a sample with an electron beam, detecting secondary electrons generated by the irradiation, and observing or inspecting a surface state of the sample, wherein a positioning portion for positioning the sample is provided. A semiconductor inspection apparatus, comprising: a sample holder having a height of a surface of an end portion of the sample and a height of the positioning portion when the sample is held. 17. The semiconductor inspection apparatus according to claim 16, wherein a difference between a height of a surface of an end portion of the sample and a height of the positioning portion is 200 micrometers or less. 18. The semiconductor inspection apparatus according to claim 16, wherein a gap between an end of the sample and the positioning portion of the sample holder is 0.5 mm or less. 19. The apparatus according to claim 16, wherein the height of the surface of the end of the sample and the height of the positioning portion of the sample holder are substantially the same in a range of at least 10 mm or more from the end of the sample. A semiconductor inspection device, characterized in that: 20. An electron beam application apparatus for processing a sample by irradiating the surface of the held sample with an electron beam, or detecting secondary electrons generated by the irradiation and observing the surface state of the sample. In the method for holding a sample, the sample is held such that the height of the surface of the end portion of the sample and the height of a positioning portion for positioning the sample in proximity to the end portion of the sample are substantially the same. Sample holding method. 21. The sample according to claim 20, wherein the sample is held so that the difference between the height of the surface of the end portion of the sample and the height of the positioning portion is 200 micrometers or less. Holding method. 22. A method according to claim 20, wherein said sample is held so that a gap between a height of a surface of an end portion of said sample and said positioning portion is 0.5 mm or less. Retention method. 23. The apparatus according to claim 20, wherein the height of the surface of the end portion of the sample and the height of the positioning portion are substantially the same within a range of at least 10 mm or more from the end portion of the sample. A method for holding a sample, comprising holding the sample.