JP2000040033A - Rewriting device of nonvolatile memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a memory rewriting device which detects the runaway of a microcomputer and which makes it difficult to cause a malfunction even with the microcomputer in runaway. SOLUTION: This memory rewriting device is constituted by being connected to a nonvolatile memory whose storage content is rewritable. The device is provided with rewriting means (S104 to S106) which perform prescribed rewriting processing that rewrites the storage content of the nonvolatile memory to new content, a setting means (S102) which initializes rewriting processing of the nonvolatile memory, setting deciding means (S108 to S122) that decide whether or not desired setting is performed by the setting means and an inhibiting means (S126) which inhibits writing processing to the nonvolatile memory when it is decided that the desired setting is not performed by the setting deciding means.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for detecting a runaway of a microcomputer (hereinafter abbreviated as "microcomputer") for controlling an apparatus.

[0002]

2. Description of the Related Art In recent years, there has been a demand for detecting an abnormality of a microcomputer or a runaway of the microcomputer and preventing it from occurring as the microcomputer is employed in various devices. Generally, for example, EEP
When writing data to the ROM, if a write permission code can be transmitted to the EEPROM, the data can be written to the EEPROM regardless of whether the data is correct or not.
If software for writing data to an EPROM (hereinafter abbreviated as software) is executed halfway due to the occurrence of some accident, erroneous data may be written.

Therefore, in the technique proposed in Japanese Patent Application Laid-Open No. 8-241252, when rewriting data in an EEPROM dependent on a CPU, first, check data (FFFFH) is written into a predetermined check area, and the check data is correctly written. Only when it is written, the writing means can determine that there is no abnormality. Then, check data (55AAH) is written to check for interference between adjacent bits, and when this check data is correctly written, the rewriting means has no abnormality. Judgment can be performed, and the process can be shifted to a process of correctly rewriting the EEPROM data or program.

[0004]

However, the technique disclosed in Japanese Patent Application Laid-Open No. H8-241252 described above has a problem with the CPU.
Is effective only in detecting a failure of the EEPROM dependent on the CPU. When the CPU itself goes out of control, it also has a problem that erroneous data is written in the EEPROM. SUMMARY OF THE INVENTION An object of the present invention is to provide a memory rewriting device having a runaway detection function for detecting runaway of a microcomputer that controls the device and making it difficult for the microcomputer to malfunction even when runaway.

[0005]

The present invention employs the following means in order to solve the above-mentioned problems and achieve the object. For example, a runaway of the microcomputer that controls the apparatus is detected and determined by software, and the determination as to whether or not a normal operation is performed at this time is made by paying attention to a change in a predetermined code. When the microcomputer performs a predetermined operation, a predetermined code is set in advance before the operation is performed, and when the operation is performed, the content of the code is confirmed and then the process proceeds to the next desired stage. On the other hand, if the code is different from the initial value, it is determined that a runaway has occurred and the algorithm has been executed in the middle of the predetermined operation algorithm.

According to the aspect described in the claims, [1] a nonvolatile memory capable of rewriting storage contents, rewriting means for performing rewriting processing for rewriting storage contents of the memory to new contents, and rewriting of the memory Setting means for performing an initial setting of the process, setting determining means for determining whether or not a desired setting has been performed by the setting means; and when the setting determining means determines that the desired setting has not been performed. Proposes a non-volatile memory rewriting device including a prohibition unit for prohibiting a writing process to the memory.

The setting means sets a write processing flag indicating that the writing processing is being performed immediately after the rewriting processing is started. If the setting determining means determines that the writing processing is not being performed, the prohibiting means is set. The writing apparatus according to [1], wherein the writing process to the nonvolatile memory is prohibited. The setting means sets an address at which data to be written to the nonvolatile memory exists immediately after the writing process is started. If the setting determining means determines that the address is not the desired address, the setting means sets the address. [1] The writing process to the memory is prohibited by a prohibition unit.
A rewriting device as described is proposed.

[0008]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram mainly showing the electrical configuration of the camera. The camera 100 is a control unit including a microcomputer for controlling all operations of the camera, and a CPU as a display control unit.
The CPU 1 is connected to peripheral circuits, which will be described later, via control lines and communication lines.

The photographing lens of the camera 100 includes a zoom control optical system 2 for changing the focal length, an aperture / shutter drive system 3 for controlling the amount of light passing and passing / blocking, and a focus for adjusting the focus. Focus control optical system 4
And is configured.

The focal length (ie, the zoom position) or the retracted position of the zoom control optical system 2 is determined by a zoom / retract position detecting circuit 9 as position detecting means, and the focus position of the focus control optical system 4 is determined as detecting means. Each is detected by the focus position detection circuit 10.

Of the above, the zoom control optical system 2, the focus control optical system 4, the zoom / collapse position detection circuit 9 and the focus position detection circuit 10 are provided by a zoom / focus drive circuit 6 as a photographing lens drive control means. The aperture / shutter drive system 3 is driven and controlled by an aperture / shutter drive circuit 4 as the photographing lens drive control means. The zoom / focus drive circuit 6 and the aperture / shutter drive circuit 7 are connected to the CPU 1 via a communication line, and perform respective drive controls according to instructions from the CPU 1.

A film 5 is disposed at a position where the light beam guided from the photographing lens is imaged.
Is detected by the film state detecting circuit 11 as a state detecting means, whether or not the film is loaded, the type of the film, the film position, and the like. The drive of the film 5 and the film state detection circuit 11 is controlled by a film detection drive circuit 8 as a film drive means, and the film detection drive circuit 8 is also connected to the CPU 1 via a communication line.

The camera 100 can be controlled by a remote controller (hereinafter abbreviated as a remote controller).
A remote control receiving unit 15 is provided as a detection unit for receiving an infrared light signal transmitted from a remote control disposed outside the camera. The remote control receiving unit 15 includes a remote control driving circuit 1 connected to the CPU 1 via a communication line.
2 is driven and controlled. The distance measuring unit 16 is A
The AF drive circuit 13 and the AE drive circuit 14 are configured to be driven and controlled by the F drive circuit 13 and the AE drive circuit 14, respectively.
Are also connected to the CPU 1 via a communication line.

The CPU 1 is further configured to control the following units. That is, first, the LCD 18 as the display unit is controlled. This L
An electroluminescent element (hereinafter abbreviated as EL) 19 as a display illumination means is arranged on the back side of the CD 18, and the CPU 1 also controls an EL drive circuit 20 as an illumination control means for driving the EL 19. It has become. The EL drive circuit 20 includes an EL
An inductor 21 and a capacitor 22 for determining a drive voltage and a drive frequency are connected.

The CPU 1 has a strobe circuit 23 for irradiating the subject with auxiliary light, a power switch, a mode switch, a flash selection switch, a release switch, a data selection setting switch, a zoom switch, a rewind switch, and the like. A switch input section 24 serving as switch input detecting means, a battery detection circuit 25 serving as power remaining amount detecting means for detecting the remaining battery power of the camera 100, and the like, for imprinting the shooting date and time on the film 5. Is configured to control the data imprinting circuit 26.

Further, the CPU 1 has an EEPROM as a storage means connected via the communication line.
The EEPROM 27 stores various kinds of adjustment information and photographing information specific to the camera in a predetermined area described later.

FIGS. 2A and 2B conceptually show the RAM and EEPROM of the CPU. Note that the CPU 1
Is connected to the EEPROM 27 via a bus or the like.
When the RAM provided as a main storage area in the PU 1 is referred to as “internal memory”, the EEPROM 27
It can be said that it is an “external memory” from the viewpoint of U1.

FIG. 2A shows a storage area of the CPU 1 spatially. As described above, the CPU 1 has the RAM which is a volatile memory as an internal memory (main storage area),
This RAM has a plurality of logical areas as shown in the figure.
There are, for example, three storage areas of bank 0 to bank 2 which are one block of addresses. Important control software such as a camera sequence program is loaded and operated in the area of the plurality of banks. Therefore, it is understood that these banks 0 to 2 are areas to be protected so that the software is not destroyed during operation. Further, an area following bank 0 to bank 2 has a runaway flag as a "check flag" for indicating the state of occurrence of runaway of the microcomputer. In this runaway flag, 1 indicates a runaway state, and 0 indicates a normal state in which no runaway occurs.

On the other hand, FIG. 2B shows the storage area of the EEPROM 27 spatially. The EEPROM 27 as a non-volatile memory includes various kinds of adjustment information and photographing information for each camera having characteristic variations in manufacturing, as well as a camera-specific information used when performing a predetermined calculation or the like to satisfy specifications. An adjustment area for rewriting and adjusting adjustment values, coefficients, and the like is provided. Also,
It has a state storage area for temporarily storing information indicating the state of the camera and a free area following the state storage area. It can be seen that these areas are also areas that should be protected from being destroyed during operation.

FIG. 3 schematically shows the connection between the CPU and the EEPROM. CPU1 is electrically connected to EEPROM2
They are connected by buses having a width of 7 and 8 bits, and are appropriately controlled mainly by transmitting and receiving predetermined signals via three types of dedicated lines. More specifically, to synchronize the CPU 1 with the EEPROM 27, a control line EPCEN indicating which of the chips constituting the EEPROM 27 is to be selected, a data line SDATA through which stored data transmitted and received between the CPU 1 and the EEPROM 27 pass. And a clock line SCLK for supplying a clock signal. The CPU 1 mainly includes the following means according to the present invention functionally (software). For example, rewriting means 1a for performing a predetermined rewriting process for rewriting the storage contents of the EEPROM 27 to new contents, setting means 1b for performing initial setting of the rewriting processing of the EEPROM 27, and whether or not desired setting has been performed by the setting means 1b. Setting determining means 1 for determining whether
c, if the setting determining means 1c determines that the desired setting has not been made, the EEPROM
It can be seen that prohibiting means 1d for prohibiting the writing process to 27 are provided, and are appropriately controlled based on the transmission and reception of the predetermined signal described above (details will be described later).

Next, the control of the microcomputer having the function of detecting runaway of the microcomputer according to the present invention will be described in detail in terms of software using related programs as an example. A program having the above-mentioned runaway detection function is resident in the CPU 1. This program is mainly composed of an EEPROM subordinate to the CPU 1.
When performing control relating to "write processing" and "read processing" to the CPU 27, runaway is detected by determining occurrence of runaway of the CPU 1 by a predetermined algorithm, and after runaway, an appropriate It is configured to perform processing.

FIG. 4 is a flowchart showing the procedure of the above-mentioned "writing process" routine. Of the two entries, the “writing process during adjustment” (S200) is a routine that is started only when adjusting individual cameras at the end of the manufacturing process or at the time of repair. (ON), and the process proceeds to step S104 described later.

Another entry "write processing" (S
100) is a program that can be operated during normal operation. First, "initial setting" for runaway determination described later is performed (S102). In step S104, preparation for writing to a predetermined memory is performed (S104).

In step S106, a command to permit writing to a predetermined memory is transmitted (S106). The subroutine "runaway judgment" is called (S108), and if S110
If the runaway flag is 1, the process proceeds to step S300, where a predetermined "runaway process" is executed, and post-processes after the runaway are performed. On the other hand, if it is normal, the address of the predetermined memory is transmitted (S112).

Here, the subroutine "runaway determination" is called (S114), and the presence or absence of runaway is checked (S11).
6) If the runaway flag is 1, the flow shifts to step S300 to perform a predetermined "runaway process". On the other hand, if normal, data transmission is performed (S118).

The subroutine "runaway determination" is called again (S120), and the presence or absence of runaway is checked (S12).
2) If the runaway flag is 1, the process shifts to step S300 to perform a predetermined “runaway process”. On the other hand, if it is normal, it is confirmed that the data has been written (S124), and a command to inhibit the writing is transmitted to the predetermined memory (S12).
6).

It is determined whether or not all the writing has been completed (S128).
And the same processing steps are repeated. On the other hand, if all writing is completed, a series of "writing process"
The routine ends (S130).

Similarly, FIG. 5 is a flowchart showing the procedure of the above-mentioned "read process" routine. This “read process” (S400) is a dedicated entry. In step S402, first, upper data of 8 bits is read (S402).

The subroutine "runaway judgment" is called (S
404), it is checked whether or not there is a runaway (S406). If the runaway flag is 1, the flow shifts to step S300 to perform a predetermined "runaway process". On the other hand, if it is normal, it is determined whether or not the verification for content collation is OK (S4).
08) If the memory is damaged, the process proceeds to step S500 to perform a predetermined "damage process" to repair the memory.

The remaining 8-bit lower data is read (S410). Here again, the subroutine "runaway judgment"
(S412) and checks for runaway (S4
14) If the runaway flag is 1, step S300
Then, a predetermined "runaway process" is performed. On the other hand, if it is normal, it is determined whether the verification process is OK (S41).
6) If the memory is damaged, step S50
The process proceeds to 0, and a predetermined “damage process” for compensating for damage is performed.

It is determined whether the verification process has been completed (S418).
Returning to step 02, the processing steps are similarly executed. On the other hand, if the verification processing has been completed normally, a predetermined end processing is performed (S420), and then a series of read processing routines is ended (S422).

FIG. 6 is a flowchart showing the processing procedure of "initial setting" as a subroutine. In this “initial setting” (S30), first, E
The flag during writing to the EPROM is set (S3
1). Next, as a condition of the CPU transmission data, the bank of the RAM is set to 0 to 3 (S32), and the RAM is set.
Is set (S33).

As conditions on the writing side of the EEPROM, the address of the EEPROM is set (S34), the number of words to be written is set (S35), and the write recognition code is set to 0 (S36). Here, the timer for runaway monitoring is set (S37). Then, the process returns after the called step (S38).

FIG. 7 is a flowchart showing a processing procedure of “runaway judgment” as a subroutine. First, EEP
It is checked whether the ROM is being written (S5).
1) If not, the process proceeds to step S57. It is checked whether the write recognition code is 0 (S5).
2) If not, shift to step S57.

It is checked whether or not the designated area of the bank of the RAM on the CPU side is banks 0 to 3 which are areas which should not be rewritten in particular (S53), and if not, the flow proceeds to step S57. I do. The specified EEPR
Check whether the OM address is correct (S54),
If not, the process moves to step S57. It is checked whether the specified number of words is correct (S55). If not, the process proceeds to step S57.

The runaway flag is set to 0 (S56).
In step S57, the runaway flag is set to 1 (S57). Then, the process returns after the called step (S58).

(Effects) As described above, the criteria for determining the occurrence of runaway according to the present invention are that the EEPROM is being written, the write recognition code is 0, and the RAM area on the CPU side is banks 0-3. , Is determined to be normal without runaway only when the designated address of the EEPROM is correct and the number of write words is correct. Therefore, this reckless run determination prevents the rewrite operation from being performed without knowing that the reckless run has occurred, and correct predetermined data (program is also acceptable) on the RAM side only in a normal state.
Since the data is correctly written at a predetermined address on the EPROM side, the contents can be correctly rewritten.

(Other Modifications) In addition, for example, a criterion for determining the occurrence of runaway is that the time required for rewriting the nonvolatile memory is measured by a timer as processing time measuring means, and the required time is within a certain time range. The criterion may be such that it is determined to be normal only when the processing ends within the period. The timing for determining the occurrence of runaway may be before or during the write process, after write permission, after setting the EEPROM address, after transmitting the write data, before the verify process, or during the process. Others
Various modifications can be made within the scope of the present invention.

Although the embodiments have been described above, the present invention includes the following inventions. That is, (1) a memory rewriting device for rewriting a non-volatile memory capable of rewriting storage contents, rewriting means for rewriting the storage contents of the non-volatile memory to new contents, and initial setting of rewriting processing of the non-volatile memory. Setting means, setting determining means for determining whether or not a desired setting has been performed by the setting means; and non-volatile memory when the setting determining means has determined that the desired setting has not been performed. And a prohibition unit for prohibiting a write process to the non-volatile memory.

(2) Immediately after starting the writing process, the setting means previously sets at which address of the nonvolatile memory data is to be written, and the setting judging means judges that the address is not the desired address. The rewriting device for a nonvolatile memory according to (1), wherein when the writing is performed, the writing process to the nonvolatile memory is prohibited by the prohibiting unit. (3) Immediately after entering the writing process,
The number of words to be written to the non-volatile memory is set, and when the setting determining means determines that the number of words is not the desired length, the prohibiting means prohibits the writing process to the non-volatile memory. The rewriting device for a nonvolatile memory according to (1).

(4) The setting means sets a predetermined processing time measuring means (timer) immediately after entering the writing processing, and determines that the timer time indicated by the setting determining means is not the desired time. The rewriting device for a nonvolatile memory according to (1), wherein when the writing is performed, the writing process to the nonvolatile memory is prohibited by the prohibiting unit.

(5) The rewriting means, the setting means,
The non-volatile memory rewriting device according to (1), wherein the setting determining unit and the prohibiting unit are included in a CPU. (6) The non-volatile memory is a CPU serving as control means.
The main storage area of the CPU is composed of a volatile memory as an internal storage means, and the processing time measuring means (timer) and the judging means for judging the timer value are determined by the CPU. The rewriting device for a nonvolatile memory according to (4), wherein the rewriting device is provided as software.

(7) A memory rewriting device connected to a non-volatile memory (27) whose storage content can be rewritten is a rewriting means (performing a predetermined rewriting process for rewriting the storage content of the non-volatile memory to a new content) 1a) and setting means (1b) for initial setting of the rewriting process of the nonvolatile memory
And setting determining means (1c) for determining whether or not a desired setting has been performed by the setting means; and when the setting determining means determines that the desired setting has not been performed, the non-volatile memory Prohibiting means (1d) for prohibiting write processing to the memory.

(8) The memory rewriting device connected to the rewritable nonvolatile memory (27) has a rewriting step of performing a predetermined rewriting process for rewriting the storage content of the nonvolatile memory to new content ( (S104 to S106)
And a setting step (S102) of performing initial setting of the rewriting process of the nonvolatile memory, and a setting determining step (S102) of determining whether a desired setting has been performed by the setting step.
108 to S122) and a prohibition step (S126) for prohibiting the writing process to the non-volatile memory when it is determined that the desired setting has not been performed in the setting determination step. It is characterized by having.

Further, the present invention includes the following inventions. (A) a nonvolatile memory whose contents can be rewritten; setting means for initially setting rewriting processing of the nonvolatile memory; rewriting means for rewriting the storage of the nonvolatile memory with new information; A non-volatile memory rewriting device, comprising: a setting judging unit for judging whether or not setting has been performed by the setting unit; (B) Non-volatile memory capable of rewriting the contents of storage, rewriting means for rewriting the storage of the non-volatile memory with new information, storage means for storing that the non-volatile memory is in the process of rewriting, and this storage A non-volatile memory including: a memory determining unit that determines whether data by the unit indicates that the nonvolatile memory is being rewritten; and a prohibiting unit that prohibits the writing process when the determination by the memory determining unit is incorrect. Memory rewriting device.

(C) Non-volatile memory capable of rewriting the contents of storage, rewriting means for rewriting the storage of the non-volatile memory with new information, processing time measuring means for measuring rewriting processing time of the non-volatile memory, A determination unit for determining whether the time by the processing time measurement unit is within the first time and the second time; and a prohibition unit for prohibiting the writing process when the determination by the determination unit is incorrect. Rewriting device for nonvolatile memory. (D) Non-volatile memory capable of rewriting the contents of storage, rewriting means for rewriting the storage of the non-volatile memory with new information, and processing time for measuring the time until rewriting by the rewriting means and the time for rewriting Measuring means, determining means for determining whether the time by the processing time measuring means is within the first time, the second time, and third time and the fourth time, respectively. A rewriting device for a non-volatile memory, comprising: a prohibition unit for prohibiting a writing process when the data is incorrect.

[0047]

As described above, according to the present invention, it is determined whether or not the microcomputer that controls the electronic device such as the camera is operating normally when the microcomputer performs a predetermined operation. This is possible by paying attention to a change in a predetermined code that has been set in advance beforehand.When performing a desired operation such as rewriting, the contents of the predetermined code are checked, and then the actual rewriting operation is correctly performed. It can be carried out. Therefore, it is possible to provide a memory rewriting device having a microcomputer runaway detection function capable of detecting runaway of the microcomputer and making subsequent malfunction less likely to occur even if the microcomputer runs away. Becomes

[Brief description of the drawings]

FIG. 1 is a block diagram mainly showing an electric configuration of a camera according to the present invention.

FIG. 2A shows a CPU and an EEPROM, and FIG.
3 is a conceptual diagram showing a storage area of a CPU. FIG.
FIG. 3 is a conceptual diagram showing a storage area of an EPROM.

FIG. 3 is a schematic diagram showing a connection relationship between a CPU and an EEPROM;

FIG. 4 is a flowchart illustrating a procedure of a writing process;

FIG. 5 is a flowchart illustrating a procedure of a reading process;

FIG. 6 is a flowchart illustrating an initial setting processing procedure;

FIG. 7 is a flowchart illustrating a procedure of a runaway determination process;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... CPU (device control means), 1a ... rewriting means, 1b ... setting means, 1c ... determination means, 1d ... prohibition means, 27 ... EEPROM (external memory), 100 ... camera (device). S30: Initial setting (subroutine), S50: Runaway determination (subroutine), S100: Write process, S200: Adjustment write process, S300: Runaway process, S400: Read process, S500: Damage process.

Continued on the front page (72) Inventor Junichi Ito 2-43-2 Hatagaya, Shibuya-ku, Tokyo Inside Olympus Optical Industrial Co., Ltd. (72) Inventor Toshiaki Ishimaru 2-34-2 Hatagaya, Shibuya-ku, Tokyo Olympus Optical F term in Industrial Co., Ltd. (reference) 5B017 AA02 BA01 BB03 CA12 5B018 GA04 HA31 KA23 NA06 RA12

Claims (3)

[Claims] 1. A nonvolatile memory capable of rewriting storage contents, rewriting means for performing rewriting processing for rewriting the storage contents of the nonvolatile memory to new contents, and a setting for performing initial setting of the rewriting processing of the nonvolatile memory. Means, setting determining means for determining whether or not a desired setting has been performed by the setting means; and if the setting determining means has determined that the desired setting has not been performed, the setting for the non-volatile memory is performed. A rewriting device for a nonvolatile memory, comprising: prohibition means for prohibiting a writing process. 2. The setting means sets a write processing flag indicating that the writing processing is being performed immediately after the rewriting processing is started, and when the setting determining means determines that the writing processing is not being performed, The rewriting device for a nonvolatile memory according to claim 1, wherein a writing process to the nonvolatile memory is prohibited by a prohibition unit. 3. The setting means sets an address at which data to be written to the nonvolatile memory exists immediately after the writing process is started, and when the setting determining means determines that the address is not a desired address. 2. The rewriting device according to claim 1, wherein the prohibiting means prohibits a writing process to the non-volatile memory by the prohibiting means.