JP2000037031A - Digital protective relay device - Google Patents

Digital protective relay device

Info

Publication number
JP2000037031A
JP2000037031A JP10199382A JP19938298A JP2000037031A JP 2000037031 A JP2000037031 A JP 2000037031A JP 10199382 A JP10199382 A JP 10199382A JP 19938298 A JP19938298 A JP 19938298A JP 2000037031 A JP2000037031 A JP 2000037031A
Authority
JP
Japan
Prior art keywords
signal
monitoring
value
relay
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10199382A
Other languages
Japanese (ja)
Inventor
Yutaka Yamada
裕 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Corp
Meidensha Electric Manufacturing Co Ltd
Original Assignee
Meidensha Corp
Meidensha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Corp, Meidensha Electric Manufacturing Co Ltd filed Critical Meidensha Corp
Priority to JP10199382A priority Critical patent/JP2000037031A/en
Publication of JP2000037031A publication Critical patent/JP2000037031A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a digital protective relay device capable of eliminating misjudge even if a relay input signal includes the frequency component of a monitoring signal. SOLUTION: Focusing attention on the fact that the third harmonic component included in relay input is eliminated by the averaging of effective values, an average value determining circuit 16 obtains the average value |f|ave of the effective value, obtains a failure determination signal when a difference between it and a specified value (k) exceeds a determination level (ε), and obtains monitoring failure output by confirming continuance for a fixed period with an off-delay timer 17. This device is also provided with a means of locking the determination output that the effective value has exceeded a specified range when the average is within a specified range.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、ディジタル形保護
継電装置に係り、特にアナログ入力回路へのリレー入力
信号の基本周波数よりも高い周波数の監視信号を重畳し
ておき、アナログ入力回路の出力に現れる監視信号の実
効値からアナログ入力回路の正常/異常を監視する監視
装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital protection relay, and more particularly, to a superimposition of a monitor signal having a frequency higher than a fundamental frequency of a relay input signal to an analog input circuit and an output of the analog input circuit. The present invention relates to a monitoring device for monitoring the normal / abnormal of an analog input circuit based on the effective value of a monitoring signal appearing on a monitor.

【0002】[0002]

【従来の技術】この種の監視方式を施したディジタル形
保護継電装置のアナログ入力回路を図3に示す。
2. Description of the Related Art FIG. 3 shows an analog input circuit of a digital protection relay device to which such a monitoring method is applied.

【0003】アナログ入力回路1は、保護対象系統の電
圧や電流の検出信号になるリレー入力信号をアナログフ
ィルタ2を通すことでノイズなどの高調波成分を除去
し、サンプル・ホールド回路3によって一定時間だけホ
ールドする。これらアナログフィルタ2及びサンプル・
ホールド回路3は、リレー入力別に設けられ、マルチプ
レクサ4では各リレー入力のホールド信号を時分割で取
り込み、この出力列をA/D変換器5によって順次ディ
ジタル信号に変換する。
An analog input circuit 1 removes a harmonic component such as noise by passing a relay input signal, which is a detection signal of a voltage or a current of a system to be protected, through an analog filter 2. Just hold. These analog filter 2 and sample
The hold circuit 3 is provided for each relay input. The multiplexer 4 takes in the hold signal of each relay input in a time-division manner, and sequentially converts the output sequence into a digital signal by the A / D converter 5.

【0004】保護演算部11は、マイクロプロセッサを
中枢部としてリレー入力信号を使った保護演算を行い、
その入力段にディジタルフィルタ12を設けてリレー入
力信号の基本周波数f1成分のみを抽出し、この信号を
保護演算のための入力データにする。
The protection operation unit 11 performs a protection operation using a relay input signal with the microprocessor as a central unit,
Provided digital filter 12 extracts only the fundamental frequency f 1 component of the relay input signal at its input stage and the input data for the protection operation of this signal.

【0005】ここで、アナログ入力回路1の正常/異常
を監視する手段として、アナログフィルタ2にはリレー
入力信号に対して、そのフルスケールの5〜10%程度
のレベルになる第3高調波信号f3(又は第4高調波信
号f4)を重畳させておく。
Here, as means for monitoring whether the analog input circuit 1 is normal or abnormal, the analog filter 2 includes a third harmonic signal having a level of about 5 to 10% of its full scale with respect to the relay input signal. f 3 (or the fourth harmonic signal f 4 ) is superimposed.

【0006】この高い周波数の監視信号f3をリレー入
力信号に重畳させるておくことにより、監視信号f
3は、アナログ入力回路1を通してA/D変換器5の出
力として現れ、ディジタルフィルタ13によりリレー入
力信号とは分離した高調波成分データとして取り出す。
この高調波成分データに対して、高調波監視回路14は
それを実効値に変換し、この実効値が規定値に対して±
30%の偏差以内にあるときにアナログ入力回路1が正
常に動作していると判定する。
By superimposing this high frequency monitor signal f 3 on the relay input signal, the monitor signal f 3
3 appears as an output of the A / D converter 5 through the analog input circuit 1 and is extracted by the digital filter 13 as harmonic component data separated from the relay input signal.
The harmonic monitoring circuit 14 converts the harmonic component data into an effective value, and this effective value is ±
When the deviation is within 30%, it is determined that the analog input circuit 1 is operating normally.

【0007】すなわち、高調波監視回路14は、下記の
演算を行い、正常/異常を判定する。
That is, the harmonic monitoring circuit 14 performs the following calculation to determine normal / abnormal.

【0008】[0008]

【数1】 |F3−k|≧ε F3:高調波信号f3を実効値化した値 k:F3の比較基準になる規定値 ε:判定レベル(=30%) なお、監視回路14は、リレー入力信号に系統ノイズが
重畳してそれが実効値F3に含まれる場合があることを
考慮し、実効値F3が規定値kに対して±30%を越え
た状態が一定時間継続したときにアナログ入力回路異常
として判定する。
| F 3 −k | ≧ ε F 3 : Effective value of harmonic signal f 3 k: Specified value to be used as reference for comparing F 3 ε: Judgment level (= 30%) 14, considering that it superimposed line noise to the relay input signal may be included in the effective value F 3, a state in which the effective value F 3 exceeds 30% ± respect prescribed value k constant When the time has elapsed, it is determined that the analog input circuit is abnormal.

【0009】[0009]

【発明が解決しようとする課題】従来の監視方式におい
て、系統からのリレー入力信号が歪み波形になり、その
高調波成分に監視信号f3の周波数に近い成分が存在す
ると、高調波成分が監視信号f3の加算分として監視回
路に取り込まれ、高調波成分の大きさによってはアナロ
グ入力回路を異常と誤判定する可能性がある。
[SUMMARY OF THE INVENTION In the conventional monitoring system, relay input signals from the system becomes distorted waveform, the component close to the frequency of the monitoring signal f 3 to the harmonic component is present, the harmonic component is monitored incorporated into the monitoring circuit as an addition amount of the signal f 3, it may be erroneously determined as abnormal analog input circuit depending on the size of the harmonic components.

【0010】すなわち、リレー入力信号に含まれる第3
高調波成分f3’とすると、ディジタルフィルタ13で
検出される検出量fは、
That is, the third signal included in the relay input signal
Assuming that the harmonic component is f 3 ′, the detection amount f detected by the digital filter 13 is

【0011】[0011]

【数2】f=f3+f3’ …(1) となり、第3高調波成分f3’の大きさによっては判定
レベルεを越えてしまい、誤判定をしてしまう。
## EQU2 ## f = f 3 + f 3 ′ (1). Depending on the magnitude of the third harmonic component f 3 ′, the value exceeds the determination level ε and an erroneous determination is made.

【0012】なお、(1)式の各信号はベクトル量であ
り、それらを実効値化したときの検出量fは、最小値|
f|minと最大値|f|maxでは以下のようになる。
Each signal in the equation (1) is a vector quantity, and the detected quantity f when they are converted to an effective value is a minimum value |
f | min and the maximum value | f | max are as follows.

【0013】[0013]

【数3】 |f|min=|f3|−|f3’| …(2) |f|max=|f3|+|f3’| …(3) 本発明の目的は、リレー入力信号に監視信号の周波数成
分が含まれる場合にも誤判定を無くしたディジタル形保
護継電装置を提供することにある。
[Number 3] | f | min = | f 3 | - | f 3 '| ... (2) | f | max = | f 3 | + | f 3' | ... (3) object of the present invention, the relay input It is an object of the present invention to provide a digital protection relay device that eliminates erroneous determination even when a signal contains a frequency component of a monitoring signal.

【0014】[0014]

【課題を解決するための手段】監視信号の周波数成分と
リレー入力に含まれる高調波成分とは、周波数が完全に
一致することはなく、特にリレー入力に含まれる高調波
成分は周期的に変動する。このため、両周波数成分の周
波数差は周期的に変化する、いわゆる周期的なすべりを
伴う。
The frequency component of the monitoring signal and the harmonic component contained in the relay input do not completely match in frequency, and the harmonic component contained in the relay input varies periodically. I do. Therefore, the frequency difference between the two frequency components is accompanied by a so-called periodic slip that changes periodically.

【0015】したがって、高調波監視回路14で実効値
化した前記の検出量fは、すべりの周期で最小値|f|
minと最大値|f|maxの間で変化する。このすべりの周
期に比べて十分に長い時間での最小値と最大値を検出
し、この平均値|f|aveを求めると、
Therefore, the detected value f converted into an effective value by the harmonic monitoring circuit 14 has a minimum value | f |
It varies between min and the maximum value | f | max . When the minimum value and the maximum value are detected for a sufficiently long time compared to the slip period, and the average value | f | ave is obtained,

【0016】[0016]

【数4】 |f|ave=(|f|min+|f|max)/2 …(4) となり、この(4)式は前記の(2)、(3)式より、
次の(5)式になる。
Ave = (| f | min + | f | max ) / 2 (4) This equation (4) is obtained from the above equations (2) and (3).
The following equation (5) is obtained.

【0017】[0017]

【数5】|f|ave=|f3| …(5) この(5)式は、平均値|f|aveが監視入力信号f3
実効値|f3|そのものであり、リレー入力信号に高調
波成分が含まれる場合にも監視信号の実効値の最小値と
最大値の平均値にはリレー入力信号の高調波成分による
影響を除いた信号監視入力信号f3の実効値を得ること
ができる。
│f│ ave = │f 3 │ (5) In this equation (5), the average value │f│ ave is the effective value │f 3 │ of the monitoring input signal f 3 , and the relay input signal if it contains harmonic components to obtain the effective value of the signal monitoring input signal f 3, excluding the effect of the harmonic component of the relay input signals to the average value of the minimum and maximum values of the effective value of the monitoring signal Can be.

【0018】上記のことから、高調波信号f3の実効値
3と規定値kとの差分で監視する従来方式に代えて、
平均値|f|aveと規定値kとの差分が判定レベルεを
越えたか否かで監視することにより、リレー入力信号に
含まれる高調波成分による誤判定を無くすことができ
る。
[0018] From the above, in place of a conventional method of monitoring the difference between the effective value F 3 of the harmonic signal f 3 a specified value k,
By monitoring whether the difference between the average value | f | ave and the specified value k exceeds the determination level ε, it is possible to eliminate erroneous determination due to harmonic components included in the relay input signal.

【0019】また、リレー入力信号に含まれる高調波成
分の影響を除いた平均値|f|aveは監視信号f3の実効
値そのものであるため、平均値|f|aveと規定値kと
の差分が判定レベルεよりも低いとき、すなわち監視信
号f3の実効値が規定範囲内にあるときは、リレー入力
信号に含まれる高調波f3’によって監視信号fが規定
値を越えた場合にも異常判定出力をロックすることで誤
判定を無くすことができる。
Further, the average value excluding the effect of the harmonic components included in the relay input signal | f | for ave is the effective value itself of the monitoring signal f 3, average value | f | ave and the prescribed value k When the difference is lower than the determination level ε, that is, when the effective value of the monitoring signal f 3 is within the specified range, the monitoring signal f exceeds the specified value due to the harmonic f 3 ′ included in the relay input signal. In addition, the erroneous determination can be eliminated by locking the abnormality determination output.

【0020】以上までの原理的説明から、本発明は、以
下の構成を特徴とする。
Based on the above principle, the present invention has the following features.

【0021】(第1の発明)アナログ入力回路へのリレ
ー入力信号の基本周波数よりも高い周波数の監視信号を
前記リレー入力信号に重畳させ、前記アナログ入力回路
の出力から抽出した前記監視信号の実効値が規定範囲を
越えたか否かでアナログ入力回路の正常/異常を判定す
るディジタル形保護継電装置において、前記リレー入力
信号に含まれる高い周波数の信号と前記監視信号との間
の周波数のすべりにより生じる前記監視信号の実効値の
最小値と最大値との平均値を求め、この平均値が規定範
囲を越えたときにアナログ入力回路の異常判定を得る監
視処理手段を備えたことを特徴とする。
(First Invention) A monitor signal having a frequency higher than a fundamental frequency of a relay input signal to an analog input circuit is superimposed on the relay input signal, and the effective monitor signal extracted from the output of the analog input circuit is used as an effective signal. In a digital protection relay device that determines whether an analog input circuit is normal or abnormal based on whether a value exceeds a specified range, a frequency slip between a high-frequency signal included in the relay input signal and the monitor signal is provided. Monitoring means for obtaining an average value of the minimum value and the maximum value of the effective value of the monitor signal generated by the above, and obtaining an abnormality determination of the analog input circuit when the average value exceeds a specified range. I do.

【0022】(第2の発明)アナログ入力回路へのリレ
ー入力信号の基本周波数よりも高い周波数の監視信号を
前記リレー入力信号に重畳させ、前記アナログ入力回路
の出力から抽出した前記監視信号の実効値が規定範囲を
越えたか否かでアナログ入力回路の正常/異常を判定す
るディジタル形保護継電装置において、前記監視信号の
実効値が規定範囲を越えたときにアナログ入力回路の異
常判定を得る第1の監視処理手段と、前記リレー入力信
号に含まれる高い周波数の信号と前記監視信号との間の
周波数のすべりにより生じる前記監視信号の実効値の最
小値と最大値との平均値を求め、この平均値が規定範囲
内にあるときに前記第1の監視処理手段の出力をロック
する第2の監視処理手段と、を備えたことを特徴とす
る。
(Second Invention) A monitor signal having a frequency higher than the fundamental frequency of the relay input signal to the analog input circuit is superimposed on the relay input signal, and the effective monitor signal extracted from the output of the analog input circuit is used. In the digital protection relay device which determines whether the analog input circuit is normal or abnormal based on whether the value exceeds a specified range, when the effective value of the monitoring signal exceeds the specified range, the analog input circuit is determined to be abnormal. First monitoring processing means for calculating an average value of a minimum value and a maximum value of an effective value of the monitor signal caused by a frequency slip between a high-frequency signal included in the relay input signal and the monitor signal; And second monitoring processing means for locking the output of the first monitoring processing means when the average value is within a specified range.

【0023】[0023]

【発明の実施の形態】図1は、本発明の実施形態を示す
装置構成図である。高調波監視回路14は、ディジタル
フィルタ13で抽出する第3高調波f3から実効値演算
回路15によって実効値|f|を求め、この実効値|f
|から平均値判定回路16によって平均値|f|ave
求め、さらにこの平均値と規定値kとの差分が判定レベ
ルεを越えたか否かを検出し、規定範囲を越えた場合に
はオンディレイタイマ17によって一定時間の継続を待
って監視異常の判定出力を得る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is an apparatus configuration diagram showing an embodiment of the present invention. The harmonic monitoring circuit 14 obtains the effective value | f | from the third harmonic f 3 extracted by the digital filter 13 by the effective value calculation circuit 15, and this effective value | f
|, An average value | f | ave is obtained by the average value judgment circuit 16, and it is detected whether or not the difference between the average value and the specified value k exceeds the judgment level ε. After a predetermined time is continued by the delay timer 17, a monitoring abnormality determination output is obtained.

【0024】平均値判定回路16による判定は、すべり
の周期に比べて十分長い時間内での最大値と最小値を記
憶し、前記の(4)式による演算で平均値を求め、この
平均値と規定値kとの差分と判定レベルεとの大小比較
で規定範囲にあるか否かの判定を行う。
In the determination by the average value determination circuit 16, the maximum value and the minimum value within a time sufficiently longer than the slip period are stored, and the average value is calculated by the above equation (4). It is determined whether the difference is within a specified range by comparing the difference between the specified value k and the judgment level ε.

【0025】これにより、リレー入力信号に監視信号f
3と同じ高調波成分が含まれている場合にも、監視入力
信号f3の成分のみを抽出した判定ができ、リレー入力
信号に監視信号の周波数成分が含まれる場合にも誤判定
を無くすことができる。
Thus, the monitoring signal f is added to the relay input signal.
If the 3 same harmonic component is included, it is determined that by extracting only components of the monitoring input signal f 3, to eliminate also erroneous determination if it contains a frequency component of the monitoring signal to the relay input signal Can be.

【0026】図2は、本発明の他の実施形態を示す装置
構成図である。高調波監視回路14の判定回路18は、
従来の高調波監視回路での判定と同じに、実効値15で
実効値化した高調波成分|f|と規定値kとの差分が判
定レベルεを越えたか否かを判定し、規定範囲を越えた
ときにオンディレイタイマ17が一定時間継続を確認し
た後に異常判定信号を得る。
FIG. 2 is a block diagram of the apparatus showing another embodiment of the present invention. The determination circuit 18 of the harmonic monitoring circuit 14
As in the case of the conventional harmonic monitoring circuit, it is determined whether or not the difference between the harmonic component | f | When it exceeds, the on-delay timer 17 confirms the continuation for a certain period of time, and then an abnormality determination signal is obtained.

【0027】これに加えて、本実施形態では、平均値判
定回路19とオフディレイタイマ20及び抑止回路21
を設ける。平均値判定回路19は、実効値演算回路15
からの実効値|f|の平均値|f|aveを求め、この平
均値と規定値kとの差分が判定レベルε以内にあるか否
かを検出する。オフディレイタイマ20は、平均値判定
回路19が規定範囲内にあることを検出したときに抑止
回路21へ抑止信号を発生し、この抑止は平均値判定回
路19の検出が規定範囲を越えたとなるときも一定時間
だけ継続する。
In addition, in this embodiment, the average value judging circuit 19, the off-delay timer 20, and the suppressing circuit 21
Is provided. The average value judging circuit 19 includes an effective value calculating circuit 15
Ave is determined, and it is detected whether or not the difference between the average value and the specified value k is within the determination level ε. The off-delay timer 20 generates a suppression signal to the suppression circuit 21 when the average value judgment circuit 19 detects that the average value judgment circuit 19 is within the specified range, and this suppression means that the detection of the average value judgment circuit 19 exceeds the specified range. Sometimes it continues for a certain time.

【0028】この構成により、判定回路18が実効値|
f|の異常を判定したとき、オンディレイタイマ17に
判定出力がでる前に、平均値|f|aveが規定範囲内に
あるときには平均値判定回路19によってその判定結果
が継続する限り判定回路18からの異常判定出力をロッ
クし、誤判定を無くすことができる。
With this configuration, the determination circuit 18 determines the effective value |
When the average value | f | ave is within the specified range before the determination output is output to the on-delay timer 17 when the abnormality of f | is determined, the determination circuit 18 as long as the average value determination circuit 19 continues the determination result. Can be locked, and erroneous determination can be eliminated.

【0029】なお、以上までの実施形態における判定回
路等は、ハードウェア構成に限らず、保護演算部11が
搭載するマイクロプロセッサを処理手段としてソフトウ
ェア構成とすることができる。
The determination circuit and the like in the embodiments described above are not limited to the hardware configuration, but may be a software configuration using a microprocessor mounted on the protection operation unit 11 as a processing unit.

【0030】[0030]

【発明の効果】以上のとおり、本発明によれば、ディジ
タルフィルタで抽出した監視信号の周波数成分の実効値
の大小からアナログ入力回路の異常を監視するのに、実
効値の平均値が規定範囲にあるか否かの判定信号を利用
して監視を行うようにしたため、リレー入力信号に監視
信号の周波数成分が含まれる場合にも誤判定を無くすこ
とができる。
As described above, according to the present invention, in order to monitor the abnormality of the analog input circuit based on the magnitude of the effective value of the frequency component of the monitor signal extracted by the digital filter, the average value of the effective value is within a specified range. Since the monitoring is performed using the determination signal as to whether the monitoring signal is present or not, the erroneous determination can be eliminated even when the frequency component of the monitoring signal is included in the relay input signal.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施形態を示す装置構成図。FIG. 1 is an apparatus configuration diagram showing an embodiment of the present invention.

【図2】本発明の他の実施形態を示す装置構成図。FIG. 2 is an apparatus configuration diagram showing another embodiment of the present invention.

【図3】従来のアナログ入力回路と監視回路の構成図。FIG. 3 is a configuration diagram of a conventional analog input circuit and a monitoring circuit.

【符号の説明】[Explanation of symbols]

1…アナログ入力回路 11…保護演算部 12、13…ディジタルフィルタ 14…高周波監視回路 15…実効値演算回路 16、19…平均値判定回路 17…オンディレイタイマ 18…判定回路 20…オフディレイタイマ 21…抑止回路 DESCRIPTION OF SYMBOLS 1 ... Analog input circuit 11 ... Protection calculation part 12, 13 ... Digital filter 14 ... High frequency monitoring circuit 15 ... Effective value calculation circuit 16, 19 ... Average value judgment circuit 17 ... On-delay timer 18 ... Judgment circuit 20 ... Off-delay timer 21 ... Suppression circuit

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 アナログ入力回路へのリレー入力信号の
基本周波数よりも高い周波数の監視信号を前記リレー入
力信号に重畳させ、前記アナログ入力回路の出力から抽
出した前記監視信号の実効値が規定範囲を越えたか否か
でアナログ入力回路の正常/異常を判定するディジタル
形保護継電装置において、 前記リレー入力信号に含まれる高い周波数の信号と前記
監視信号との間の周波数のすべりにより生じる前記監視
信号の実効値の最小値と最大値との平均値を求め、この
平均値が規定範囲を越えたときにアナログ入力回路の異
常判定を得る監視処理手段を備えたことを特徴とするデ
ィジタル形保護継電装置。
1. A monitoring signal having a frequency higher than a fundamental frequency of a relay input signal to an analog input circuit is superimposed on the relay input signal, and an effective value of the monitoring signal extracted from an output of the analog input circuit is within a specified range. A digital protection relay device that determines whether the analog input circuit is normal or abnormal based on whether or not the monitoring signal is exceeded, wherein the monitoring caused by a frequency slip between a high-frequency signal included in the relay input signal and the monitoring signal. Digital protection characterized by comprising monitoring processing means for obtaining an average value of the minimum value and the maximum value of the effective value of the signal and obtaining an abnormality judgment of the analog input circuit when the average value exceeds a specified range. Relay device.
【請求項2】 アナログ入力回路へのリレー入力信号の
基本周波数よりも高い周波数の監視信号を前記リレー入
力信号に重畳させ、前記アナログ入力回路の出力から抽
出した前記監視信号の実効値が規定範囲を越えたか否か
でアナログ入力回路の正常/異常を判定するディジタル
形保護継電装置において、 前記監視信号の実効値が規定範囲を越えたときにアナロ
グ入力回路の異常判定を得る第1の監視処理手段と、 前記リレー入力信号に含まれる高い周波数の信号と前記
監視信号との間の周波数のすべりにより生じる前記監視
信号の実効値の最小値と最大値との平均値を求め、この
平均値が規定範囲内にあるときに前記第1の監視処理手
段の出力をロックする第2の監視処理手段と、を備えた
ことを特徴とするディジタル形保護継電装置。
2. A monitoring signal having a frequency higher than a fundamental frequency of a relay input signal to an analog input circuit is superimposed on the relay input signal, and an effective value of the monitoring signal extracted from an output of the analog input circuit is within a specified range. A digital protection relay device that determines whether the analog input circuit is normal / abnormal based on whether the analog input circuit has exceeded a predetermined range. Processing means for determining an average value of a minimum value and a maximum value of an effective value of the monitor signal generated by a frequency slip between a high-frequency signal included in the relay input signal and the monitor signal; A second monitoring processing means for locking the output of the first monitoring processing means when is within a prescribed range.
JP10199382A 1998-07-15 1998-07-15 Digital protective relay device Pending JP2000037031A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10199382A JP2000037031A (en) 1998-07-15 1998-07-15 Digital protective relay device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10199382A JP2000037031A (en) 1998-07-15 1998-07-15 Digital protective relay device

Publications (1)

Publication Number Publication Date
JP2000037031A true JP2000037031A (en) 2000-02-02

Family

ID=16406848

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10199382A Pending JP2000037031A (en) 1998-07-15 1998-07-15 Digital protective relay device

Country Status (1)

Country Link
JP (1) JP2000037031A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008090822A (en) * 2006-08-01 2008-04-17 Hamilton Sundstrand Corp Multiplexed signal conditioner
US9391630B2 (en) 2014-06-13 2016-07-12 Hamilton Sundstrand Corporation Multiplexed signal sampler and conditioner

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008090822A (en) * 2006-08-01 2008-04-17 Hamilton Sundstrand Corp Multiplexed signal conditioner
US7817070B2 (en) 2006-08-01 2010-10-19 Hamilton Sundstrand Corporation Method and apparatus for sampling and converting a signal
US9391630B2 (en) 2014-06-13 2016-07-12 Hamilton Sundstrand Corporation Multiplexed signal sampler and conditioner

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