JP2000036238A - Switch circuit - Google Patents

Switch circuit

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Publication number
JP2000036238A
JP2000036238A JP11107046A JP10704699A JP2000036238A JP 2000036238 A JP2000036238 A JP 2000036238A JP 11107046 A JP11107046 A JP 11107046A JP 10704699 A JP10704699 A JP 10704699A JP 2000036238 A JP2000036238 A JP 2000036238A
Authority
JP
Japan
Prior art keywords
switch
circuit
contact
semiconductor
parallel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11107046A
Other languages
Japanese (ja)
Inventor
Shigeisa Imoto
成勲 井本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP11107046A priority Critical patent/JP2000036238A/en
Publication of JP2000036238A publication Critical patent/JP2000036238A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a load switch for power free from chattering and arc discharge of a contact at the time of switching operation, and further ensuring high function and high efficiency as well as low cost. SOLUTION: This switch circuit is formed so that the contacts of a semiconductor AC switch S2 and an electromagnetic switch Ry are connected in parallel and a load power supply E is connected across both ends of the parallel connection circuit Ry and S2, and the serial switch of a load L. Furthermore, a switch drive control power supply Vc is connected to the electromagnetic coil Ry and the input side of a delay circuit 1 in an off-delay state, and the output side of the delay circuit 1 is connected to the gate of the semiconductor AC switch S2. Also, both ends of one contact Ry-1 of the switch Ry are connected in parallel to both ends of the two-way thyrister S2, and the load power supply E is connected across both ends of a serial circuit formed out of the parallel connection circuit of Ry-1 and S2, and the load L, thereby constituting a circuit for closing the contact switch Ry after the completion of the closing operation of the control switch S1, and the control switch S1 is connected to the gate of the twoway thyrister S2. At the same time, the contacts Ry-2 are connected in parallel to both ends of the control switch S1.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、高効率低コストの電気
的にクリーンな電力用開閉スイッチに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-efficiency, low-cost, electrically clean power switch.

【0002】[0002]

【従来の技術】半導体式の無接点スイッチ(以下半導体
スイッチと略称する)は、スイッチングスピードが速
く、スイッチの開閉時のチャタリングが無く、長寿命で
あるのが主な長所であるが、閉状態のスイッチ本体の発
熱が大きな問題となり、その放熱対策が大変である。一
方、例えば電磁開閉器のような機械式有接点スイッチ
(以下電磁スイッチと略称する)は、接点の接触抵抗が
小さいので閉状態の発熱が少なく熱にも強いのが主な長
所であるが、スイッチングスピードが遅く、スイッチの
開閉時に接点のチャタリングがあり、開閉時の接点間の
火花放電などのため短寿命であり、その開閉動作によっ
て電気系統にサージ電圧やパルス電流が発生し各種電子
・電気機器の誤動作や破損の原因になったりしている。
2. Description of the Related Art The main advantages of a semiconductor type non-contact switch (hereinafter simply referred to as a semiconductor switch) are that the switching speed is fast, there is no chattering when the switch is opened and closed, and the life is long. The heat generation of the switch body becomes a serious problem, and its heat dissipation measures are serious. On the other hand, for example, a mechanical contact switch such as an electromagnetic switch (hereinafter simply referred to as an electromagnetic switch) has a main advantage in that the contact resistance of the contacts is small, so that the closed state generates little heat and is strong against heat. The switching speed is slow, the contact has chattering when the switch is opened and closed, and the service life is short due to the spark discharge between the contacts when the switch is opened and closed. The device may malfunction or be damaged.

【0003】[0003]

【発明が解決しようとする課題】従って、本発明は半導
体スイッチの短所と電磁スイッチの短所を無くし、スイ
ッチの開閉時にチャタリングと火花放電が無く、発熱の
少ない高性能低コストの電力用スイッチを提供しより多
方面に経済的効果をもたらすことを目的とする。
SUMMARY OF THE INVENTION Accordingly, the present invention eliminates the disadvantages of a semiconductor switch and an electromagnetic switch, and provides a high-performance, low-cost power switch that generates little heat, has no chattering and spark discharge when the switch is opened and closed. The purpose is to bring economic effects to various fields.

【0004】[0004]

【課題を解決するための手段】本発明(請求項1に記載
の第1発明)のスイッチ回路は、半導体スイッチと電磁
スイッチを並列接続し、スイッチの閉動作のときは半導
体スイッチと電磁スイッチを同時に駆動し、スイッチの
開動作のときは電磁スイッチが先に開動作し遅れて半導
体スイッチが開動作するように駆動する。スイッチの閉
動作のとき半導体スイッチの動作が速いので電磁スイッ
チよりも速く閉状態になり、常に半導体スイッチが閉の
間に電磁スイッチが開閉動作する。従って、開閉時の電
磁スイッチにチャタリングと火花放電が無く、定常運転
状態(スイッチが閉の状態)では、電磁スイッチの接触
抵抗が小さいため発熱が少ない。
According to a first aspect of the present invention, there is provided a switch circuit comprising: a semiconductor switch and an electromagnetic switch connected in parallel; and the semiconductor switch and the electromagnetic switch are connected when the switch is closed. The switches are driven at the same time, and when the switches are opened, the electromagnetic switches are opened first and the semiconductor switches are opened later. Since the operation of the semiconductor switch is fast when the switch is closed, the switch is closed faster than the electromagnetic switch, and the electromagnetic switch always opens and closes while the semiconductor switch is closed. Therefore, there is no chattering and spark discharge in the electromagnetic switch at the time of opening and closing, and in a steady operation state (when the switch is closed), the contact resistance of the electromagnetic switch is small, so that heat generation is small.

【0005】本発明(請求項2に記載の第2発明)のス
イッチ回路は、双方向サイリスタと電磁スイッチの一方
の接点を並列接続し、スイッチの閉動作のときは制御ス
イッチによって双方向サイリスタが先に閉動作し制御ス
イッチの動作した後に電磁スイッチを駆動し、スイッチ
の開動作のときは電磁スイッチが開動作した後に、電磁
スイッチの他の接点を使って双方向サイリスタが開動作
するように駆動する。従って、第1発明と同様の効果が
得られる。
In the switch circuit according to the present invention (the second invention according to claim 2), the bidirectional thyristor and one contact of the electromagnetic switch are connected in parallel, and when the switch is closed, the bidirectional thyristor is controlled by the control switch. First, the electromagnetic switch is driven after the control switch is operated after the closing operation, and the bidirectional thyristor is opened using the other contacts of the electromagnetic switch after the electromagnetic switch is opened when the switch is opened. Drive. Therefore, the same effect as the first invention can be obtained.

【0006】[0006]

【作用】上記構成より成る第1発明のスイッチ回路は、
図1−(a)のタイムチャートに示すようにスイッチ駆
動用制御電圧VcがハイレベルHiになったときに半導
体スイッチが閉になり電磁スイッチの閉動作時間t1だ
け遅れて電磁スイッチが閉状態になる。また、制御電圧
VcがローレベルLoになったときに電磁スイッチが開
になり電磁スイッチの開動作時間以上(t2)の遅れで
半導体スイッチが開状態になる。
The switch circuit according to the first invention having the above-described structure is
As shown in the time chart of FIG. 1A, when the switch drive control voltage Vc becomes high level Hi, the semiconductor switch is closed and the electromagnetic switch is closed with a delay of the electromagnetic switch closing operation time t1. Become. When the control voltage Vc becomes low level Lo, the electromagnetic switch is opened, and the semiconductor switch is opened with a delay of (t2) or more than the opening operation time of the electromagnetic switch.

【0007】上記構成より成る第2発明のスイッチ回路
は、図1−(a)のタイムチャートに示すようにスイッ
チ駆動用制御電圧VcがハイレベルHiになったとき又
は制御スイッチが閉状態になったとき双方向サイリスタ
スイッチが閉になり電磁スイッチの閉動作時間t1だけ
遅れて電磁スイッチが閉状態になる。また、制御電圧V
cがローレベルLoになったとき又は制御スイッチが開
状態になったとき電磁スイッチが先に開になり負荷電流
の零付近で双方向サイリスタスイッチが開状態になる。
In the switch circuit of the second invention having the above-described structure, as shown in the time chart of FIG. 1A, when the switch drive control voltage Vc becomes high level Hi or the control switch is closed. Then, the bidirectional thyristor switch is closed and the electromagnetic switch is closed with a delay of the closing operation time t1 of the electromagnetic switch. Also, the control voltage V
When c becomes low level Lo or when the control switch is opened, the electromagnetic switch is opened first and the bidirectional thyristor switch is opened near zero load current.

【0008】[0008]

【実施例】次に本発明の実施例について、図面を用いて
詳細に説明する。
Next, embodiments of the present invention will be described in detail with reference to the drawings.

【0009】(第1実施例)第1実施例のスイッチ回路
は、第1発明の実施例であり、図1−(b)に示すよう
に、パワーMOSFETから成る半導体交流スイッチS
2と電磁スイッチRyの接点を並列接続し、RyとS2
の並列接続回路と負荷Lの直列回路の両端に負荷電源E
を接続し、スイッチ駆動用制御電源Vcを電磁コイルR
yとオフディレイの遅延回路1の入力側に接続し、遅延
回路1の出力を半導体交流スイッチS2のゲートに接続
する。
(First Embodiment) The switch circuit of the first embodiment is an embodiment of the first invention, and as shown in FIG. 1 (b), a semiconductor AC switch S composed of a power MOSFET.
2 and the contacts of the electromagnetic switch Ry are connected in parallel, and Ry and S2
And the load power supply E across the series circuit of the load L and the load power supply E
And the switch driving control power supply Vc is connected to the electromagnetic coil R.
The output of the delay circuit 1 is connected to the gate of the semiconductor AC switch S2.

【0010】図1−(b)において、制御電圧Vcがハ
イレベルになると電磁コイルRyと半導体スイッチS2
のゲートは同時に駆動されるが、半導体スイッチの動作
スピードが電磁スイッチの動作スピードより速いので半
導体スイッチが先に閉状態になり、制御電圧Vcがロー
レベルになったときは電磁コイルRyの励磁が先に解除
され半導体スイッチは遅延回路1のオフディレイによっ
てt2の時間だけ遅れて駆動が解除されるので電磁スイ
ッチが先に開状態になる。従って、電磁スイッチの開閉
動作は常に、半導体スイッチが閉の状態で行われるので
電磁スイッチの開閉動作時の過渡現象が非常に小さくな
る。ここで、制御電圧Vcのハイレベルとは電磁コイル
Ryの励磁に必要な電圧の大きさでありローレベルとは
電磁コイルRyの励磁の解除に必要な電圧の大きさであ
る。t2は遅延回路1のコンデンサCの大きさに比例す
る。抵抗Rを取り除いても同様の効果が得られる。同図
において、電磁スイッチRyを2極以上の手動スイッチ
とした図3−(b)の構成でも同様の効果が得られる。
同図のコンデンサC2と抵抗R6は接点のチャタリング
防止用であり取り除くこともできる。遅延回路1は図1
−(c)又は図1−(d)に示すように電磁スイッチR
yのノーマルクローズ接点を利用してより最適なオフデ
ィレイの遅延回路が構成できる。また、半導体交流スイ
ッチS2として図2−(a)〜(f)に示す各種の交流
スイッチが採用でき、負荷電源Eが直流の場合は、半導
体スイッチS2は直流タイプが使用でき例えば、図2−
(g)に示すようにFET、トランジスタ、IGBT、
GTO、サイリスタ等を採用することができる。制御電
圧Vcが交流の場合は、遅延回路1として図1−(e)
の回路を採用することができる。他の例として半導体ス
イッチS2が双方向サイリスタ(トライアック)の場合
の実施例を図3−(a)に示す。この図において接点R
y−2は取り除いても同様の効果が得られる。また本発
明全体を通して回路ブロック2として図3−(c)又は
図3−(d)の回路を採用することができる。
In FIG. 1 (b), when the control voltage Vc goes high, the electromagnetic coil Ry and the semiconductor switch S2
Are driven simultaneously, but since the operation speed of the semiconductor switch is faster than the operation speed of the electromagnetic switch, the semiconductor switch is closed first, and when the control voltage Vc becomes low level, the excitation of the electromagnetic coil Ry is stopped. The semiconductor switch is released first, and the semiconductor switch is released after a delay of t2 due to the off-delay of the delay circuit 1, so that the electromagnetic switch is opened first. Therefore, since the opening and closing operation of the electromagnetic switch is always performed while the semiconductor switch is closed, a transient phenomenon at the time of the opening and closing operation of the electromagnetic switch becomes extremely small. Here, the high level of the control voltage Vc is the magnitude of the voltage required for exciting the electromagnetic coil Ry, and the low level is the magnitude of the voltage required for canceling the excitation of the electromagnetic coil Ry. t2 is proportional to the size of the capacitor C of the delay circuit 1. The same effect can be obtained even if the resistor R is removed. In the figure, the same effect can be obtained by the configuration of FIG. 3B in which the electromagnetic switch Ry is a manual switch having two or more poles.
The capacitor C2 and the resistor R6 in the figure are for preventing chattering of the contact and can be removed. The delay circuit 1 is shown in FIG.
-(C) or an electromagnetic switch R as shown in FIG.
A more optimal off-delay delay circuit can be configured using the normally closed contact y. Various types of AC switches shown in FIGS. 2A to 2F can be employed as the semiconductor AC switch S2. When the load power supply E is DC, a DC switch can be used as the semiconductor switch S2.
As shown in (g), FET, transistor, IGBT,
GTO, thyristor, etc. can be adopted. When the control voltage Vc is alternating current, the delay circuit 1 shown in FIG.
Circuit can be adopted. As another example, an embodiment in which the semiconductor switch S2 is a bidirectional thyristor (triac) is shown in FIG. In this figure, the contact R
The same effect can be obtained even if y-2 is removed. Further, the circuit of FIG. 3C or FIG. 3D can be adopted as the circuit block 2 throughout the present invention.

【0011】(第2実施例)第2実施例のスイッチ回路
は、第2発明の実施例であり、図4−(a)に示すよう
に、双方向サイリスタS2の両端に二つ以上の独立した
接点を備えた機械式有接点スイッチRyの一つの接点R
y−1の両端を並列に接続し、Ry−1とS2の並列接
続回路と負荷Lとの直列回路の両端に負荷電源Eを接続
し、有接点スイッチRyと双方向サイリスタS2を駆動
するための制御スイッチS1の閉動作完了後に有接点ス
イッチRyが閉動作する回路構成とし、制御スイッチS
1を双方向サイリスタS2のゲートに接続し、制御スイ
ツチS1の両端に有接点スイッチRyの他の接点Ry−
2を並列に接続する。
Second Embodiment A switch circuit according to a second embodiment is an embodiment of the second invention. As shown in FIG. 4A, two or more independent thyristors S2 are provided at both ends of a bidirectional thyristor S2. Contact R of a mechanical contact switch Ry provided with a set contact
To connect a load power source E to both ends of a series circuit of a load L and a parallel connection circuit of Ry-1 and S2 and to drive a contact switch Ry and a bidirectional thyristor S2. The contact switch Ry is closed after the closing operation of the control switch S1 is completed.
1 is connected to the gate of the bidirectional thyristor S2, and both ends of the control switch S1 are connected to the other contact Ry- of the contact switch Ry.
2 in parallel.

【0012】図4−(a)において、制御スイッチS1
が閉状態になったとき双方向サイリスタスイッチS2が
先に閉になり電磁スイッチRyの閉動作時間t1だけ遅
れて電磁スイッチが閉状態になる。また、制御スイッチ
S1が開状態になったとき電磁スイッチRyが先に開状
態になり続いて負荷電流の零付近で双方向サイリスタス
イッチS2が開状態になる。制御スイッチS1が電磁ス
イッチの場合は図4−(b)に示すように制御電圧Vc
によって電磁スイッチS3を駆動する。他の実施例とし
て図4−(c)に示すように、制御スイッチS1を取り
除きスイッチRyのみでも同様の効果が得られる。同図
において、コンデンサC2と抵抗R6はサージ吸収又は
チャタリング防止用であり、不要の場合もある。他の実
施例として図4−(d)に示すように、図4−(c)の
回路にコンデンサC1と抵抗R4から成る微分回路を増
設しても同様の効果が得られる。他の実施例として図5
−(a)に示すように、電磁スイッチRyとフォトトラ
イアックS3の組合せによっても同様の効果が得られ
る。同図において回路ブロック2は図3−(c)又は図
3−(d)の回路と代替できる。他の実施例として図5
−(b)に示すように、電磁スイッチRyと半導体スイ
ッチS2を別々の制御信号x1、x2によって駆動する
とCPUやパソコンなどのコンピュータソフトによって
図1−(a)のタイミング調整が可能である。本発明の
全体を通して、双方向サイリスタS2にゼロクロスタイ
プを採用した場合は電源Eの電圧零でON、負荷電流零
でOFFという負荷制御が可能である。また制御電圧の
印加方法は図5−(c)に示すようにトランジスタやF
ETやIC回路を通して行っても同様の効果が得られ
る。本発明のスイッチ回路の機械的構造としては図6に
示すような種々の形状や他の装置への組込みが可能であ
る。
In FIG. 4A, the control switch S1
Is closed, the bidirectional thyristor switch S2 is closed first, and the electromagnetic switch is closed after a delay of the closing operation time t1 of the electromagnetic switch Ry. When the control switch S1 is opened, the electromagnetic switch Ry is opened first, and subsequently, the bidirectional thyristor switch S2 is opened near zero load current. When the control switch S1 is an electromagnetic switch, as shown in FIG.
Drives the electromagnetic switch S3. As another embodiment, as shown in FIG. 4C, the same effect can be obtained by removing the control switch S1 and only the switch Ry. In the figure, the capacitor C2 and the resistor R6 are for absorbing surge or preventing chattering, and may not be necessary. As another embodiment, as shown in FIG. 4D, the same effect can be obtained by adding a differentiating circuit including the capacitor C1 and the resistor R4 to the circuit of FIG. FIG. 5 shows another embodiment.
As shown in (a), the same effect can be obtained by the combination of the electromagnetic switch Ry and the phototriac S3. In the figure, the circuit block 2 can be replaced with the circuit of FIG. 3- (c) or FIG. 3- (d). FIG. 5 shows another embodiment.
As shown in FIG. 1B, when the electromagnetic switch Ry and the semiconductor switch S2 are driven by different control signals x1 and x2, the timing adjustment of FIG. 1A can be performed by computer software such as a CPU and a personal computer. Throughout the present invention, when a zero-cross type is adopted as the bidirectional thyristor S2, load control such that the power supply E is ON when the voltage of the power supply E is zero and OFF when the load current is zero is possible. Further, as shown in FIG.
Similar effects can be obtained by performing the processing through an ET or IC circuit. As the mechanical structure of the switch circuit of the present invention, various shapes as shown in FIG. 6 and incorporation into other devices are possible.

【0013】[0013]

【発明の効果】上記作用を奏する第1発明及び第2発明
はいずれの場合も半導体スイッチと機械式スイッチを並
列運転することによって、両者の短所を無くし、スイッ
チ開閉時に接点のチャタリングと火花放電が無く、発熱
が少なくてサージ電圧やパルス電流の発生しない高性能
で低コストの電力用負荷開閉スイッチを提供できる。
According to the first and second aspects of the present invention, the semiconductor switch and the mechanical switch are operated in parallel in both cases, thereby eliminating the disadvantages of the two. It is possible to provide a high-performance, low-cost power load on / off switch that generates no heat, generates little surge voltage and generates no pulse current.

【図面の簡単な説明】[Brief description of the drawings]

【図1−(a)】本発明の動作タイムチャートである。FIG. 1- (a) is an operation time chart of the present invention.

【図1−(b)】第1発明の第1実施例の全体を示す電
気回路図である。
FIG. 1- (b) is an electric circuit diagram showing the entire first embodiment of the first invention.

【図1−(c)】本発明に関わる遅延回路の他の実施例
を示す電気回路図である。
FIG. 1- (c) is an electric circuit diagram showing another embodiment of the delay circuit according to the present invention.

【図2】本発明に関わる各種半導体スイッチの電気回路
図である。
FIG. 2 is an electric circuit diagram of various semiconductor switches according to the present invention.

【図3】第1発明の他の実施例を示す電気回路図であ
る。
FIG. 3 is an electric circuit diagram showing another embodiment of the first invention.

【図4】第2発明の第2実施例の全体を示す電気回路図
である。
FIG. 4 is an electric circuit diagram showing the entire second embodiment of the second invention.

【図5】本発明の他の実施例を示す電気回路図である。FIG. 5 is an electric circuit diagram showing another embodiment of the present invention.

【図6】本発明の機械的構造の実施例を示す形状図であ
る。
FIG. 6 is a shape diagram showing an embodiment of the mechanical structure of the present invention.

【符号の説明】[Explanation of symbols]

1はオフディレイの遅延回路 Ryは機械式の有接点スイッチ、Lは電気負荷 S1は有接点又は無接点の制御スイッチ S2は半導体式スイッチ又は無接点スイッチ S3はフォトトライアック、フォトMOSFET等の各
種フォトカプラ、無接点リレーまたは有接点リレー Eは交流または直流電源、Vcは機械式接点または無接
点レリーの駆動電源
1 is an off-delay delay circuit Ry is a mechanical contact switch, L is an electric load S1 is a contact or non-contact control switch S2 is a semiconductor switch or a non-contact switch S3 is a photo triac, a photo MOSFET, etc. Coupler, contactless relay or contact relay E is AC or DC power supply, Vc is drive power supply for mechanical contact or contactless relay

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 半導体式の無接点スイッチの両端に機械
式の有接点スイッチの両端を並列に接続し、前記半導体
式無接点スイッチが閉の状態で前記機械式有接点スイッ
チを開閉動作させるために、前記有接点スイッチの例え
ば電磁コイルのような駆動部に駆動電源を接続し、前記
半導体式の無接点スイッチのゲートにはオフディレイの
遅延回路を通して前記駆動電源を接続して成ることを特
徴とするスイッチ回路。
1. Both ends of a mechanical contact switch are connected in parallel to both ends of a semiconductor contactless switch to open and close the mechanical contact switch with the semiconductor contactless switch closed. A driving power source is connected to a driving unit such as an electromagnetic coil of the contact switch, and the driving power source is connected to a gate of the semiconductor type non-contact switch through an off-delay delay circuit. Switch circuit.
【請求項2】 二つ以上の独立した接点を備えた機械式
有接点スイッチの一方の接点の両端に双方向サイリスタ
の両端を並列に接続し、前記有接点スイッチと前記双方
向サイリスタを駆動するための制御スイッチの閉動作完
了後に前記有接点スイッチが閉動作する回路を構成し、
前記制御スイッチを前記双方向サイリスタのゲートに接
続し、前記制御スイツチの両端に前記有接点スイッチの
他方の接点を並列に接続して成ることを特徴とするスイ
ッチ回路。
2. The two-way thyristor is connected in parallel to both ends of one contact of a mechanical contact switch having two or more independent contacts, and drives the contact switch and the bidirectional thyristor. A circuit for closing the contact switch after the closing operation of the control switch is completed,
A switch circuit comprising the control switch connected to the gate of the bidirectional thyristor, and the other contact of the contact switch connected in parallel to both ends of the control switch.
JP11107046A 1998-04-06 1999-03-10 Switch circuit Pending JP2000036238A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11107046A JP2000036238A (en) 1998-04-06 1999-03-10 Switch circuit

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP13252198 1998-04-06
JP10-132521 1998-04-06
JP11107046A JP2000036238A (en) 1998-04-06 1999-03-10 Switch circuit

Publications (1)

Publication Number Publication Date
JP2000036238A true JP2000036238A (en) 2000-02-02

Family

ID=26447112

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11107046A Pending JP2000036238A (en) 1998-04-06 1999-03-10 Switch circuit

Country Status (1)

Country Link
JP (1) JP2000036238A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003338239A (en) * 2002-04-12 2003-11-28 Lg Industrial Syst Co Ltd Hybrid dc electromagnetic contactor
JP2006050697A (en) * 2004-08-02 2006-02-16 Kyoto Denkiki Kk Ac power regulator
US7057279B2 (en) 2001-11-26 2006-06-06 Sony Corporation High-frequency circuit block, its manufacturing method, high-frequency module device, and its manufacturing method
JP2008043155A (en) * 2006-08-10 2008-02-21 Yazaki Corp Load driving circuit
JP2010074499A (en) * 2008-09-18 2010-04-02 Panasonic Electric Works Co Ltd Relay unit
CN101850927A (en) * 2009-03-31 2010-10-06 住友重机械工业株式会社 Suspended magnet power circuit
WO2016199428A1 (en) * 2015-06-10 2016-12-15 パナソニックIpマネジメント株式会社 Switch device
JP2017126544A (en) * 2016-01-11 2017-07-20 嶋田 隆一 Non-arc current switching device

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7057279B2 (en) 2001-11-26 2006-06-06 Sony Corporation High-frequency circuit block, its manufacturing method, high-frequency module device, and its manufacturing method
US7079363B2 (en) 2002-04-12 2006-07-18 Lg Industrial Systems Co., Ltd. Hybrid DC electromagnetic contactor
JP2003338239A (en) * 2002-04-12 2003-11-28 Lg Industrial Syst Co Ltd Hybrid dc electromagnetic contactor
JP4533034B2 (en) * 2004-08-02 2010-08-25 京都電機器株式会社 AC power conditioner
JP2006050697A (en) * 2004-08-02 2006-02-16 Kyoto Denkiki Kk Ac power regulator
JP2008043155A (en) * 2006-08-10 2008-02-21 Yazaki Corp Load driving circuit
JP2010074499A (en) * 2008-09-18 2010-04-02 Panasonic Electric Works Co Ltd Relay unit
CN101850927A (en) * 2009-03-31 2010-10-06 住友重机械工业株式会社 Suspended magnet power circuit
JP2010235293A (en) * 2009-03-31 2010-10-21 Sumitomo Heavy Ind Ltd Power supply circuit for lifting magnet
WO2016199428A1 (en) * 2015-06-10 2016-12-15 パナソニックIpマネジメント株式会社 Switch device
CN107710617A (en) * 2015-06-10 2018-02-16 松下知识产权经营株式会社 Switching device
JPWO2016199428A1 (en) * 2015-06-10 2018-03-29 パナソニックIpマネジメント株式会社 Switch device
JP2017126544A (en) * 2016-01-11 2017-07-20 嶋田 隆一 Non-arc current switching device

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