JP2000028654A - Low voltage detecting circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the fluctuations of a detecting output by a power noise in a low voltage detecting circuit, that is preferably used for a battery operation device in a portable apparatus. SOLUTION: The voltage of a power line 19 of a power voltage VDD is extracted by dividing with voltage dividing resistances R8, R9, and the voltage is taken in by dividing with a resistance among resistances R1, R2, R3, R4 in a resistance selection circuit 16 and dividing voltage resistances R5, R7 and is compared with a specified reference level VREF at a comparator 12. When the comparator 12 once conducts a low level decision and an interrupt signal generating circuit 13 produces an interrupt signal, a processing circuit 14 switches to a control signal HIS to open a short-circuit terminals of a level-shift resistance R6, that is inserted between the dividing voltage resistances R5, R7 and inserts the level-shift resistance R6 to cause a voltage dividing value VNETB to be lowered. Thereby, the fluctuations of a detecting output by power noise can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a low-voltage detection circuit which is suitably applied to a device using a battery, such as a portable computer and an information processing terminal, and a semiconductor integrated circuit mounted on the device. About.

[0002]

2. Description of the Related Art FIG. 5 is a block diagram showing an electrical configuration of a typical prior art low voltage detection circuit 1. As shown in FIG. The low-voltage detection circuit 1 is connected to a battery, divides a voltage of the power supply line 2 at a high level VDD, which is a voltage to be detected, by a voltage dividing resistor r1 to r4 of a resistor circuit 3 and takes out the divided voltage vnetb. Is compared with a predetermined reference voltage VREF by a comparator 4. When vnetb <VREF, the comparator 4 causes an interrupt signal generation circuit 5 to generate an interrupt signal to a processing circuit 6 such as a microcomputer. The processing circuit 6
Is switched to an operation in a low voltage state.

[0003]

In the above-described low-voltage detection circuit 1 of the prior art, there is a problem that power supply noise is amplified and output when the determination result of the comparator 4 is inverted. That is, the power supply voltage V
DD gradually decreases, and in addition to this, FIG.
As shown in (a), when the divided voltage value vnetb decreases, the output of the comparator 4 is not inverted only at the moment when vnetb <VREF, and the divided voltage value vnetb is not changed due to the power supply noise. However, the comparator 4 repeatedly fluctuates the output in a predetermined voltage range with respect to the reference voltage VREF, and generates ringing noise in the output voltage as shown in FIG. Therefore, the processing circuit 6 cannot perform accurate low-voltage detection, and cannot perform a stable operation while the output fluctuation occurs.

An object of the present invention is to provide a low voltage detection circuit capable of performing a stable low voltage detection operation without being affected by power supply noise.

[0005]

According to a first aspect of the present invention, a low voltage detection circuit divides a voltage to be detected by a voltage dividing resistor, takes in the divided voltage, and compares the divided voltage with a predetermined reference value by comparing means. A low-voltage detection circuit that performs low-voltage determination by performing a low-voltage determination circuit, wherein a level shift resistor interposed in series or in parallel with the voltage-dividing resistor, and a first switching for bypass connected in parallel or in series with the level-shift resistor And a control means for switching a switching state of the switching element when a low voltage is determined by the comparing means.

According to the above configuration, when the level shift resistor is interposed in series with the voltage dividing resistor, the first switching element is connected in parallel with the level shift resistor. If the voltage dividing position is a connection point between the level shift resistor and the low-level voltage dividing resistor, the control means initially causes the first switching element to conduct, and the level shift resistor to turn on. Is bypassed, and the divided voltage is input to the comparing means at a relatively high level, and once the low voltage determination is performed by the comparing means, the control means cuts off the first switching element, A level shift resistor is inserted between the voltage dividing resistors, and the voltage dividing value is input to the comparing means at a relatively low level.

In the case where the position for taking out the divided voltage value is a connection point between the level shift resistor and the high-level divided resistor, the control means initially shuts off the first switching element. , A level shift resistor is interposed between the voltage dividing resistors, and the voltage dividing value is input to the comparing means at a relatively high level, and once the low voltage determination is performed by the comparing means, the control means
The first switching element is turned on, and the divided voltage is input to the comparing means at a relatively low level.

On the other hand, when a level shift resistor is interposed in parallel with the voltage dividing resistor, the first switching element is connected in series with the level shift resistor. When the level shift resistor is interposed in parallel with the low-level voltage-dividing resistor, the control means initially shuts off the first switching element and compares the voltage-divided value at a relatively high level. Once the low voltage judgment is made by the comparing means, the control means conducts the first switching element and inputs the divided voltage to the comparing means at a relatively low level.

In the case where the level shift resistor is interposed in parallel with the high-level voltage dividing resistor, the control means initially conducts the first switching element to separate the voltage at a relatively high level. Pressure value is input to the comparison means,
When the low voltage is determined by the comparing means, the control means cuts off the first switching element and inputs the divided voltage value to the comparing means at a relatively low level.

Therefore, the control means controls the insertion of the level shift resistor into the voltage dividing resistor and the bypass, so that the detected voltage is input to the comparing means at a relatively high divided value at the beginning of the detecting operation. Once the low voltage determination is made, the divided voltage value is reduced. As a result, even when the power supply noise is superimposed on the detected voltage, the noise does not change the determination result of the comparing means, and a stable determination operation can be performed.

A low voltage detection circuit according to a second aspect of the present invention is provided in association with the voltage dividing resistor, and includes a plurality of selection resistors arranged in series or parallel to each other, and a separate selection resistor for each of the selection resistors. Correspondingly, a second switching element is connected in parallel or in series, and a selecting means for controlling a switching state of the second switching element is provided.

According to the above configuration, the selection means controls the switching of the second switching element, whereby the selection resistance is switched to change the resistance value, thereby changing the divided voltage value of the detected voltage. Can be.

Therefore, even if a common reference value is used, the judgment level of the low voltage judgment can be changed. Even if the low voltage detection circuit is integrated, even if the external terminal is short-circuited, the judgment of the low voltage can be made. The level can be switched, the low voltage detection circuit can be used in common for differences in power supply voltage, circuit specifications, etc., and various applications such as generating a warning corresponding to a plurality of voltage levels can be performed. Can be made possible.

Furthermore, a low-voltage detection circuit according to a third aspect of the present invention includes a power supply switch provided in series with the power supply line of the voltage dividing resistor and the comparison means, the conduction of which is controlled by the control means when a voltage is detected. It is characterized by having.

According to the above configuration, only when the voltage is detected,
Since the voltage to be detected is applied to the voltage dividing resistor and power is supplied to the comparing means, low power consumption can be achieved.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described.
It will be described below with reference to FIGS.

FIG. 1 is a block diagram showing an electrical configuration of a low voltage detection circuit 11 according to one embodiment of the present invention. The low voltage detection circuit 11 includes a comparator 12, an interrupt signal generation circuit 13, a processing circuit 14, a decode circuit 15, a resistance selection circuit 16, a power switch circuit 17, a level shift circuit 18, It is provided with piezoresistors R8, R9, R5 and R7.

The low-voltage detection circuit 11 is configured to output the high-level voltage of the power supply line 19 from the battery, which is the detected voltage, to one of the selection resistors R1 to R4 selected by the resistance selection circuit 16. , Voltage dividing resistors R8, R9, R5
R7 and the divided voltage value VNETB is compared with the comparator 12
In the above, for example, a comparison is made with a predetermined reference voltage VREF input from the outside, and once a low level determination is made, the processing circuit 14 responds to the interrupt signal generated by the interrupt signal generation circuit 13 and In the interrupt processing routine, the voltage division value VNETB is reduced by the level shift circuit 18 to suppress undesired output fluctuations.

The resistor selection circuit 16 includes four selection resistors R1 to R4 arranged in parallel with each other, and transistors Tr11 to Tr14 provided in series corresponding to the selection resistors R1 to R4, respectively. It is comprised including. The transistors Tr11 to Tr14 are selectively controlled to be conductive by the decoding circuit 15 as described later, and thereby the resistance value Rs of the resistance selection circuit 16 is changed.
, One of the resistance values of the resistors R1 to R4 is selected.

The resistor selection circuit 16, the voltage dividing resistor R5, the level shift resistor R6, and the voltage dividing resistor R7 are connected in series, and this series circuit and the voltage dividing resistor R9 are connected in parallel.
The voltage VDD of the power supply line 19 is applied to the parallel circuit via the voltage dividing resistor R8.

The decode circuit 15 comprises four NAND circuits.
The circuit includes gates A1 to A4 and two inverters B1 and B2. The processing circuit 14 outputs selection signals SELA and SELB of 2 bits.
The decoding circuit 15 outputs the selection signals SELA, SEL
B, and decodes the transistors Tr11-Tr1.
4 is driven selectively.

The selection signal SELA is supplied to the inverter B1
, And to one input of NAND gates A1 and A2 and directly to one input of NAND gates A3 and A4. On the other hand, the selection signal SE
LB is directly applied to the other inputs of NAND gates A2 and A4, and is input to inverter NA through inverter B2.
It is provided to the other inputs of ND gates A1 and A3.

As a result, as shown in Table 1, when both of the selection signals SELA and SELB become low level, NA
The output of the ND gate A1 becomes low level, and the transistor Tr11 conducts. When the selection signal SELA goes low and the selection signal SELB goes high, the output of the NAND gate A2 goes low and the transistor Tr12 conducts. When the selection signal SELA goes high and the selection signal SELB goes low, the output of the NAND gate A3 goes low,
The transistor Tr13 is turned on. The selection signal SELA,
When both SELBs go high, NAND gate A
4 becomes low level, and the transistor Tr14
Becomes conductive.

[0024]

[Table 1]

Thus, in response to the 2-bit selection signals SELA and SELB from the processing circuit 14, the transistors Tr11 to Tr14 are alternatively turned on, and the resistance value Rs of the resistance selection circuit 16 is switched.

The position from which the divided voltage value VNETB is extracted is set at a connection point 20 between the level shift resistor R6 and the divided voltage resistor R7. A transistor Tr1 is provided in parallel with the level shift resistor R6.
1 is supplied with a control signal HIS indicating the history of low voltage detection from the processing circuit 14 via the inverter B11.
The processing circuit 14 sets the control signal HIS to a high level in a normal state, and thereby the transistor Tr1
Is conducted, the terminals of the level shift resistor R6 are short-circuited, and the potential of the connection point 20 is raised. On the other hand, when a low voltage determination is performed as described later, the processing circuit 14 sets the control signal HIS to a low level, thereby turning off the transistor Tr1 and setting the voltage dividing resistors R5 and R5.
7, a level shift resistor R6 is interposed,
The potential at node 20 is reduced.

The power switch circuit 17 includes three transistors Tr2 to Tr4, and is controlled to be turned on / off in synchronization with each other by an enable signal EN from the processing circuit 14. The transistor Tr2 is
The transistor Tr3 is interposed between the voltage dividing resistor R9 and the ground line, the transistor Tr3 is interposed between the voltage dividing resistor R7 and the ground line, and the transistor Tr4 is connected to the comparator 12
Between the power supply terminal on the low level side and the ground line.

Therefore, when the enable signal EN goes high, the transistors Tr2 to Tr4 conduct, and the power supply voltage VDD is applied to the voltage dividing resistors R8, R9, R5 and R7.
Is applied, the comparator 12 is energized, and the voltage detection operation is performed.

FIG. 2 is an equivalent circuit diagram when the control signal HIS in the low voltage detection circuit 11 configured as described above is at a low level, that is, when the transistor Tr1 is turned off. As described above, the resistance selection circuit 1
Assuming that the resistance value of any of the selection resistors R1 to R4 selected in 6 is Rs, the detection voltage VNETB can be expressed by Expression 1 using the power supply voltage VDD, as is apparent from FIG. .

[0030]

(Equation 1)

Where Rx is

[0032]

(Equation 2)

Can be represented by

The selection resistors R1 to R4, the level shift resistor R6 and the voltage dividing resistors R5, R7 to R9 are, for example, V
The level VN at which a voltage drop should be detected for DD = 5V
ET is, for example, 4.7V, 4.6V, 4.5V, 3.
When it is set to 0 V, for example, it is selected as shown in Table 2.

[0035]

[Table 2]

The low voltage detection circuit 1 configured as described above
1, when the detection timing reaches a predetermined time, for example, every 10 seconds, the processing circuit 14 sets the enable signal EN to the high level, turns on the power supply switch circuit 17, and connects the resistances R5 to R9, the resistance selection circuit 16 and the comparison circuit. And the control signal HIS is set to the high level to turn on the transistor Tr1 to short-circuit the terminals of the level shift resistor R6.
ELA and SELB are output, and the transistors Tr11 to Tr14 in the resistance selection circuit 16 are selectively turned on, the resistance value Rs of the resistance selection circuit 16 is set, and the low voltage detection operation is started.

As the power supply voltage VDD decreases, the voltage division value VNETB decreases as shown in FIG. 3A, and the comparator 12 determines that the divided voltage value VNETB becomes lower than the reference voltage VREF. And the processing circuit 14 outputs the control signal H
IS is set to the low level, the transistor Tr1 is cut off, and the level shift resistor R6 is inserted. by this,
As shown in FIG. 3A, the partial pressure value VNETB decreases,
That is, the detection level VNET apparently rises, and as shown in FIG. 3B, the subsequent determination result of the comparator 12 does not undesirably fluctuate even with the influence of power supply noise. , The low level determination is stably performed.

Table 1 shows the selection signals SELA and SE.
Along with the selection resistors R1 to R4 selected by LB,
The divided value R at the connection point 20 when the respective selection resistors R1 to R4 are selected and the detection level VNET are shown. Here, R and VNET are values when HIS is at a low level, that is, when the transistor Tr1 is turned off. As described above, VDD is set to 5V.

FIG. 4 is a flow chart for explaining the low voltage detecting operation of the processing circuit 14 as described above. By the counting operation by the timer in step s1, when the predetermined detection timing at the predetermined time is reached,
In step s2, the standby state of the low voltage detection operation is released, and the detection operation is started. In step s3, first, selection of the selection signals SELA and SELB for determining the resistance value Rs of the resistance selection circuit 16 and the control signal H
An initial setting for turning on the transistor Tr1 by setting IS to the low level is performed. In step s4, the enable signal EN is set to the high level, and the power is turned on by the power switch circuit 17.

At step s5, the interrupt signal generation circuit 13
Or not, ie, the divided voltage value VN
It is determined whether or not ETB is lower than the reference voltage VREF. If not, the process returns to step s1 and
Wait again, if so, step s
Move to 6. In step s6, the control signal HIS is set to the high level, the transistor Tr1 is cut off, and the level shift resistor R6 is inserted. As a result, the divided voltage value VNETB is changed, and the detection voltage VNET is reduced. In step s7, low voltage detection processing such as notifying the user of a voltage drop is performed.

Once the low voltage detection is performed in this way, thereafter, the detection voltage VNET is reduced by the level shift resistor R6, and the comparator 12
Output can be stabilized.

Further, since the processing circuit 14 controls the switching of the transistors Tr11 to Tr14 via the decoding circuit 15, the selection resistors R1 to R4 are switched and the resistance value Rs is switched, so that the common reference voltage VREF is used. However, the determination level VNET for the low-voltage determination can be changed, and even if the low-voltage detection circuit 11 is integrated, the determination level for the low voltage can be switched. In contrast, the low voltage detection circuit can be shared, and various applications such as generation of a warning corresponding to a plurality of voltage levels can be realized.

Further, the battery consumption time is relatively long. On the other hand, the resistors R5 to R9, the resistor selection circuit 16 and the comparator 12 are energized only by the enable signal EN during the low-voltage detection operation. By setting the time to be long, power consumption can be significantly reduced, and the life of the battery can be prolonged.

The selection signals SELA, SELB
May be realized by a voltage applied to an external input terminal of the low-voltage detection circuit 11 which is formed into an integrated circuit, and a signal which is reset when a battery is replaced and set by an interrupt signal is used as a control signal HIS. By
Instead of the processing circuit 14, a resistance selecting operation and a detection level lowering operation can be realized. Thus, the configuration of the integrated circuit 14 can be simplified.

The processing circuit 14 sequentially selects the selection resistors R1, R2, R3, and R4 as the power supply voltage VDD decreases, thereby detecting the detection voltage VNET.
May be reduced, and a low-voltage notification operation according to each level may be performed. Alternatively, the selection signal may be set to 3 bits or more, and the selection resistors R1 to R4 may be selectively selected. Instead, a plurality of combinations may be used, and the detection voltage VNET may be set more finely.

Further, the level shift resistor R6 may be provided in parallel with the voltage dividing resistors R5 and R7, and the position where the divided voltage VNETB is taken out is determined by the level shifting resistor R6.
It goes without saying that the voltage may be between not only the voltage dividing resistor R7 on the low level side but also the voltage dividing resistor R5 on the high level side. When the level shift resistor R6 is provided between the level shift resistor R5 and the high-level voltage-dividing resistor R5, the inverter B11 is omitted, and when the control signal HIS is at the high level in a steady state, the transistor Tr1 is shut off and the level shift resistor R6 is turned off. Is inserted, and the level of the divided voltage value VNETB is raised. On the other hand, once the low voltage determination is performed, the transistor Tr1 becomes conductive with respect to the low-level control signal HIS, and the level shift is performed. The terminals of the resistor R6 are short-circuited, and the level of the divided voltage VNETB is reduced.

[0047]

As described above, the low voltage detecting circuit according to the first aspect of the present invention divides the detected voltage by the voltage dividing resistor and takes in the voltage, and compares the divided value with the predetermined reference value by the comparing means. A low-voltage detection circuit that performs low-voltage determination by comparing, a level-shift resistor interposed in series or in parallel with the voltage-dividing resistor, a first switching element for bypassing the level-shift resistor, And control means for switching the switching state of the first switching element when the low voltage determination is performed in
Initially, the divided voltage is input to the comparing means at a relatively high level, and once the low voltage determination is performed by the comparing means, the divided voltage is input to the comparing means at a relatively low level. The switching state of one switching element is switched.

Therefore, even when power supply noise is superimposed on the detected voltage, the noise does not change the determination result of the comparing means, and a stable determination operation can be performed.

Further, in the low voltage detection circuit according to the second aspect of the present invention, as described above, a plurality of selection resistors are provided in connection with the voltage dividing resistors, and the switching of the second switching element individually corresponding to the selection resistors. When the state is switched by the selection means, the resistance value is changed, and the divided value of the detected voltage is changed.

Therefore, even if a common reference value is used,
The judgment level of the low voltage judgment can be changed, and even if the low voltage detection circuit is integrated, the judgment level of the low voltage can be switched due to a short-circuit of an external terminal, etc. In contrast, the low voltage detection circuit can be shared, and various applications such as generation of a warning corresponding to a plurality of voltage levels can be realized.

Further, as described above, in the low voltage detection circuit according to the third aspect of the present invention, conduction is controlled by the control means at the time of voltage detection, in series with the voltage dividing resistor and the power supply line of the comparison means, respectively. Provide a power switch.

Therefore, the voltage to be detected is applied to the voltage dividing resistor only when the voltage is detected, and power is supplied to the comparing means, so that power consumption can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an electrical configuration of a low-voltage detection circuit according to an embodiment of the present invention.

FIG. 2 is a schematic diagram for explaining a voltage dividing resistance value of the low voltage detection circuit shown in FIG.

FIG. 3 is a waveform chart for explaining a low voltage detection operation of the low voltage detection circuit shown in FIG. 1;

FIG. 4 is a flowchart for explaining the operation of the low voltage detection circuit shown in FIGS. 1 to 3;

FIG. 5 is a block diagram showing an electrical configuration of a typical conventional low-voltage detection circuit.

6 is a waveform diagram for explaining a low voltage detection operation of the low voltage detection circuit shown in FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 11 Low voltage detection circuit 12 Comparator (comparison means) 13 Interrupt signal generation circuit 14 Processing circuit (control means, selection means) 15 Decode circuit 16 Resistance selection circuit 17 Power switch circuit 18 Level shift circuit 19 Power supply line A1-A4 NAND Gate B1, B2; B11 Inverter R1 to R4 Selection resistor R5, R7, R8, R9 Voltage dividing resistor R6 Level shift resistor Tr1 Transistor (first switching element) Tr2 to Tr4 Transistor (power switch) Tr11 to Tr14 Transistor (second Switching element)

Claims (3)

[Claims] 1. A voltage to be detected is divided by a voltage dividing resistor and taken in.
A low-voltage detection circuit that performs low-voltage determination by comparing the divided voltage value with a predetermined reference value by a comparing unit; a level shift resistor interposed in series or in parallel with the voltage divider resistor; A first switching element for bypass connected in parallel or series with the first switching element, and a control means for switching a switching state of the switching element when a low voltage is determined by the comparing means. Detection circuit. 2. A plurality of selection resistors provided in connection with the voltage dividing resistors and arranged in series or in parallel with each other, and respectively connected in parallel or in series respectively corresponding to each of the selection resistors. The low-voltage detection circuit according to claim 1, further comprising a second switching element, and a selection unit that controls a switching state of the second switching element. 3. The power supply according to claim 1, further comprising a power supply switch provided in series with the power supply line of the voltage dividing resistor and the comparing means, and controlled to be conductive by the control means when a voltage is detected. Voltage detection circuit.