JP2000022049A - Resin-sealed semiconductor device and epoxy resin composition for sealing the same - Google Patents

Resin-sealed semiconductor device and epoxy resin composition for sealing the same

Info

Publication number
JP2000022049A
JP2000022049A JP18091698A JP18091698A JP2000022049A JP 2000022049 A JP2000022049 A JP 2000022049A JP 18091698 A JP18091698 A JP 18091698A JP 18091698 A JP18091698 A JP 18091698A JP 2000022049 A JP2000022049 A JP 2000022049A
Authority
JP
Japan
Prior art keywords
epoxy resin
resin composition
semiconductor device
transition temperature
glass transition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18091698A
Other languages
Japanese (ja)
Inventor
Yasuaki Tsutsumi
康章 堤
Masayuki Tanaka
正幸 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toray Industries Inc
Original Assignee
Toray Industries Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toray Industries Inc filed Critical Toray Industries Inc
Priority to JP18091698A priority Critical patent/JP2000022049A/en
Publication of JP2000022049A publication Critical patent/JP2000022049A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Compositions Of Macromolecular Compounds (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide an epoxy resin composition which is excellent in adhesion and reliability, while enabling a resin-sealed semiconductor device to be lessened in size and improved in performance, and provide also a semiconductor device sealed up with the epoxy resin composition. SOLUTION: A semiconductor device is equipped with a semiconductor element 1, a board 2 mounted with the semiconductor element 1, and an epoxy resin composition 3 which seals up the semiconductor element 1, where the epoxy resin composition 3 is formed only on the one surface of the board 2 and contains epoxy resin, curing agent, and inorganic filler, and the physical properties of the cured epoxy resin composition are as follows; flexual modulus is 10-30 GPa at a temperature of 23 deg.C, linear expansion coefficient is 4 to 20×10-6/K in a temperature range of 23 deg.C to a glass transition temperature, the product of flexual modulus at 23 deg.C and linear expansion coefficient in a temperature range of 23 deg.C to glass transition temperature is below 3×10-4 GPa/K, and glass transition temperature is above 150 deg.C.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、樹脂封止型半導体
装置及び樹脂封止型半導体装置封止用エポキシ樹脂組成
物に関するものである。さらに詳細には、樹脂封止型半
導体装置、特に半導体装置の基板部分の片面のみに封止
樹脂が成形されている半導体装置、およびこの装置に用
いる封止用エポキシ樹脂に関するものである。
The present invention relates to a resin-sealed semiconductor device and an epoxy resin composition for sealing a resin-sealed semiconductor device. More specifically, the present invention relates to a resin-sealed semiconductor device, particularly to a semiconductor device in which a sealing resin is molded on only one surface of a substrate portion of a semiconductor device, and a sealing epoxy resin used for the device.

【0002】[0002]

【従来の技術】近年の電子機器のダウンサイジング化・
小型化に伴い、半導体装置は小型・薄型化、高性能化が
進んでいる。従来の半導体装置は、半導体素子とリード
フレームを用い、これらをプリント基板に実装するのに
必要な部位以外は、樹脂で覆うように両面から樹脂封止
されていた。よって、半導体装置小型化の開発は基板と
なるリードフレームと封止樹脂に関することが主であっ
た。さらに小型化した半導体装置を高密度にプリント基
板へ実装するために、表面実装技術が開発された。表面
実装技術に対応した代表的な半導体装置に、封止樹脂の
容積を小さく、薄肉化したTSOP(シン・スモール・
アウトライン・パッケージ)や、多ピン化に対応したQ
FP(クァッド・フラット・パッケージ)などが開発さ
れてきた。
2. Description of the Related Art Recent downsizing of electronic devices
Along with miniaturization, semiconductor devices are becoming smaller, thinner, and higher in performance. A conventional semiconductor device uses a semiconductor element and a lead frame, and is resin-sealed from both sides so as to cover with a resin except for a part necessary for mounting these elements on a printed circuit board. Therefore, development of miniaturization of a semiconductor device has mainly been concerned with a lead frame serving as a substrate and a sealing resin. Surface mounting technology has been developed to mount miniaturized semiconductor devices on printed circuit boards with high density. Typical semiconductor devices compatible with surface mounting technology include TSOP (Thin Small
Outline package) and Q compatible with multiple pins
FP (Quad Flat Package) and the like have been developed.

【0003】さらに、半導体装置が占める実装面積を小
さくし、高性能化を図るために、半導体装置の基板の背
面に半導体装置とマザーボードを接続する端子を配置し
た構造の半導体装置が開発されている。この構造の場
合、封止樹脂は基板の片面のみに成形されるため、従来
の両面成形物とは異なり、半導体装置の反りが発生しや
すい。半導体装置の反り量が大きいと、水平なマザーボ
ードに実装することが困難である。また、片面成形であ
るため、サーマルサイクル試験等、熱応力がかかった場
合、基材や半導体素子との接着界面に剥離が発生し故障
原因となる。
Further, in order to reduce the mounting area occupied by the semiconductor device and achieve higher performance, a semiconductor device having a structure in which terminals for connecting the semiconductor device and the motherboard are arranged on the back surface of the substrate of the semiconductor device has been developed. . In this structure, since the sealing resin is formed only on one side of the substrate, unlike a conventional double-sided molded product, the semiconductor device is likely to warp. If the amount of warpage of the semiconductor device is large, it is difficult to mount the semiconductor device on a horizontal motherboard. In addition, because of single-sided molding, when thermal stress is applied, such as in a thermal cycle test, peeling occurs at the bonding interface with the base material and the semiconductor element, which causes a failure.

【0004】[0004]

【発明が解決しようとする課題】したがって、これまで
とは異なる形態の半導体装置に対応した、反り量が低減
され、熱応力のかかりにくい、信頼性に優れた封止樹脂
を提供する必要がある。
Therefore, there is a need to provide a highly reliable sealing resin which is compatible with a semiconductor device having a different form from that of the prior art, has a reduced amount of warpage, is less likely to be subjected to thermal stress, and is highly reliable. .

【0005】すなわち、本発明の目的は、基板の片面の
みに封止樹脂が成形されている構造の半導体装置に対応
し、反り量の低減、サーマルサイクル性に優れるエポキ
シ樹脂組成物、および該エポキシ樹脂組成物によって封
止された半導体装置を提供することにある。
That is, an object of the present invention is to provide an epoxy resin composition which corresponds to a semiconductor device having a structure in which a sealing resin is molded only on one side of a substrate, reduces the amount of warpage, and has excellent thermal cycling properties. An object of the present invention is to provide a semiconductor device sealed with a resin composition.

【0006】[0006]

【課題を解決するための手段】上記課題を解決するため
本発明の樹脂封止型半導体装置は主として次の構成を有
する。すなわち、「半導体素子と、該半導体素子が搭載
される基板と、該半導体素子を封止するエポキシ樹脂組
成物の硬化物とを具備する半導体装置であって、該基板
に対して片面にのみ該エポキシ樹脂組成物が成形されて
おり、かつ該エポキシ樹脂組成物がエポキシ樹脂
(A)、硬化剤(B)、無機充填剤(C)を含有し、該
エポキシ樹脂組成物の硬化物の、23℃での曲げ弾性率
が、10GPaを超え、30GPa以下、23℃からガ
ラス転移温度までの線膨張係数が4×10-6〜20×1
-6/K、かつ23℃での曲げ弾性率と23℃からガラ
ス転移温度までの線膨張係数との積が3×10-4GPa
/K以下であって、さらに該エポキシ樹脂組成物の硬化
物のガラス転移温度が150℃以上であることを特徴と
する樹脂封止型半導体装置。」である。また、本発明の
樹脂封止型半導体装置は主として次の構成を有する。す
なわち、「半導体素子と、該半導体素子が搭載される基
板と、エポキシ樹脂組成物とを具備し、該基板に対して
片面にのみ該エポキシ樹脂組成物が成形される半導体装
置封止用エポキシ樹脂組成物であって、該エポキシ樹脂
組成物がエポキシ樹脂(A)、硬化剤(B)、無機充填
剤(C)を含有し、該エポキシ樹脂組成物の硬化物の、
23℃での曲げ弾性率が、10GPaを超え、30GP
a以下、23℃からガラス転移温度までの線膨張係数が
4×10-6〜20×10-6/K、かつ23℃での曲げ弾
性率と23℃からガラス転移温度までの線膨張係数との
積が3×10-4GPa/K以下であって、さらに該エポ
キシ樹脂組成物の硬化物のガラス転移温度が150℃以
上であることを特徴とする樹脂封止型半導体装置封止用
エポキシ樹脂組成物。」である。
In order to solve the above-mentioned problems, a resin-sealed semiconductor device of the present invention mainly has the following configuration. That is, "a semiconductor device comprising a semiconductor element, a substrate on which the semiconductor element is mounted, and a cured product of an epoxy resin composition for encapsulating the semiconductor element. An epoxy resin composition is formed, and the epoxy resin composition contains an epoxy resin (A), a curing agent (B), and an inorganic filler (C). Flexural modulus at 10 ° C. exceeds 10 GPa, 30 GPa or less, linear expansion coefficient from 23 ° C. to glass transition temperature is 4 × 10 −6 to 20 × 1.
0 −6 / K, and the product of the flexural modulus at 23 ° C. and the coefficient of linear expansion from 23 ° C. to the glass transition temperature is 3 × 10 −4 GPa.
/ K or less, and the glass transition temperature of the cured product of the epoxy resin composition is 150 ° C. or more. ". The resin-sealed semiconductor device of the present invention mainly has the following configuration. That is, an epoxy resin for semiconductor device encapsulation, comprising: a semiconductor element, a substrate on which the semiconductor element is mounted, and an epoxy resin composition, wherein the epoxy resin composition is molded on only one surface of the substrate. A composition, wherein the epoxy resin composition contains an epoxy resin (A), a curing agent (B), and an inorganic filler (C), and a cured product of the epoxy resin composition,
Flexural modulus at 23 ° C exceeds 10 GPa and 30 GPa
a, the coefficient of linear expansion from 23 ° C. to the glass transition temperature is 4 × 10 −6 to 20 × 10 −6 / K, the flexural modulus at 23 ° C. and the coefficient of linear expansion from 23 ° C. to the glass transition temperature Characterized in that the product of the epoxy resin composition is 3 × 10 −4 GPa / K or less, and the glass transition temperature of the cured product of the epoxy resin composition is 150 ° C. or more. Resin composition. ".

【0007】[0007]

【発明の実施の形態】以下、本発明について詳述する。BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail.

【0008】本発明における半導体装置は、図1または
図2に示すように、半導体素子1と、該半導体素子が搭
載される基板2と、該半導体素子を封止するエポキシ樹
脂組成物3とを具備し、該基板の半導体素子搭載面側で
ある片面にのみエポキシ樹脂組成物3が成形されてい
る。必要に応じて半導体素子1と基板2との間に接着層
4を持つことも可能である。また基板2は通常、基板基
材2a、パターン形成された金属配線2c(図1及び図
2ではパターンは図示していない)および外部との電気
的導通をとるために、基板基材2bに貫通して部分的に
通電部2bが設けられる。また半導体素子1と金属配線
2cをつなぐリード配線5を設けることもできる。
As shown in FIG. 1 or 2, a semiconductor device according to the present invention comprises a semiconductor element 1, a substrate 2 on which the semiconductor element is mounted, and an epoxy resin composition 3 for encapsulating the semiconductor element. The epoxy resin composition 3 is formed only on one side of the substrate on the side where the semiconductor element is mounted. If necessary, an adhesive layer 4 can be provided between the semiconductor element 1 and the substrate 2. In addition, the substrate 2 usually penetrates through the substrate 2a, the patterned metal wiring 2c (the pattern is not shown in FIGS. 1 and 2), and the substrate 2b in order to establish electrical conduction with the outside. Then, the current supply unit 2b is partially provided. Further, a lead wiring 5 connecting the semiconductor element 1 and the metal wiring 2c can be provided.

【0009】本発明の半導体装置は、基板2上に半導体
素子1が搭載された半導体装置予備装置を準備し、予備
装置を配置した金型内でエポキシ樹脂組成物を成形する
ことにより得られる。成形にあたってエポキシ樹脂組成
物は通常粉末、ペレット状またはタブレット状のものが
使用される。そして、該エポキシ樹脂組成物を、たとえ
ば120〜250℃、好ましくは150〜200℃の温
度で、トランスファ成形、インジェクション成形、注型
法など公知の方法で成形することによって製造される。
また必要に応じて、追加熱処理(たとえば、150〜1
80℃、2〜16時間)を行うこともできる。
The semiconductor device of the present invention is obtained by preparing a semiconductor device spare device having the semiconductor element 1 mounted on the substrate 2 and molding the epoxy resin composition in a mold in which the spare device is arranged. In molding, the epoxy resin composition is usually used in the form of powder, pellets or tablets. The epoxy resin composition is produced by molding the epoxy resin composition at a temperature of, for example, 120 to 250 ° C., preferably 150 to 200 ° C. by a known method such as transfer molding, injection molding, or casting.
If necessary, additional heat treatment (for example, 150 to 1
(80 ° C., 2 to 16 hours).

【0010】本発明において、基板基材2aに用いる材
料は特に限定されないが、半導体素子が駆動することに
よって発生する熱を逃がすことから、放熱特性の良好な
材料を用いなければならない。かつ増大する外部電極と
高速化する信号を取り出すため、狭ピッチの配線パター
ンを形成する必要がある。これに対応するためには低誘
電率の材料を用いる必要がある。このような材料として
は、セラミック、合成樹脂、さらにエポキシ、ビスマレ
イミドオリアジン、ポリイミドが好ましい。
In the present invention, the material used for the substrate 2a is not particularly limited. However, since heat generated by driving the semiconductor element is released, a material having good heat radiation characteristics must be used. In addition, in order to extract an increasing number of external electrodes and a signal for increasing the speed, it is necessary to form a wiring pattern having a narrow pitch. To cope with this, it is necessary to use a material having a low dielectric constant. As such a material, ceramic, synthetic resin, epoxy, bismaleimide olazine, and polyimide are preferable.

【0011】本発明におけるエポキシ樹脂組成物の硬化
物は、23℃での曲げ弾性率が10をGPa超え30G
Pa以下、23℃からガラス転移温度までの線膨張係数
が4×10-6〜20×10-6/Kであり、好ましくは4
×10-6〜16×10-6/K、特に好ましくは8×10
-6〜16×10-6/K、かつ、23℃での曲げ弾性率と
23℃からガラス転移温度までの線膨張係数との積が3
×10-4GPa/K以下、さらにガラス転移温度が15
0℃以上、好ましくは170℃以上である。
The cured product of the epoxy resin composition of the present invention has a flexural modulus at 23 ° C. of more than 10 GPa and 30 G
Pa or less, the coefficient of linear expansion from 23 ° C. to the glass transition temperature is 4 × 10 −6 to 20 × 10 −6 / K, preferably 4 × 10 −6 / K.
× 10 −6 to 16 × 10 −6 / K, particularly preferably 8 × 10
−6 to 16 × 10 −6 / K, and the product of the flexural modulus at 23 ° C. and the coefficient of linear expansion from 23 ° C. to the glass transition temperature is 3
× 10 -4 GPa / K or less, and a glass transition temperature of 15
The temperature is 0 ° C or higher, preferably 170 ° C or higher.

【0012】エポキシ樹脂組成物の硬化物がこの範囲の
物性を満たす場合のみ、半導体装置の内部応力が小さ
く、信頼性の高い半導体装置が得られる。ガラス状領域
での線膨張係数が20×10-6/Kより大きい場合は、
半導体装置の反り量が大きくプリント基板への実装が困
難となる。線膨張係数が4×10-6/Kより小さい場合
は、樹脂と基板の界面に剥離が発生しやすく、サーマル
サイクル性が劣る。
Only when the cured product of the epoxy resin composition satisfies the physical properties in this range, a semiconductor device having small internal stress and high reliability can be obtained. When the linear expansion coefficient in the glassy region is larger than 20 × 10 −6 / K,
The amount of warpage of the semiconductor device is large, and mounting on a printed circuit board becomes difficult. If the coefficient of linear expansion is smaller than 4 × 10 −6 / K, peeling is likely to occur at the interface between the resin and the substrate, resulting in poor thermal cycling.

【0013】曲げ弾性率が30GPaより大きい場合
は、封止樹脂と基板や半導体素子との密着性が低下す
る。その結果サーマルサイクル試験結果で不良となる。
曲げ弾性率が10GPa以下の場合は作業性が悪い。
If the flexural modulus is greater than 30 GPa, the adhesion between the sealing resin and the substrate or semiconductor element is reduced. As a result, the thermal cycle test results are defective.
When the flexural modulus is 10 GPa or less, workability is poor.

【0014】また、エポキシ樹脂組成物の硬化物の23
℃での曲げ弾性率が10をGPa超え30GPa以下、
23℃からガラス転移温度までの線膨張係数が4×10
-6〜20×10-6/Kであっても、23℃での曲げ弾性
率と23℃からガラス転移温度までの線膨張係数との積
が3×10-4GPa/Kを超える場合は、半導体装置の
反り量が大きい。
Further, the cured product of the epoxy resin composition has
Flexural modulus at ℃ exceeds 10 GPa and 30 GPa or less,
The coefficient of linear expansion from 23 ° C to the glass transition temperature is 4 × 10
-6 to 20 × 10 −6 / K, when the product of the flexural modulus at 23 ° C. and the linear expansion coefficient from 23 ° C. to the glass transition temperature exceeds 3 × 10 −4 GPa / K. The amount of warpage of the semiconductor device is large.

【0015】さらに、ガラス転移温度が150℃未満の
場合にも、半導体装置のそりが大きくなる。
Further, when the glass transition temperature is lower than 150 ° C., the warpage of the semiconductor device increases.

【0016】ここでいう硬化物とは、本発明のエポキシ
樹脂組成物を、たとえば120〜250℃、好ましくは
150〜200℃の温度で、トランスファ成形、インジ
ェクション成形、注型法など公知の方法で成型し、必要
に応じて、追加熱処理(たとえば、150〜180℃、
2〜16時間)を行って得られ、通常はエポキシ基の化
学反応がほぼ完結するか、またはエポキシ樹脂組成物の
物理的特性がほぼ飽和に達したものである。
The term "cured product" as used herein means the epoxy resin composition of the present invention at a temperature of, for example, 120 to 250 ° C., preferably 150 to 200 ° C., by a known method such as transfer molding, injection molding and casting. Molding and, if necessary, additional heat treatment (eg, 150-180 ° C.,
2 to 16 hours), and usually the chemical reaction of the epoxy group is almost completed, or the physical properties of the epoxy resin composition have almost reached saturation.

【0017】本発明におけるエポキシ樹脂組成物には、
エポキシ樹脂(A)が配合される。このようなものとし
ては、1分子中にエポキシ基を2個以上有するものであ
れば特に限定されない。
The epoxy resin composition of the present invention comprises:
Epoxy resin (A) is blended. Such a material is not particularly limited as long as it has two or more epoxy groups in one molecule.

【0018】たとえば、クレゾールノボラック型エポキ
シ樹脂、フェノールノボラック型エポキシ樹脂、ビフェ
ニル型エポキシ樹脂、ナフタレン型エポキシ樹脂、ビス
フェノールAやレゾルシンなどから合成される各種ノボ
ラック型エポキシ樹脂、線状脂肪族エポキシ樹脂、脂環
式エポキシ樹脂、複素環式エポキシ樹脂、ハロゲン化エ
ポキシ樹脂などがあげられる。また、2種以上のエポキ
シ樹脂を併用しても良い。
For example, cresol novolak type epoxy resin, phenol novolak type epoxy resin, biphenyl type epoxy resin, naphthalene type epoxy resin, various novolak type epoxy resins synthesized from bisphenol A or resorcin, linear aliphatic epoxy resin, fatty acid A cyclic epoxy resin, a heterocyclic epoxy resin, a halogenated epoxy resin and the like can be mentioned. Further, two or more epoxy resins may be used in combination.

【0019】本発明のエポキシ樹脂組成物には、硬化剤
(B)が配合される。このようなものとしては、エポキ
シ樹脂(A)と反応して硬化させるものであれば特に限
定されず、これらの具体例としては、たとえばフェノー
ルノボラック樹脂、クレゾールノボラック樹脂、フェノ
ールアラルキル樹脂、テルペン骨格含有フェノール樹
脂、トリスヒドロキシフェニルメタン、ナフトール誘導
体、ナフタレンジオール誘導体、ビスフェノールAやレ
ゾルシンから合成される各種ノボラック樹脂、レゾール
樹脂、ポリビニルフェノールなどの各種多価フェノール
化合物、無水マレイン酸、無水フタル酸、無水ピロメリ
ット酸などの酸無水物および有機酸、メタフェニレンジ
アミン、ジアミノジフェニルメタン、ジアミノジフェン
ルスルホンなどの芳香族アミンなどがあげられる。なか
でも、密着性の点から1分子中に水酸基を2個以上有す
るフェノール化合物が好ましく、なかでもフェノールノ
ボラック樹脂、トリスヒドロキシメタン、テルペン骨格
含有フェノールなどが好ましい。
The epoxy resin composition of the present invention contains a curing agent (B). Such a resin is not particularly limited as long as it reacts with the epoxy resin (A) to be cured, and specific examples thereof include, for example, a phenol novolak resin, a cresol novolak resin, a phenol aralkyl resin, and a terpene skeleton-containing Phenolic resins, trishydroxyphenylmethane, naphthol derivatives, naphthalene diol derivatives, various novolak resins synthesized from bisphenol A and resorcinol, resole resins, various polyhydric phenol compounds such as polyvinylphenol, maleic anhydride, phthalic anhydride, and pyroanhydride Examples thereof include acid anhydrides and organic acids such as melitic acid, and aromatic amines such as metaphenylenediamine, diaminodiphenylmethane, and diaminodiphenylsulfone. Among them, phenol compounds having two or more hydroxyl groups in one molecule are preferable from the viewpoint of adhesion, and phenol novolak resin, trishydroxymethane, phenol having a terpene skeleton, etc. are particularly preferable.

【0020】本発明において、エポキシ樹脂(A)と硬
化剤(B)の配合比に関しては特に制限はないが、得ら
れるエポキシ樹脂の硬化物および半導体装置の機械的性
質および密着性の点から、(A)に対する(B)の化学
当量比が0.5〜1.5、特に0.8〜1.2の範囲に
あることが好ましい。
In the present invention, the mixing ratio of the epoxy resin (A) and the curing agent (B) is not particularly limited, but from the viewpoint of the mechanical properties and adhesion of the cured product of the obtained epoxy resin and the semiconductor device. It is preferable that the chemical equivalent ratio of (B) to (A) is in the range of 0.5 to 1.5, particularly 0.8 to 1.2.

【0021】また、本発明においてエポキシ樹脂(A)
と硬化剤(B)の硬化反応を促進するための硬化触媒を
用いてもよい。硬化触媒は硬化反応を促進するものなら
ば特に限定されず、たとえば2−メチルイミダゾール、
2,4−ジメチルイミダゾール、2−メチル−4−メチ
ルイミダゾール、2−ヘプタデシルイミダゾールなどの
イミダゾール化合物、トリエチルアミン、ベンジルジメ
チルアミン、α−メチルベンジルジメチルアミン、2−
(ジメチルアミノメチル)フェノール、2,4,6−ト
リス(ジメチルアミノメチル)フェノール、1,8−ジ
アザビシクロ(5,4,0)ウンデセン−7、1,5−
ジアザビシクロ(4,3,0)ノネン−5などの3級ア
ミン化合物、ジルコニウムテトラメトキシド、ジルコニ
ウムテトラプロポキシド、テトラキス(アセチルアセト
ナト)ジルコニウム、トリ(アセチルアセトナト)アル
ミニウムなどの有機金属化合物およびトリフェニルホス
フィン、トリメチルホスフィン、トリエチルホスフィ
ン、トリブチルホスフィン、トリ(p−メチルフェニ
ル)ホスフィン、トリ(ノニルフェニル)ホスフィン、
トリフェニルホスフィン・トリフェニルボラン、テトラ
フェニルホスフォニウム・テトラフェニルボレートなど
の有機ホスフィン化合物があげられる。なかでも反応性
の点からトリフェニルホスフィンやテトラフェニルホス
フォニウム・テトラフェニルボレートや1,8−ジアザ
ビシクロ(5,4,0)ウンデセン−7が特に好ましく
用いられる。これらの硬化触媒は、用途によっては2種
以上を併用してもよく、その添加量はエポキシ樹脂
(A)100重量部に対して0.01〜10重量部の範
囲が好ましい。
In the present invention, the epoxy resin (A)
A curing catalyst for accelerating the curing reaction between the curing agent (B) and the curing agent (B) may be used. The curing catalyst is not particularly limited as long as it promotes the curing reaction. For example, 2-methylimidazole,
Imidazole compounds such as 2,4-dimethylimidazole, 2-methyl-4-methylimidazole, 2-heptadecylimidazole, triethylamine, benzyldimethylamine, α-methylbenzyldimethylamine,
(Dimethylaminomethyl) phenol, 2,4,6-tris (dimethylaminomethyl) phenol, 1,8-diazabicyclo (5,4,0) undecene-7,1,5-
Tertiary amine compounds such as diazabicyclo (4,3,0) nonene-5; organometallic compounds such as zirconium tetramethoxide, zirconium tetrapropoxide, tetrakis (acetylacetonato) zirconium, and tri (acetylacetonato) aluminum; Phenylphosphine, trimethylphosphine, triethylphosphine, tributylphosphine, tri (p-methylphenyl) phosphine, tri (nonylphenyl) phosphine,
Organic phosphine compounds such as triphenylphosphine / triphenylborane and tetraphenylphosphonium / tetraphenylborate are exemplified. Among them, triphenylphosphine, tetraphenylphosphonium tetraphenylborate and 1,8-diazabicyclo (5,4,0) undecene-7 are particularly preferably used from the viewpoint of reactivity. Two or more of these curing catalysts may be used in combination depending on the application, and the addition amount thereof is preferably in the range of 0.01 to 10 parts by weight based on 100 parts by weight of the epoxy resin (A).

【0022】本発明のエポキシ樹脂組成物においては充
填剤(C)が配合され、非晶性シリカ、結晶性シリカ、
炭酸カルシウム、炭酸マグネシウム、アルミナ、マグネ
シア、クレー、タルク、ケイ酸カルシウム、酸化チタ
ン、酸化アンチモン、アスベスト、ガラス繊維などが挙
げられるが、中でも非晶性シリカは線膨張係数を低下さ
せる効果が大きく、低応力化に有効なため好ましく用い
られる。非晶性シリカの例としては、石英を溶融して製
造した溶融シリカや、各種合成法で製造された合成シリ
カがあげられ、破砕状のものや球状のものが用いられ
る。
In the epoxy resin composition of the present invention, a filler (C) is blended, and amorphous silica, crystalline silica,
Calcium carbonate, magnesium carbonate, alumina, magnesia, clay, talc, calcium silicate, titanium oxide, antimony oxide, asbestos, glass fiber, etc., among which amorphous silica has a large effect of lowering the linear expansion coefficient, It is preferably used because it is effective for lowering the stress. Examples of the amorphous silica include fused silica produced by melting quartz and synthetic silica produced by various synthetic methods, and crushed or spherical ones are used.

【0023】本発明において、充填剤(C)の配合量
は、特に限定されないが、本発明におけるエポキシ樹脂
組成物の硬化物の23℃での曲げ弾性率が30GPa以
下、23℃からガラス転移温度までの線膨張係数が4×
10-6〜20×10-6/Kとなるために、通常エポキシ
樹脂組成物全体の75〜97重量%、さらに80〜95
重量%であることが好ましい。
In the present invention, the blending amount of the filler (C) is not particularly limited, but the flexural modulus at 23 ° C. of the cured product of the epoxy resin composition of the present invention is 30 GPa or less, and the glass transition temperature from 23 ° C. 4 × linear expansion coefficient
In order to be 10 -6 to 20 × 10 -6 / K, usually 75 to 97% by weight of the whole epoxy resin composition, and further 80 to 95%
% By weight.

【0024】本発明のエポキシ樹脂組成物においては、
シランカップリング剤、チタネートカップリング剤など
のカップリング剤を配合することができ、なかでも、こ
れらカップリング剤で前もって充填剤を表面処理してお
くことが信頼性の点で好ましい。シランカップリング剤
として、アルコキシ基およびエポキシ基、アミノ基、メ
ルカプト基などの官能基が結合した炭化水素基がケイ素
原子に結合したシランカップリング剤が好ましく用いら
れる。なかでも、流動性の点から、アミノ基を有するシ
ランカップリング剤を用いることが特に好ましい。
In the epoxy resin composition of the present invention,
Coupling agents such as a silane coupling agent and a titanate coupling agent can be blended. Among them, it is preferable from the standpoint of reliability that the filler be surface-treated with these coupling agents in advance. As the silane coupling agent, a silane coupling agent in which a hydrocarbon group having a functional group such as an alkoxy group, an epoxy group, an amino group, or a mercapto group bonded to a silicon atom is preferably used. Among them, it is particularly preferable to use a silane coupling agent having an amino group from the viewpoint of fluidity.

【0025】本発明のエポキシ樹脂組成物にはハロゲン
化エポキシ樹脂などのハロゲン化合物、リン化合物など
の難燃剤、三酸化アンチモンなどの難燃助剤、カーボン
ブラック、酸化鉄などの着色剤、長鎖脂肪酸、長鎖脂肪
酸の金属塩、長鎖脂肪酸のエステル、長鎖脂肪酸のアミ
ド、パラフィンワックスなどの離型剤およびエラストマ
ー、ゴム等の低応力化剤、有機過酸化物などの架橋剤を
任意に添加することができる。
The epoxy resin composition of the present invention contains a halogen compound such as a halogenated epoxy resin, a flame retardant such as a phosphorus compound, a flame retardant auxiliary such as antimony trioxide, a colorant such as carbon black and iron oxide, a long chain. Release agents such as fatty acids, metal salts of long-chain fatty acids, esters of long-chain fatty acids, amides of long-chain fatty acids, paraffin wax, and low-stressing agents such as elastomers and rubbers, and crosslinking agents such as organic peroxides. Can be added.

【0026】本発明のエポキシ樹脂組成物はこれら原料
を溶融混練して得ることが好ましく、たとえばバンバリ
ーミキサー、ニーダー、ロール、単軸もしくは二軸の押
し出し機およびコニーダーなどの公知の混練方法を用い
て溶融混練することにより、製造される。そしてペレッ
トやパウダー状のエポキシ樹脂を用いて、基板2上に半
導体素子1が搭載された半導体装置予備装置を配置した
金型内で成形することにより半導体装置が得られる。特
に本発明のエポキシ樹脂組成物は、エポキシ樹脂組成物
を実質的に囲む構造体を有さない半導体装置に有利であ
る。
The epoxy resin composition of the present invention is preferably obtained by melting and kneading these raw materials. For example, a known kneading method such as a Banbury mixer, a kneader, a roll, a single or twin screw extruder and a co-kneader may be used. It is manufactured by melt-kneading. Then, a semiconductor device is obtained by molding using a pellet or a powdery epoxy resin in a mold in which a semiconductor device spare device in which the semiconductor element 1 is mounted on the substrate 2 is arranged. In particular, the epoxy resin composition of the present invention is advantageous for a semiconductor device having no structure substantially surrounding the epoxy resin composition.

【0027】[0027]

【実施例】以下、実施例により本発明を具体的に説明す
る。
The present invention will be described below in detail with reference to examples.

【0028】実施例1〜5、比較例1〜5 表1に示した成分を、表2,3に示した組成比でミキサ
ーによりドライブレンドした。これを、ロール表面温度
90℃のミキシングロールを用いて5分間加熱混練後、
冷却粉砕してエポキシ樹脂組成物を製造した。
Examples 1 to 5 and Comparative Examples 1 to 5 The components shown in Table 1 were dry-blended by a mixer at the composition ratios shown in Tables 2 and 3. This was heated and kneaded for 5 minutes using a mixing roll having a roll surface temperature of 90 ° C.
The mixture was cooled and pulverized to produce an epoxy resin composition.

【0029】[0029]

【表1】 この組成物を用い、低圧トランスファー成形法により成
形温度175℃、成形時間2分、トランスファー圧力7
MPaの条件で成形し、180℃×5時間の条件でポス
トキュアして、各組成物の曲げ弾性率、線膨張係数を測
定した。
[Table 1] Using this composition, a low pressure transfer molding method was used, at a molding temperature of 175 ° C., a molding time of 2 minutes, and a transfer pressure of 7
The composition was molded under the conditions of MPa and post-cured under the conditions of 180 ° C. × 5 hours, and the flexural modulus and the coefficient of linear expansion of each composition were measured.

【0030】線膨張係数:TMAを用い、23℃とガラ
ス転移温度との間の熱膨張曲線から平均値を求めた。
Linear expansion coefficient: The average value was determined from the thermal expansion curve between 23 ° C. and the glass transition temperature using TMA.

【0031】ガラス転移温度はTMAを用いて熱膨張曲
線を描き、57℃と250℃における折線をひき、その
交点の温度とした。
As for the glass transition temperature, a thermal expansion curve was drawn using TMA, and a broken line at 57 ° C. and 250 ° C. was drawn, and the temperature at the intersection was defined.

【0032】曲げ弾性率:23℃でで3点曲げ試験を行
い、荷重−たわみ曲線から求めた。
Flexural modulus: A three-point bending test was performed at 23 ° C., and determined from a load-deflection curve.

【0033】また、この組成物を用い、図3に示す形状
の半導体装置予備装置を金型内に設けて、上述と同じ条
件でトランスファー成形およびポストキュアーし、図2
に示すような模擬半導体装置を組み立てた。次の物性測
定法により、各組成物、半導体装置の物性を測定した。
模擬半導体装置は図2において、半導体素子1と該半導
体素子が搭載される基板2とこの組成物を用いた半導体
素子を封止するエポキシ樹脂組成物3とを具備し、該基
板2はPIフィルムによって形成されている。
Using this composition, a semiconductor device spare device having the shape shown in FIG. 3 was provided in a mold, and subjected to transfer molding and post-cure under the same conditions as described above.
A simulated semiconductor device as shown in FIG. The physical properties of each composition and semiconductor device were measured by the following physical property measurement methods.
The simulated semiconductor device shown in FIG. 2 includes a semiconductor element 1, a substrate 2 on which the semiconductor element is mounted, and an epoxy resin composition 3 for encapsulating the semiconductor element using this composition. Is formed by

【0034】なお図2の半導体装置の各部分の寸法は以
下のとおりである。
The dimensions of each part of the semiconductor device shown in FIG. 2 are as follows.

【0035】 半導体素子1 :7×7×0.5mm 接着層4厚み :0.1mm エポキシ樹脂3:8×8×1.0 mm 基板基材厚み :0.1mm パッケージ反り量:模擬半導体装置平面部の対角線上を
表面あらさ計を用いて表面の凹凸を測定し、水平方向か
ら見た場合の最下点と最上点との間の距離を垂直方向で
測定した。そり量が100μm以上になるとプリント基
板実装性が悪化し、搭載不良率が悪化する。
Semiconductor element 1: 7 × 7 × 0.5 mm Adhesive layer 4 thickness: 0.1 mm Epoxy resin 3: 8 × 8 × 1.0 mm Substrate base material thickness: 0.1 mm Package warpage amount: Simulated semiconductor device flat surface The surface unevenness was measured on the diagonal line using a surface roughness meter, and the distance between the lowest point and the highest point when viewed from the horizontal direction was measured in the vertical direction. If the amount of warpage is 100 μm or more, the mountability of the printed circuit board deteriorates, and the defective mounting rate deteriorates.

【0036】サーマルサイクル性:模擬半導体装置を−
65℃×30min、常温×10min、150℃×3
0min、常温×10minを1サイクルとして、半導
体装置20個を用いて放置試験を行った。100サイク
ル経過後に、4ヶの半導体装置を分解して内部を目視で
観察し、樹脂部分のクラックの発生、半導体素子の割れ
を故障として判定し、不良率が50%を越えたときのサ
イクル数を観察した。
Thermal cyclability: Simulated semiconductor device
65 ° C × 30min, room temperature × 10min, 150 ° C × 3
A leaving test was performed using 20 semiconductor devices with 0 min, normal temperature × 10 min as one cycle. After 100 cycles have elapsed, the four semiconductor devices are disassembled and the inside is visually observed, cracks in the resin portion and cracks in the semiconductor element are determined as failures, and the number of cycles when the failure rate exceeds 50% Was observed.

【0037】また、以下の特性を評価した。The following characteristics were evaluated.

【0038】スパイラルフロー:上記成形条件において
成形速度25m/secで、EMMI型評価用金型を用
いて測定した。通常50cm以上なければ、成型物が未
充填となる。
Spiral flow: Measured under the above molding conditions at a molding speed of 25 m / sec using an EMMI mold evaluation mold. Usually, if it is not more than 50 cm, the molded product is not filled.

【0039】熱時硬度:上記成形条件において成形時間
180秒後の成形物の表面を、バーバーコールマン硬度
計を用いて測定した。熱時硬度は70以上なければ、金
型汚れなどが発生し、連続生産性に問題が生じる。
Thermal hardness: The surface of the molded product after a molding time of 180 seconds under the above molding conditions was measured using a Barber-Coleman hardness tester. If the hardness at the time of heating is not 70 or more, mold stains and the like occur, which causes a problem in continuous productivity.

【0040】この結果を表2および3に示す。The results are shown in Tables 2 and 3.

【0041】[0041]

【表2】 [Table 2]

【表3】 表2,3に見られるように、本発明のエポキシ樹脂組成
物、および樹脂封止型半導体装置は、パッケージ反り量
の低減、サーマルサイクル性、に優れている。
[Table 3] As seen from Tables 2 and 3, the epoxy resin composition and the resin-encapsulated semiconductor device of the present invention are excellent in reduction of package warpage and thermal cyclability.

【0042】線膨張係数が小さくそりは小さいが、弾性
率の大きな比較例1はサーマルサイクル性に劣る。ガラ
ス転移温度の低い比較例ではそりが悪化している。また
線膨張係数と弾性率の積が大きな比較例3もそりが悪化
している。弾性率を低く抑えた比較例4では熱時硬度が
不足し、連続生産性に問題がある。
Comparative Example 1 having a small coefficient of linear expansion and a small warpage but a large elastic modulus is inferior in thermal cycling. In the comparative example having a low glass transition temperature, the warpage is worse. Also, in Comparative Example 3 in which the product of the coefficient of linear expansion and the elastic modulus is large, the warpage is also deteriorated. In Comparative Example 4 in which the elastic modulus was kept low, the hardness at the time of heating was insufficient, and there was a problem in continuous productivity.

【0043】[0043]

【発明の効果】本発明の樹脂組成物及びそれが充填され
た半導体装置は反り量の低減に優れ、該樹脂組成物を用
いた該半導体装置はサーマルサイクル性に優れている。
The resin composition of the present invention and the semiconductor device filled with the resin composition are excellent in reducing the amount of warpage, and the semiconductor device using the resin composition is excellent in thermal cyclability.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の半導体装置の一態様を示す模式的断面
図。
FIG. 1 is a schematic cross-sectional view illustrating one embodiment of a semiconductor device of the present invention.

【図2】本発明の半導体装置の一態様を示す模式的断面
図。
FIG. 2 is a schematic cross-sectional view illustrating one embodiment of a semiconductor device of the present invention.

【図3】本発明の実施例に使用した半導体装置予備装置
の模式的断面図。
FIG. 3 is a schematic cross-sectional view of a semiconductor device spare device used in an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1:半導体素子 2:基板 2a:基板基材 2b:通電部 2c:金属配線 3:エポキシ樹脂組成物 4:接着層 5:リード線 6:半田ボール 1: Semiconductor element 2: Substrate 2a: Substrate base material 2b: Conductive part 2c: Metal wiring 3: Epoxy resin composition 4: Adhesive layer 5: Lead wire 6: Solder ball

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 4J002 BC12X CC04X CC05X CC06X CD01W CD02W CD04W CD05W CD06W CD12W CE00X DE077 DE097 DE137 DE147 DE237 DJ007 DJ017 DJ027 DJ047 DL007 EF006 EJ016 EJ046 EL136 EL146 EN036 EN076 EV216 FA047 FB097 FB167 FD017 FD090 FD130 FD14X FD140 FD146 FD160 GQ05 HA09 4M109 AA01 BA03 CA21 DA10 EA03 EB03 EB04 EB06 EB07 EB08 EB09 EB13 EB17 EB19 EC03 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4J002 BC12X CC04X CC05X CC06X CD01W CD02W CD04W CD05W CD06W CD12W CE00X DE077 DE097 DE137 DE147 DE237 DJ007 DJ017 DJ027 DJ047 DL007 EF006 EJ016 EJ046 EL136 EL146 EN036 EN076 EV216 FA047 FB006 FD146 FD160 GQ05 HA09 4M109 AA01 BA03 CA21 DA10 EA03 EB03 EB04 EB06 EB07 EB08 EB09 EB13 EB17 EB19 EC03

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 半導体素子と、該半導体素子が搭載され
る基板と、該半導体素子を封止するエポキシ樹脂組成物
の硬化物とを具備する半導体装置であって、該基板に対
して片面にのみ該エポキシ樹脂組成物が成形されてお
り、かつ該エポキシ樹脂組成物がエポキシ樹脂(A)、
硬化剤(B)、無機充填剤(C)を含有し、該エポキシ
樹脂組成物の硬化物の、23℃での曲げ弾性率が、10
GPaを超え、30GPa以下、23℃からガラス転移
温度までの線膨張係数が4×10-6〜20×10-6
K、かつ23℃での曲げ弾性率と23℃からガラス転移
温度までの線膨張係数との積が3×10-4GPa/K以
下であって、さらに該エポキシ樹脂組成物の硬化物のガ
ラス転移温度が150℃以上であることを特徴とする樹
脂封止型半導体装置。
1. A semiconductor device comprising a semiconductor element, a substrate on which the semiconductor element is mounted, and a cured product of an epoxy resin composition for encapsulating the semiconductor element, wherein the semiconductor device is provided on one surface with respect to the substrate. Only the epoxy resin composition is molded, and the epoxy resin composition is an epoxy resin (A),
The epoxy resin composition contains a curing agent (B) and an inorganic filler (C), and the cured product of the epoxy resin composition has a flexural modulus at 23 ° C. of 10
GPa, 30 GPa or less, and a coefficient of linear expansion from 23 ° C. to a glass transition temperature of 4 × 10 −6 to 20 × 10 −6 /
K, the product of the flexural modulus at 23 ° C. and the coefficient of linear expansion from 23 ° C. to the glass transition temperature is 3 × 10 −4 GPa / K or less, and the glass of the cured product of the epoxy resin composition A resin-sealed semiconductor device having a transition temperature of 150 ° C. or higher.
【請求項2】 エポキシ樹脂組成物の硬化物の23℃か
らガラス転移温度までの線膨張係数が4×10-6〜16
×10-6/Kであることを特徴とする請求項1記載の樹
脂封止型半導体装置。
2. The cured product of the epoxy resin composition has a coefficient of linear expansion from 23 ° C. to a glass transition temperature of 4 × 10 -6 to 16
2. The resin-encapsulated semiconductor device according to claim 1, wherein the value is × 10 −6 / K.
【請求項3】 エポキシ樹脂組成物の硬化物の23℃か
らガラス転移温度までの線膨張係数が8×10-6〜16
×10-6/K、ガラス転移温度が170℃以上であるこ
とを特徴とする請求項1記載の樹脂封止型半導体装置。
3. The cured product of the epoxy resin composition has a coefficient of linear expansion from 23 ° C. to a glass transition temperature of 8 × 10 -6 to 16
× 10 -6 / K, a resin-sealed semiconductor device according to claim 1, wherein the glass transition temperature, characterized in that at 170 ° C. or higher.
【請求項4】 半導体素子と、該半導体素子が搭載され
る基板と、エポキシ樹脂組成物とを具備し、該基板に対
して片面にのみ該エポキシ樹脂組成物が成形される半導
体装置封止用エポキシ樹脂組成物であって、該エポキシ
樹脂組成物がエポキシ樹脂(A)、硬化剤(B)、無機
充填剤(C)を含有し、該エポキシ樹脂組成物の硬化物
の、23℃での曲げ弾性率が、10GPaを超え、30
GPa以下、23℃からガラス転移温度までの線膨張係
数が4×10-6〜20×10-6/K、かつ23℃での曲
げ弾性率と23℃からガラス転移温度までの線膨張係数
との積が3×10-4GPa/K以下であって、さらに該
エポキシ樹脂組成物の硬化物のガラス転移温度が150
℃以上であることを特徴とする樹脂封止型半導体装置封
止用エポキシ樹脂組成物。
4. A semiconductor device sealing device comprising: a semiconductor element, a substrate on which the semiconductor element is mounted, and an epoxy resin composition, wherein the epoxy resin composition is molded on only one surface of the substrate. An epoxy resin composition, wherein the epoxy resin composition contains an epoxy resin (A), a curing agent (B), and an inorganic filler (C), and a cured product of the epoxy resin composition at 23 ° C. Flexural modulus exceeding 10 GPa, 30
GPa or less, the coefficient of linear expansion from 23 ° C. to the glass transition temperature is 4 × 10 −6 to 20 × 10 −6 / K, the flexural modulus at 23 ° C., and the coefficient of linear expansion from 23 ° C. to the glass transition temperature. Is 3 × 10 −4 GPa / K or less, and the glass transition temperature of the cured product of the epoxy resin composition is 150
An epoxy resin composition for encapsulating a resin-encapsulated semiconductor device, wherein the temperature is not less than ° C.
【請求項5】エポキシ樹脂組成物の硬化物の23℃から
ガラス転移温度までの線膨張係数が4×10-6〜16×
10-6/Kであることを特徴とする請求項4記載の樹脂
封止型半導体装置封止用エポキシ樹脂組成物。
5. The cured product of the epoxy resin composition has a coefficient of linear expansion from 23 ° C. to a glass transition temperature of 4 × 10 −6 to 16 ×.
The epoxy resin composition according to claim 4, wherein the epoxy resin composition is 10 -6 / K.
【請求項6】エポキシ樹脂組成物の硬化物の23℃から
ガラス転移温度までの線膨張係数が8×10-6〜16×
10-6/K、ガラス転移温度が170℃以上であること
を特徴とする請求項4記載の樹脂封止型半導体装置封止
用エポキシ樹脂組成物。
6. The cured product of the epoxy resin composition has a coefficient of linear expansion from 23 ° C. to a glass transition temperature of 8 × 10 −6 to 16 ×.
The epoxy resin composition for sealing a resin-sealed semiconductor device according to claim 4, wherein the epoxy resin composition has a glass transition temperature of 10-6 / K or more.
JP18091698A 1998-06-26 1998-06-26 Resin-sealed semiconductor device and epoxy resin composition for sealing the same Pending JP2000022049A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18091698A JP2000022049A (en) 1998-06-26 1998-06-26 Resin-sealed semiconductor device and epoxy resin composition for sealing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18091698A JP2000022049A (en) 1998-06-26 1998-06-26 Resin-sealed semiconductor device and epoxy resin composition for sealing the same

Publications (1)

Publication Number Publication Date
JP2000022049A true JP2000022049A (en) 2000-01-21

Family

ID=16091531

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18091698A Pending JP2000022049A (en) 1998-06-26 1998-06-26 Resin-sealed semiconductor device and epoxy resin composition for sealing the same

Country Status (1)

Country Link
JP (1) JP2000022049A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100481347B1 (en) * 2001-08-06 2005-04-08 히다치 가세고교 가부시끼가이샤 Adhesive Film for Semiconductor, Lead Frame and Semiconductor Device Using the Same
JP2015039027A (en) * 2008-10-10 2015-02-26 住友ベークライト株式会社 Semiconductor device
WO2015183803A1 (en) * 2014-05-28 2015-12-03 Cree, Inc. Over-mold packaging for wide band-gap semiconductor devices
US9515011B2 (en) 2014-05-28 2016-12-06 Cree, Inc. Over-mold plastic packaged wide band-gap power transistors and MMICS
US9641163B2 (en) 2014-05-28 2017-05-02 Cree, Inc. Bandwidth limiting methods for GaN power transistors

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100481347B1 (en) * 2001-08-06 2005-04-08 히다치 가세고교 가부시끼가이샤 Adhesive Film for Semiconductor, Lead Frame and Semiconductor Device Using the Same
JP2015039027A (en) * 2008-10-10 2015-02-26 住友ベークライト株式会社 Semiconductor device
WO2015183803A1 (en) * 2014-05-28 2015-12-03 Cree, Inc. Over-mold packaging for wide band-gap semiconductor devices
US9472480B2 (en) 2014-05-28 2016-10-18 Cree, Inc. Over-mold packaging for wide band-gap semiconductor devices
US9515011B2 (en) 2014-05-28 2016-12-06 Cree, Inc. Over-mold plastic packaged wide band-gap power transistors and MMICS
US9641163B2 (en) 2014-05-28 2017-05-02 Cree, Inc. Bandwidth limiting methods for GaN power transistors
EP3855485A1 (en) * 2014-05-28 2021-07-28 Cree, Inc. Over-mold packaging for wide band-gap semiconductor devices

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