JP2000021611A - Current protecting chip element and its manufacture - Google Patents

Current protecting chip element and its manufacture

Info

Publication number
JP2000021611A
JP2000021611A JP18954698A JP18954698A JP2000021611A JP 2000021611 A JP2000021611 A JP 2000021611A JP 18954698 A JP18954698 A JP 18954698A JP 18954698 A JP18954698 A JP 18954698A JP 2000021611 A JP2000021611 A JP 2000021611A
Authority
JP
Japan
Prior art keywords
current protection
thickness
insulating layer
protection element
carrier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18954698A
Other languages
Japanese (ja)
Inventor
Masashi Isono
雅司 磯野
Fumio Suzuki
文夫 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP18954698A priority Critical patent/JP2000021611A/en
Publication of JP2000021611A publication Critical patent/JP2000021611A/en
Pending legal-status Critical Current

Links

Landscapes

  • Thermistors And Varistors (AREA)
  • Fuses (AREA)

Abstract

PROBLEM TO BE SOLVED: To increase forming precision and restrain heat dissipation, smoking and firing, by defining the thickness of current protecting chip elements and arranging gaps on both surfaces in the vicinity of a part to be fused. SOLUTION: A metal foil with a carrier which is constituted of a carrier and a metal foil of 3-9 μm in thickness, and an insulating plate 101 with a resin film are so overlapped that a very thin copper 61 is in contact with a resin film 3. Hole filling resin 42 is buried in holes 4 for gap formation of a laminated board, and a protective film 41 having chemical resistance is stuck. A board on which current protecting elements 8 and connection wirings 71 are formed, an insulating plate 102 with a resin film, a resin film 3 where holes are bored in the parts of the holes 4 for gap formation, and a copper foil 72 of 18 μm in thickness are stuck on a single surface. Holes 801 are made in the parts of the connection wirings 71 between the current protecting elements 8. The holes 801 are cut to be divided. In the direction perpendicular to the division, parts between adjacent current protecting elements 8 are cut, and the laminated board is divided into the respective current protecting chip elements in which electrode are formed on both ends.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、チップ型電流保護
素子及びその製造法に関する。
The present invention relates to a chip-type current protection device and a method for manufacturing the same.

【0002】[0002]

【従来の技術】電流保護素子は、電子機器の過電流保護
に使用されるものである。本発明でいう電流保護素子
は、電気回路と直列につなぎ、過電流が流れた時に、保
護素子内の配線が切断され、それ以降の電流を遮断する
ことによって、機器の保護を行うものである。
2. Description of the Related Art A current protection element is used for overcurrent protection of electronic equipment. The current protection element according to the present invention is connected to an electric circuit in series, and when an overcurrent flows, the wiring in the protection element is cut, and the current after that is cut off, thereby protecting the device. .

【0003】このような素子は、一般的な名称として、
ヒューズと言われているが、ヒューズと言うためには、
各種規格に定められた特性を満たす必要がある。しか
し、電子機器の多様化に伴い、従来のヒューズ規格と異
なる特性の電流保護素子も現れてきている。本発明は、
ヒューズを含め、上に述べたような動作機構を行う電流
保護素子(英名:カレントプロテクタ)に関するもので
ある。
[0003] Such elements are commonly referred to as:
It is called a fuse, but to say a fuse,
It is necessary to satisfy the characteristics specified in various standards. However, with the diversification of electronic devices, current protection elements having characteristics different from those of conventional fuse standards have appeared. The present invention
The present invention relates to a current protection element (current protector) performing the above-described operation mechanism including a fuse.

【0004】過電流保護装置には、上記のような電流保
護素子の他、サイリスタやトランジスタを用いた電子ス
イッチを使用することもできる。しかし、そのような場
合、回路部品が増加すること、また、その保護回路によ
って消費される電力も増加することから、電池動作の携
帯型機器等のように、小型化、低消費電力を要求される
用途には、必ずしも適していなかった。
In the overcurrent protection device, an electronic switch using a thyristor or a transistor can be used in addition to the above current protection element. However, in such a case, since the number of circuit components increases and the power consumed by the protection circuit also increases, miniaturization and low power consumption are required as in a portable device operated by a battery. It was not necessarily suitable for certain applications.

【0005】そこで、特開昭60−143544号公報
に開示されているように、セラミック基体に、第1層に
銀または銀−パラジウム、第2層にニッケル層、第3層
にはんだまたは錫の3層の導電層を形成し、はんだ付け
時の溶断特性を向上したものが知られ、また、導電層表
面をシリコーン樹脂等の不燃(難燃)性樹脂で被覆する
ことも開示されている。
Therefore, as disclosed in Japanese Patent Application Laid-Open No. 60-143544, silver or silver-palladium is formed on a ceramic substrate as a first layer, a nickel layer is formed on a second layer, and solder or tin is formed on a third layer. It is known that three conductive layers are formed to improve the fusing characteristics at the time of soldering, and that the surface of the conductive layer is coated with a nonflammable (flame retardant) resin such as a silicone resin is also disclosed.

【0006】また、実公昭55−2565号公報には、
セラミック基体上にヒューズ素子を設け、その上部に凹
部を設けるという、チップ型抵抗素子の電極を構成する
方法が開示されている。
In Japanese Utility Model Publication No. 55-2565,
There is disclosed a method of forming an electrode of a chip-type resistance element, in which a fuse element is provided on a ceramic base and a recess is provided on the fuse element.

【0007】特開平8−96694号公報には、金属細
線からなるヒューズ素子の上下に凹部を有するアルミナ
等のセラミック基体を配置する例が開示されている。
Japanese Patent Application Laid-Open No. Hei 8-96694 discloses an example in which a ceramic base such as alumina having concave portions above and below a fuse element made of a thin metal wire is arranged.

【0008】[0008]

【発明が解決しようとする課題】しかし、セラミック基
体に、電流保護素子(ヒューズ)を設けたものは、セラ
ミック基体の熱抵抗が小さく、たとえ、前記特開昭60
−143544号公報に開示されているように、不燃
(難燃)性の樹脂で、電流保護素子を覆ったとしても、
放熱性が高く、周囲の温度によって、溶断する電流値が
ばらつくことが多いという課題があった。
However, when a ceramic substrate is provided with a current protection element (fuse), the thermal resistance of the ceramic substrate is small.
As disclosed in JP-A-143544, even if the current protection element is covered with a nonflammable (flame retardant) resin,
There is a problem that the heat dissipation is high and the current value to be melted varies depending on the ambient temperature.

【0009】実公昭55−2565号公報に開示され
た、チップ型抵抗素子の電極を構成する方法では、セラ
ミック基体上にヒューズ素子を設け、その上部に凹部を
設けるが、ヒューズ素子底面部に位置したセラミック基
体の熱抵抗が低く、溶断時の発熱によりヒューズ素子外
表面の温度が過剰に上昇すること、溶断時に溶断残査が
セラミック基体上に残り、絶縁劣化を起こす等の課題が
ある。また、抵抗値が一定なら溶断する電流値が高くな
り、溶断電流が一定ならヒューズ抵抗が高くなるという
課題がある。
In the method of forming electrodes of a chip-type resistor element disclosed in Japanese Utility Model Publication No. 55-2565, a fuse element is provided on a ceramic base and a concave portion is provided on the fuse element. The thermal resistance of the ceramic substrate thus formed is low, and the temperature of the outer surface of the fuse element excessively rises due to the heat generated at the time of fusing, and the fusing residue remains on the ceramic substrate at the time of fusing. Further, there is a problem that the current value to be blown increases when the resistance value is constant, and the fuse resistance increases when the fusing current is constant.

【0010】特開平8−96694号公報に開示され
た、金属細線からなるヒューズ素子の上下に凹部を有す
るアルミナ等のセラミック基体を配置する場合でも、同
様に溶断時の発熱によりヒューズ素子外表面の温度が過
剰に上昇する、あるいは抵抗値が一定なら溶断する電流
値が高くなり、溶断電流が一定ならヒューズ抵抗が高く
なるという課題がある。
[0010] Even when a ceramic base made of alumina or the like having concave portions above and below a fuse element made of a thin metal wire, which is disclosed in Japanese Patent Application Laid-Open No. 8-96694, heat generated during fusing similarly causes the outer surface of the fuse element to be heated. There is a problem that if the temperature rises excessively or the resistance value is constant, the current value for fusing increases, and if the fusing current is constant, the fuse resistance increases.

【0011】このセラミック基体のチップヒューズの課
題を解決するために、有機樹脂製絶縁基板を用いること
が考えられるが、基板の樹脂が、エポキシ樹脂、フェノ
ール樹脂、ポリイミド樹脂等の場合、発煙や燃焼の問題
があった。
In order to solve the problem of the chip fuse of the ceramic base, it is conceivable to use an insulating substrate made of an organic resin. However, when the resin of the substrate is an epoxy resin, a phenol resin, a polyimide resin, or the like, smoke or combustion occurs. There was a problem.

【0012】本発明は、電流保護素子の形成精度(配線
の厚さ、幅)に優れ、放熱の抑制、および発煙、発火の
抑制に優れ、さらに、溶断後の絶縁抵抗が高く信頼性の
高いチップ型電流保護素子とその製造法を提供すること
を目的とするものである。
The present invention is excellent in forming accuracy (thickness and width of wiring) of a current protection element, is excellent in suppressing heat radiation, suppressing smoke and ignition, and has high insulation resistance after fusing and high reliability. It is an object of the present invention to provide a chip-type current protection element and a method of manufacturing the same.

【0013】[0013]

【課題を解決するための手段】本発明のチップ型電流保
護素子は、電流保護素子と、その両面に設けられた絶縁
層と、電流保護素子に接続された一対の電極と、からな
るチップ型電流保護素子において、電流保護素子の厚さ
が3〜9μmであり、かつ、電流保護素子の少なくとも
溶断予定部の近傍の両面に空隙が設けられていることを
特徴とする。
According to the present invention, there is provided a chip-type current protection element comprising: a current protection element; insulating layers provided on both sides of the current protection element; and a pair of electrodes connected to the current protection element. The current protection element is characterized in that the thickness of the current protection element is 3 to 9 μm, and that a gap is provided on at least both surfaces of the current protection element near a portion to be blown.

【0014】電流保護素子と電極との接続部の厚さを、
10〜50μmとすることができる。
The thickness of the connection between the current protection element and the electrode is
It can be 10 to 50 μm.

【0015】このようなチップ型電流保護素子は、 a.2枚の空隙形成用の穴の開いた第1の絶縁層と第2
の絶縁層を製作する工程、 b.キャリアと厚さ3〜9μmの金属箔とからなるキャ
リア付き金属箔を、第1の絶縁層と積層接着する工程、 c.積層接着した第1の絶縁層からキャリアを除去する
工程、 d.金属箔の不要な箇所をエッチング除去することによ
って、空隙形成用の穴の箇所に電流保護素子が位置する
ように、複数の電流保護素子と電極と電流保護素子の接
続配線を形成する工程、 e.電流保護素子の位置に空隙形成要の穴を合わせた第
2の絶縁層と、第1の絶縁層と第2の絶縁層の外側に、
2枚の片面にのみ金属箔を貼り合わせた第3の絶縁層
を、接着層を介して、金属層が外側となるように重ね
て、積層接着する工程、 f.積層接着した物の接続配線の箇所に電極用の穴をあ
ける工程、 g.めっきを行い、接続配線と金属箔とを電気的に接続
する工程、 h.電極以外の箇所をエッチング除去して電極を形成す
る工程、 i.隣接する電流保護素子との間、および穴の箇所で切
断することによって、両端の電極を形成した個々のチッ
プ型電流保護素子に切り分ける工程、からなる製造法に
よって製造することができる。
Such a chip-type current protection element includes: a. A first insulating layer having two holes for forming voids and a second insulating layer;
Fabricating the insulating layer of b., B. Laminating and attaching a metal foil with a carrier comprising a carrier and a metal foil having a thickness of 3 to 9 μm to a first insulating layer; c. Removing the carrier from the laminated first insulating layer; d. Forming a plurality of current protection elements, electrodes, and connection wiring between the electrodes and the current protection element such that the unnecessary parts of the metal foil are removed by etching so that the current protection elements are located at the positions of the holes for forming voids; e. . A second insulating layer in which a hole for forming a gap is aligned with the position of the current protection element, and a first insulating layer and an outer side of the second insulating layer,
A step of stacking and laminating a third insulating layer in which a metal foil is stuck on only one side of the two sheets via an adhesive layer such that the metal layer is on the outside, f. Making a hole for an electrode at a location of the connection wiring of the laminated and bonded object; g. Plating and electrically connecting the connection wiring and the metal foil; h. Forming an electrode by etching away portions other than the electrode, i. It can be manufactured by a manufacturing method including a step of cutting into individual chip-type current protection elements formed with electrodes at both ends by cutting between adjacent current protection elements and at holes.

【0016】キャリア付き金属箔に、10〜50μmの
範囲の厚さの第1の銅層と、3〜9μmの範囲の厚さの
第2の銅層と、その2つの銅層の中間層として厚さが1
μm以下のニッケルあるいはその合金層を有する複合金
属箔を用いることができる。
The metal foil with a carrier has a first copper layer having a thickness in the range of 10 to 50 μm, a second copper layer having a thickness in the range of 3 to 9 μm, and an intermediate layer between the two copper layers. Thickness 1
A composite metal foil having a nickel or alloy layer of μm or less can be used.

【0017】キャリアを除去した後、厚さ3〜9μmの
金属箔に、接続配線の厚さが、10〜50μmの厚さと
なるように、予めめっきを行う工程を有することもでき
る。
After the carrier is removed, a step of pre-plating the metal foil having a thickness of 3 to 9 μm so that the thickness of the connection wiring is 10 to 50 μm may be provided.

【0018】キャリアを除去した後に、電流保護素子と
なる箇所のみの、第1の銅層とニッケルあるいはその合
金層の除去を行うこともできる。
After the carrier has been removed, the first copper layer and the nickel or alloy layer thereof may be removed only at the portion to be the current protection element.

【0019】第1の絶縁層と第2の絶縁層に第3の絶縁
層を接着する接着層に、樹脂フローが200μm以下で
ある樹脂を用いることができる。
A resin having a resin flow of 200 μm or less can be used for the adhesive layer for bonding the third insulating layer to the first insulating layer and the second insulating layer.

【0020】[0020]

【発明の実施の形態】本発明において、電流保護素子の
厚さを3〜9μmとするのは、3μm未満では、厚さ精
度の管理が難しく、また、ピンホールの発生も避けがた
く、9μmを超えると、過電流通電時の溶断を精度よく
行うための電流保護素子配線の形成が困難になるからで
ある。
DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, the thickness of the current protection element is set to 3 to 9 .mu.m if it is less than 3 .mu.m, it is difficult to control the thickness accuracy, and it is difficult to avoid pinholes. This is because, if it exceeds, it becomes difficult to form a current protection element wiring for accurately performing fusing when overcurrent is applied.

【0021】また、電流保護素子と電極との接続部の厚
さが、10〜50μmの範囲が好ましいのは、電流保護
素子の設置される場所の環境温度変化や、素子自身を流
れる電流のオン、オフによる温度変化に伴う熱ストレス
が、電流保護素子と電極を接続する箇所に集中し易いの
で、その厚さは、厚いほど効果があるが、あまり厚いと
製造上の負担(作業時間の増加、材料の増加、樹脂材料
による埋め込み性低下に伴う積層接着条件の変更等)が
増加するとともに、ある程度以上の厚さになると、それ
以上厚くしても、その効果の改善の程度が小さくなるか
らである。
The thickness of the connection portion between the current protection element and the electrode is preferably in the range of 10 to 50 μm because of a change in the environmental temperature at a place where the current protection element is installed, and a change in the current flowing through the element itself. Since the thermal stress caused by the temperature change due to the off state tends to concentrate on the point where the current protection element and the electrode are connected, the thickness is more effective as the thickness is increased. , Increase in materials, changes in lamination bonding conditions due to a decrease in embedding properties due to the resin material, etc.), and when the thickness exceeds a certain level, the degree of improvement in the effect is reduced even if the thickness is further increased. It is.

【0022】(工程a)本発明の第1の絶縁層と第2の
絶縁層には、樹脂と強化材とからなる基材を用いること
が望ましく、樹脂には、エポキシ樹脂、フェノール樹
脂、ポリイミド樹脂等を用いることができ、強化材に
は、ガラス布、ガラス紙から選択されたものを用いるこ
とができる。
(Step a) It is desirable to use a base material composed of a resin and a reinforcing material for the first insulating layer and the second insulating layer of the present invention. A resin or the like can be used, and a reinforcing material selected from glass cloth and glass paper can be used.

【0023】この第1の絶縁層と第2の絶縁層に空隙形
成用の穴を開けるには、一般的に配線板のスルーホール
などの穴あけに使用されているドリルマシンを用いるこ
とができる。
In order to form holes for forming voids in the first insulating layer and the second insulating layer, a drill machine generally used for drilling through holes or the like in a wiring board can be used.

【0024】(工程b)キャリアには、Cu、Al等の
汎用的で剥離可能な金属箔や弗素系の剥離しやすいフィ
ルム材料やガラス板、鏡面仕上げされたステンレス等の
金属板を用いることができるが、金属箔であることが好
ましく、キャリアが剥離可能な金属箔の例としては、ピ
ーラブル銅箔とよばれるキャリア銅70μm/極薄銅9
μmのDOUBLETHIN9/70(古河サーキット
フォイル株式会社製、商品名)等があり、また、アルミ
ニウムキャリア付の極薄銅箔(ピーラブル銅箔)も使用
でき、あるいは、またエッチング等で除去可能な2種類
以上の金属層からなる複合箔も使用することができ、キ
ャリア銅/ニッケル層/極薄銅5μmからなるCCT−
FOIL(日本電解株式会社製、商品名)等がある。
(Step b) As the carrier, a general-purpose peelable metal foil such as Cu or Al, a fluorine-based easily peelable film material, a glass plate, or a metal plate such as a mirror-finished stainless steel is used. Metal foil is preferable, but examples of the metal foil from which the carrier can be peeled include carrier copper 70 μm / ultra-thin copper 9 called peelable copper foil.
DUBBLETHIN 9/70 (Furukawa Circuit Foil Co., Ltd., trade name), etc., and ultra-thin copper foil (peelable copper foil) with an aluminum carrier can be used, or two types that can be removed by etching or the like A composite foil composed of the above metal layers can also be used, and a CCT-layer composed of carrier copper / nickel layer / ultra-thin copper 5 μm.
FOIL (manufactured by Nihon Denki Co., Ltd., trade name) and the like.

【0025】厚さ3〜9μmの金属箔には、市販のもの
では、極薄銅箔やアルミニウムキャリア付きの極薄銅
箔、あるいはピーラブル銅箔とよばれるキャリア銅70
μm/極薄銅9μmのDOUBLETHIN9/70
(古河サーキットフォイル株式会社製、商品名)等があ
り、また、銅(キャリア)/ニッケル合金(ストッパ)
/銅(極薄銅)の複合箔を用いる方法等があり、市販品
の複合箔としては、CCT−FOIL(日本電解株式会
社製、商品名)が使用できる。
In the case of a metal foil having a thickness of 3 to 9 μm, commercially available ultra-thin copper foil, ultra-thin copper foil with an aluminum carrier, or carrier copper 70
DOUBLETHIN 9/70 of μm / ultra-thin copper 9 μm
(Made by Furukawa Circuit Foil Co., Ltd.) and copper (carrier) / nickel alloy (stopper)
/ Copper (ultra-thin copper) composite foil, and CCT-FOIL (trade name, manufactured by Nippon Electrolysis Co., Ltd.) can be used as a commercially available composite foil.

【0026】本発明の目的から、金属箔の厚さの精度
は、極めて重要であり、本発明者らが鋭意行った実験結
果から、電流保護素子の抵抗のばらつきを15%以下に
抑えるためには、金属箔の厚さの精度を±5%程度以内
にする必要があり、抵抗のばらつきを12%以下に抑え
るためには、金属箔の厚さの精度を±3%程度以内にす
る必要があるという知見を得ており、上記の極薄銅箔や
複合箔は、電解法や圧延法で製造され、その厚さ精度
は、一般的に入手できるものでも極めて良好であること
が、重量測定(複合箔では、極薄銅層を溶解して測定)
の結果、平均値に対して、同一ロット品では、±1%程
度であり、抵抗のばらつきを12%以下に抑えることは
十分に可能である。
For the purpose of the present invention, the accuracy of the thickness of the metal foil is extremely important. From the results of experiments conducted by the present inventors, it is necessary to reduce the variation in the resistance of the current protection element to 15% or less. Requires that the accuracy of the thickness of the metal foil be within ± 5%, and that the accuracy of the thickness of the metal foil be within ± 3% in order to suppress the variation in resistance to 12% or less. It has been found that the above-mentioned ultra-thin copper foil and composite foil are manufactured by an electrolytic method or a rolling method, and the thickness accuracy thereof is extremely good even if it is generally available. Measurement (for composite foil, measure by dissolving ultra-thin copper layer)
As a result, the average value is about ± 1% for the same lot product, and it is sufficiently possible to suppress the resistance variation to 12% or less.

【0027】このキャリア付き金属箔と第1の絶縁層と
を積層接着するには、空隙形成用の穴の開いた第1の絶
縁層とキャリア付き金属箔との間に、空隙形成用の穴を
開けた接着層を介挿し、この接着層により積層接着する
ことができ、このときに、第1の絶縁層と接着層の空隙
形成用の穴のズレを防ぐ意味からも、空隙形成用の穴を
開ける予定の第1の絶縁層の表面に接着層を形成し、同
時に空隙形成用の穴を開けた後、キャリア付き金属箔と
積層接着することが好ましい。この場合、第1の絶縁層
の表面に接着層を形成するには、半硬化状の接着層をプ
レスあるいはロールラミネーターを使用するか、あるい
は、第1の絶縁層の表面に接着層のワニスを塗工乾燥し
形成してもよい。
In order to laminate and bond the metal foil with carrier and the first insulating layer, a hole for forming a gap is provided between the first insulating layer having a hole for forming a gap and the metal foil with a carrier. Can be laminated and bonded by this adhesive layer. At this time, from the viewpoint of preventing the gap between the first insulating layer and the adhesive layer from forming the hole for forming the void, the gap for forming the void is also required. It is preferable to form an adhesive layer on the surface of the first insulating layer in which a hole is to be formed, and at the same time, after forming a hole for forming a void, to laminate and bond with a metal foil with a carrier. In this case, to form an adhesive layer on the surface of the first insulating layer, the semi-cured adhesive layer is pressed or roll-laminated, or a varnish of the adhesive layer is applied to the surface of the first insulating layer. It may be formed by coating and drying.

【0028】キャリア付き金属箔と、空隙形成用の穴の
開いた第1の絶縁層および第2の絶縁層と積層接着した
後、回路形成を効率よく行うためには、この空隙形成用
の穴を除去可能な樹脂で埋め込むことが好ましく、穴埋
め用の市販の樹脂として、SER−410CL(山栄化
学株式会社製、商品名)やSER−491B(山栄化学
株式会社製、商品名)などが使用でき、これらは、40
〜60℃の3〜5重量%NaOH水溶液で容易に除去で
き、回路形成後に除去することができる。
After laminating and bonding the metal foil with carrier and the first insulating layer and the second insulating layer each having a hole for forming a gap, in order to efficiently form a circuit, the holes for forming the gap are required. Is preferably embedded with a resin that can be removed. Examples of commercially available resin for filling holes include SER-410CL (trade name, manufactured by Yamaei Chemical Co., Ltd.) and SER-391B (trade name, manufactured by Yamaei Chemical Co., Ltd.). Can be used, these are 40
It can be easily removed with a 3 to 5% by weight aqueous NaOH solution at 6060 ° C., and can be removed after circuit formation.

【0029】(工程c)積層接着した第1の絶縁層から
キャリアを除去するには、アルミニウムキャリア付極薄
銅箔やピーラブル銅箔の場合には、側面に露出している
キャリアと3〜9μmの金属箔の境界に、ナイフのよう
な鋭利な刃先を食い込ませ、その断片を指でつまんで引
き剥がすようにして剥離することができ、キャリア/ス
トッパ/極薄銅の複合箔の場合には、キャリアとストッ
パをそれぞれ化学エッチング液に浸漬したり化学エッチ
ング液をスプレー噴霧したりして、エッチング除去する
ことができる。
(Step c) In order to remove the carrier from the laminated and bonded first insulating layer, in the case of an ultra-thin copper foil with an aluminum carrier or a peelable copper foil, the carrier exposed on the side face is 3 to 9 μm. A sharp edge like a knife is cut into the boundary of the metal foil, and the fragment can be peeled by pinching it with a finger and peeling it off. In the case of the composite foil of carrier / stopper / ultra-thin copper, The carrier and the stopper can be etched and removed by immersing the carrier and the stopper in the chemical etching solution or spraying the chemical etching solution.

【0030】(工程d)金属箔の不要な箇所をエッチン
グ除去するには、エッチングレジスト用のインクをシル
クスクリーン印刷したり、エッチングレジスト用ドライ
フィルムをラミネートし、形成するレジストの形状に合
わせたフォトマスクを介して紫外線を露光・現像したり
して、エッチング除去しないで残す形状に形成し、化学
エッチング液に浸漬したり化学エッチング液をスプレー
噴霧したりして、エッチング除去することができ、複数
の電流保護素子と電極と電流保護素子の接続配線を形成
することができる。
(Step d) In order to remove unnecessary portions of the metal foil by etching, an ink for an etching resist is silk-screen printed, or a dry film for an etching resist is laminated, and a photo-responding to the shape of the resist to be formed. By exposing and developing ultraviolet rays through a mask to form a shape that remains without being etched away, it can be etched and removed by dipping in a chemical etching solution or spraying a chemical etching solution. And the connection wiring between the electrode and the current protection element can be formed.

【0031】キャリアを除去した後、厚さ3〜9μmの
金属箔に、接続配線の厚さが、10〜50μmの厚さと
なるように、予めめっきを行うこともでき、電極と電流
保護素子との接続信頼性が向上し好ましい。このような
めっきは、キャリアを除去した後、めっき用レジストパ
ターンを形成し、その後絶縁基板に貼り付けられた厚さ
3〜9μmの金属箔に、電極となる部分の厚さが、10
〜50μmの厚さとなるように、電気銅めっきを行なう
ことによって可能である。
After the carrier is removed, the metal foil having a thickness of 3 to 9 μm can be plated in advance so that the thickness of the connection wiring is 10 to 50 μm. Connection reliability is improved. In such plating, after removing a carrier, a plating resist pattern is formed, and then, a metal foil having a thickness of 3 to 9 μm attached to an insulating substrate has a thickness of a portion serving as an electrode having a thickness of 10 μm.
This is possible by performing electrolytic copper plating so as to have a thickness of about 50 μm.

【0032】あるいはまた、キャリアと厚さ3〜9μm
の金属箔に、キャリア銅(18μm)/ニッケル層
(0.1μm)/極薄銅5μmからなるCCT−FOI
L(日本電解株式会社製、商品名)を使用し、接続配線
となる箇所にエッチングレジストを形成し、キャリア銅
をアルカリエッチング液でエッチング除去し、ニッケル
層をメルストリップN−950(メルテックス株式会社
製、商品名)やニッケルストリッパーBR(日本マクダ
ーミット株式会社製、商品名)等のニッケルエッチング
液でエッチング除去することもでき、この場合、電極と
電流保護素子の接続部分を厚く残すことができ、好まし
い。
Alternatively, a carrier and a thickness of 3 to 9 μm
CCT-FOI consisting of carrier copper (18 μm) / nickel layer (0.1 μm) / ultra-thin copper 5 μm
Using L (manufactured by Nihon Electrolysis Co., Ltd., a trade name), an etching resist is formed at a portion to be a connection wiring, carrier copper is removed by etching with an alkaline etching solution, and a nickel layer is formed by Melstrip N-950 (Meltex Co., Ltd.). It can also be removed by etching with a nickel etchant such as a company (trade name, trade name) or nickel stripper BR (trade name, manufactured by McDermit Japan Co., Ltd.). In this case, the connection between the electrode and the current protection element can be left thick. ,preferable.

【0033】この場合、極薄銅5μmの箇所と、キャリ
ア銅とニッケル層が残った箇所があり、表面に凹凸があ
るので、エッチングレジストを形成するには、電着によ
って感光性樹脂と皮膜を表面に形成できるエッチングレ
ジストを用い、形成するレジストの形状に合わせたフォ
トマスクを介して紫外線を露光・現像したりして、エッ
チング除去しないで残す形状に形成し、化学エッチング
液に浸漬したり化学エッチング液をスプレー噴霧したり
して、エッチング除去することができ、複数の電流保護
素子と電極と電流保護素子の接続配線を形成することが
できる。
In this case, there is a place of ultra-thin copper 5 μm and a place where carrier copper and nickel layer remain, and the surface is uneven. Therefore, in order to form an etching resist, the photosensitive resin and the film are deposited by electrodeposition. Using an etching resist that can be formed on the surface, by exposing and developing ultraviolet rays through a photomask that matches the shape of the resist to be formed, it is formed into a shape that remains without being etched away, and immersed in a chemical etching solution or chemically The etching solution can be removed by etching by spraying or spraying, so that a plurality of current protection elements and electrodes and connection wiring between the current protection elements can be formed.

【0034】(工程e)電流保護素子の位置に空隙を合
わせた第2の絶縁層と、第1の絶縁層と第2の絶縁層の
外側に重ねる、片面にのみ金属箔を貼り合わせた第3の
絶縁層には、樹脂フィルムや樹脂フィルム等を用いるこ
とができ、使用できる市販の樹脂フィルムとしては、G
EA−E−679N(日立化成工業株式会社製、商品
名)等が、また市販の樹脂フィルムとしては、GF35
00(日立化成工業株式会社製、商品名)等がある。空
隙形成用の穴の開いた第1の絶縁層および第2の絶縁層
と第3の絶縁層との接着には、空隙形成用の穴の開いた
接着層を用いて行うことができ、その接着層の厚さは2
0〜200μmの範囲が好ましく、40〜100μmの
範囲がより好ましい。この層間接着層の厚さが20μm
未満であると、接続配線の埋め込みが不十分で、その後
の工程ではがれたりすることもあり、200μmを越え
ると、樹脂フローが大きくなり、空隙形成用の穴の箇所
にまで流れ込み、空隙がつぶれるおそれがある。層間接
着層の樹脂フローは、200μm以下であることが好ま
しく、この樹脂フローとは、厚さ50μmで直径5mm
の穴をあけた試料を、実際に使用する積層条件で加熱・
加圧したときに、穴の縁から穴内部に流れ出した樹脂の
距離のことをいう。
(Step e) A second insulating layer having a gap aligned with the position of the current protection element, and a second insulating layer having a metal foil bonded to only one surface, which is superimposed on the outside of the first insulating layer and the second insulating layer. For the insulating layer of No. 3, a resin film or a resin film can be used.
EA-E-679N (trade name, manufactured by Hitachi Chemical Co., Ltd.), and GF35 as a commercially available resin film.
00 (manufactured by Hitachi Chemical Co., Ltd., trade name). Adhesion between the first insulating layer and the second insulating layer having holes for forming voids and the third insulating layer can be performed using an adhesive layer having holes for forming voids. The thickness of the adhesive layer is 2
The range is preferably from 0 to 200 µm, more preferably from 40 to 100 µm. The thickness of this interlayer adhesive layer is 20 μm
If the thickness is less than 200, the connection wiring is insufficiently buried and may be peeled off in the subsequent steps. If the thickness exceeds 200 μm, the resin flow becomes large, flows into the hole for forming the void, and the void is crushed. There is a risk. The resin flow of the interlayer adhesive layer is preferably 200 μm or less, and this resin flow is 50 μm thick and 5 mm in diameter.
Heat the sample with the holes
When pressurized, it refers to the distance of the resin that has flowed into the hole from the edge of the hole.

【0035】空隙形成用の穴の開いた第1の絶縁層およ
び第2の絶縁層と、その片面にのみ金属箔を貼り合わせ
た第3の絶縁層を、金属層が外側となるように重ねて、
積層接着するには、その空隙形成用の穴のあいた接着層
を挟んで重ね加圧・加熱することによって行うことがで
き、あるいは、第3の絶縁層にその空隙形成用の穴のあ
いた接着層をラミネートしてから、加圧・加熱すること
によって行うこともできる。
A first insulating layer and a second insulating layer each having a hole for forming a gap, and a third insulating layer in which a metal foil is bonded to only one surface of the first insulating layer and the second insulating layer are stacked such that the metal layer is on the outside. hand,
Lamination bonding can be carried out by overlapping and pressing and heating the adhesive layer having holes for forming voids, or an adhesive layer having holes for forming voids in the third insulating layer. And then pressurizing and heating.

【0036】(工程f)積層接着した物の接続配線の箇
所に電極用の穴をあけるには、通常の、数値制御のドリ
ルマシンによって行うことができる。
(Step f) A hole for an electrode can be made at a location of the connection wiring of the laminated and bonded object by a usual numerically controlled drill machine.

【0037】(工程g)めっきを行い、接続配線と金属
箔とを電気的に接続するには、通常の配線板のスルーホ
ールめっきを行う要領で行うことができ、スルーホール
内のスミアを除去するデスミア処理を行い、薄く無電解
めっきを行って電気めっきを行うか、あるいは、厚付け
無電解めっきを行うことによって達成でき、めっきの厚
さは、5〜50μm、より好ましくは10〜30μmの
範囲である。。
(Step g) The plating and the electrical connection between the connection wiring and the metal foil can be carried out in the same manner as in a normal through-hole plating of a wiring board, and the smear in the through-hole is removed. Performing desmearing, or performing electroless plating by performing thin electroless plating, or can be achieved by performing thick electroless plating, and the plating thickness is 5 to 50 μm, more preferably 10 to 30 μm. Range. .

【0038】(工程h)電極以外の箇所をエッチング除
去して電極を形成するには、電極の形状にエッチングレ
ジストを形成し、エッチングレジストに覆われていない
箇所を、化学エッチング液に浸漬するか、あるいは化学
エッチング液をスプレー噴霧して、エッチング除去する
ことによって行うことができる。
(Step h) In order to form an electrode by removing portions other than the electrode by etching, an etching resist is formed in the shape of the electrode, and a portion not covered with the etching resist is immersed in a chemical etching solution. Alternatively, the etching can be carried out by spraying a chemical etching solution to remove by etching.

【0039】(工程i)隣接する電流保護素子との間、
および穴の箇所で切断することによって、両端の電極を
形成した個々のチップ型電流保護素子に切り分けるに
は、回転刃を有するダイシングマシンによって行うこと
ができる。
(Step i) Between adjacent current protection elements:
In order to cut each chip-type current protection element in which electrodes at both ends are formed by cutting at the locations of the holes and holes, a dicing machine having a rotary blade can be used.

【0040】[0040]

【実施例】実施例1 (工程a)図1(a)に示すように、厚さ18μmの銅
箔を両面に貼り合わせた、厚さ0.2mmの両面銅張り
積層板であるMCL−E−679(日立化成工業株式会
社製、商品名)の両面の銅箔をエッチング除去した2枚
の絶縁板11、12を、それぞれ、第1の絶縁層と第2
の絶縁層とし、その片面に、樹脂フィルム3であるGF
3500(日立化成工業株式会社製、商品名)を、温度
80℃、時間10分、圧力30kgf/cm2のプレス
条件で、加熱・加圧して仮接着し、2枚の樹脂フィルム
付き絶縁板101、102を作製し、それぞれに、直径
0.8mmの空隙形成用の穴4をドリルマシンで開け
た。
EXAMPLE 1 (Step a) As shown in FIG. 1 (a), MCL-E is a 0.2 mm thick double-sided copper-clad laminate in which copper foil having a thickness of 18 μm is bonded to both sides. -679 (trade name, manufactured by Hitachi Chemical Co., Ltd.), the two insulating plates 11 and 12 obtained by etching and removing the copper foils on both surfaces of the first insulating layer and the second insulating layer, respectively.
GF, which is a resin film 3 on one side.
3500 (manufactured by Hitachi Chemical Co., Ltd., trade name) was heated and pressed under a pressing condition of a temperature of 80 ° C., a time of 10 minutes, and a pressure of 30 kgf / cm 2 , and was temporarily bonded, and two insulating plates 101 with a resin film were used. , 102 were prepared, and a hole 4 having a diameter of 0.8 mm for forming a void was formed in each of the holes by a drill machine.

【0041】(工程b)図1(b)に示すように、キャ
リア5と厚さ3〜9μmの金属箔6とからなるキャリア
付き金属箔として、厚さ18μmのキャリア銅51/厚
さ0.1μmのニッケル層91/厚さ5μmの極薄銅6
1からなるCCT−FOIL(日本電解株式会社製、商
品名)と、樹脂フィルム付き絶縁板101とを、極薄銅
61と樹脂フィルム3とが接するように重ね合わせ、温
度170℃、時間60分、圧力20kgf/cm2の条
件で、加熱・加圧し、積層一体化し、さらに、穴埋め樹
脂42であるSER−410CL(山栄化学株式会社
製、商品名)を、積層した基板の空隙形成用の穴4に、
シルクスクリーン印刷によって埋め込み、更に埋め込ん
だ面に耐薬品性の保護フィルム41として、厚さ80μ
mのフィルムであるL1240H(日立化成工業株式会
社製、商品名)を貼り付けた。
(Step b) As shown in FIG. 1B, as a metal foil with a carrier comprising a carrier 5 and a metal foil 6 having a thickness of 3 to 9 μm, a carrier copper 51 having a thickness of 18 μm / a thickness of 0.1 μm. 1 μm nickel layer 91/5 μm thick ultra-thin copper 6
1 and the insulating plate 101 with a resin film are superimposed on each other so that the ultra-thin copper 61 and the resin film 3 are in contact with each other, and the temperature is 170 ° C. and the time is 60 minutes. Under the condition of a pressure of 20 kgf / cm 2 , heating and pressurizing are performed, and the laminate is integrated. Further, SER-410CL (manufactured by Yamaei Chemical Co., Ltd., trade name) which is a filling resin 42 is used for forming a void in a substrate on which the laminate is formed. In hole 4,
Embed by silk screen printing, and as a chemical resistant protective film 41 on the embedded surface, a thickness of 80 μm
L1240H (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is a film of m.

【0042】(工程c)次に、図1(c)に示すよう
に、キャリア銅51をアルカリエッチング液でエッチン
グ除去し、さらに、ニッケル層91をニッケルエッチン
グ液であるメルストリップN−950(メルテックス株
式会社製、商品名)でエッチング除去し、極薄銅61を
露出させた。
(Step c) Next, as shown in FIG. 1 (c), the carrier copper 51 is removed by etching with an alkali etching solution, and the nickel layer 91 is further melted with a nickel strip N-950 (melting strip). This was removed by etching using Tex Corporation, trade name) to expose the ultra-thin copper 61.

【0043】(工程d)その後、厚さ50μmのドライ
フィルムであるH−K450(日立化成工業株式会社
製、商品名)を、極薄銅61の表面にラミネートし、接
続配線71の箇所のみをマスクしたフォトマスクを介し
て紫外線を照射し、現像して、接続配線71の箇所以外
を覆うように、めっきレジストを形成し、硫酸銅による
電気銅めっきを、電流密度4A/dm2、温度25℃
で、40分間行い、接続配線71の厚さを20μmにし
た。続いて、図1(d)に示すように、めっきレジスト
を剥離した後、ドライフィルムH−K450(日立化成
工業株式会社製、商品名)を、極薄銅61の表面にラミ
ネートし、電流保護素子8と接続配線71の箇所以外を
マスクしたフォトマスクを介して紫外線を照射し、現像
して、電流保護素子8と接続配線71の箇所を覆うよう
に、エッチングレジストを形成し、塩化銅エッチング液
を用い、エッチングレジストに覆われていない箇所をエ
ッチング除去して、電流保護素子8と接続配線71を形
成した。このときに、図1(D)に示すように、複数の
電流保護素子8が接続配線71を挟んで縦方向に直列と
なるように配列し、横方向にその配列を平行に並ぶよう
に整列した後、裏面の保護フィルム41を剥がし、次い
で60℃の4重量%NaOH水溶液に浸漬し、空隙形成
用の穴4内の穴埋め樹脂を溶解・除去した。
(Step d) Thereafter, H-K450 (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is a dry film having a thickness of 50 μm, is laminated on the surface of the ultra-thin copper 61, and only the portion of the connection wiring 71 is removed. Ultraviolet light is irradiated through a masked photomask, developed, and a plating resist is formed so as to cover portions other than the connection wiring 71. Electroplating with copper sulfate is performed at a current density of 4 A / dm 2 and a temperature of 25. ° C
For 40 minutes to reduce the thickness of the connection wiring 71 to 20 μm. Subsequently, as shown in FIG. 1D, after the plating resist was removed, a dry film H-K450 (trade name, manufactured by Hitachi Chemical Co., Ltd.) was laminated on the surface of the ultra-thin copper 61 to protect the current. Ultraviolet rays are irradiated and developed through a photomask masking portions other than the element 8 and the connection wiring 71, and an etching resist is formed so as to cover the current protection element 8 and the connection wiring 71, and copper chloride etching is performed. Using a liquid, portions not covered with the etching resist were removed by etching, so that the current protection element 8 and the connection wiring 71 were formed. At this time, as shown in FIG. 1 (D), the plurality of current protection elements 8 are arranged in series in the vertical direction with the connection wiring 71 interposed therebetween, and are arranged in the horizontal direction so as to be arranged in parallel. After that, the protective film 41 on the back surface was peeled off, and then immersed in a 4% by weight NaOH aqueous solution at 60 ° C. to dissolve and remove the filling resin in the holes 4 for forming the voids.

【0044】(工程e)図1(e)に示すように、電流
保護素子8と接続配線71を形成した基板と、樹脂フィ
ルム付き絶縁板102と、隙形成用の穴4の箇所に穴を
開けた樹脂フィルム3であるGF3500(日立化成工
業株式会社製、商品名)と、厚さ18μmの銅箔72を
片面に貼り合わせた厚さ0.2mmの片面銅張り積層板
111、112であるMCL−E−679(日立化成工
業株式会社製、商品名)2枚を、銅箔72を下にして片
面銅張り積層板111を置き、その上に、樹脂フィルム
3、絶縁板11を下にした電流保護素子8と接続配線7
1を形成した基板、樹脂フィルム3を下にした樹脂フィ
ルム付き絶縁板102、樹脂フィルム3、銅箔72を上
にした片面銅張り積層板112の順に、空隙形成用の穴
4が電流保護素子8の箇所になるように位置合わせして
重ね、温度180℃、時間60分、圧力50kgf/c
2の条件で加熱・加圧して積層一体化した。
(Step e) As shown in FIG. 1 (e), holes are formed at the positions of the substrate on which the current protection element 8 and the connection wiring 71 are formed, the insulating plate 102 with the resin film, and the holes 4 for forming the gaps. GF3500 (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is an opened resin film 3, and single-sided copper-clad laminates 111 and 112 each having a thickness of 0.2 mm and a copper foil 72 having a thickness of 18 μm bonded to one side. Two pieces of MCL-E-679 (trade name, manufactured by Hitachi Chemical Co., Ltd.) are placed on a single-sided copper-clad laminate 111 with the copper foil 72 facing down, and the resin film 3 and the insulating plate 11 are placed thereon. Current protection element 8 and connection wiring 7
The hole 4 for forming a gap is formed by a current protection element in the order of the substrate on which the substrate 1 is formed, the insulating plate 102 with the resin film with the resin film 3 down, the resin film 3 and the single-sided copper-clad laminate 112 with the copper foil 72 up. 8 position, piled up, temperature 180 ° C, time 60 minutes, pressure 50kgf / c
The layers were integrated by heating and pressing under the conditions of m 2 .

【0045】(工程f)図1(f)に示すように、この
積層接着した基板の端部に設けた穴あけガイドの箇所
に、X線透視スコープ付き穴あけ機で、直径0.35m
mの穴をあけ、それを基準にして配置設計した電流保護
素子8の間を接続する接続配線71の箇所に直径0.7
mmの穴801をあけた。
(Step f) As shown in FIG. 1 (f), a hole having a diameter of 0.35 m was formed at the position of a drilling guide provided at the end of the laminated substrate by using a drilling machine with an X-ray fluoroscope.
and a hole 0.7 mm in diameter at the connection wiring 71 connecting between the current protection elements 8 arranged and designed based on the hole.
A hole 801 of mm was made.

【0046】(工程g)図1(g)に示すように、穴を
あけた基板に、無電解めっきの前処理を行い、無電解銅
めっき液であるL−59めっき液(日立化成工業株式会
社製、商品名)に、温度70℃で、12時間、浸漬し、
厚さ24μmの銅めっき73を形成した。
(Step g) As shown in FIG. 1 (g), a pre-process of electroless plating was performed on the holed substrate, and an L-59 plating solution as an electroless copper plating solution (Hitachi Chemical Industry Co., Ltd.) (Manufactured by the company, trade name) at 70 ° C for 12 hours,
Copper plating 73 having a thickness of 24 μm was formed.

【0047】(工程h)続いて、図1(h)に示すよう
に、ドライフィルムH−K450(日立化成工業株式会
社製、商品名)を、めっきした銅箔の表面にラミネート
し、穴801の箇所に形成する電極7の箇所以外をマス
クしたフォトマスクを介して紫外線を照射し、現像し
て、電極7の箇所を覆うように、エッチングレジストを
形成し、塩化銅エッチング液を用い、エッチングレジス
トに覆われていない箇所をエッチング除去して、複数の
電極7を形成した。このときの電極7の配列は、図1
(i)に示すように、縦・横方向に配列した。
(Step h) Subsequently, as shown in FIG. 1H, a dry film H-K450 (trade name, manufactured by Hitachi Chemical Co., Ltd.) was laminated on the surface of the plated copper foil, and holes 801 were formed. UV light is irradiated through a photomask that masks other than the location of the electrode 7 to be formed at the location of the electrode 7 and developed, an etching resist is formed so as to cover the location of the electrode 7, and etching is performed using a copper chloride etching solution. A plurality of electrodes 7 were formed by etching away portions not covered with the resist. The arrangement of the electrodes 7 at this time is shown in FIG.
As shown in (i), they were arranged vertically and horizontally.

【0048】(工程i)図1(i)に示すように、電流
保護素子8と接続配線71とが接続されるように配列さ
れた方向においては、穴801を分割するように切断
し、それと直行する方向においては、隣接する電流保護
素子8の間を切断し、電極7をその両端に形成した個々
のチップ型電流保護素子に切り分けた。
(Step i) As shown in FIG. 1 (i), in the direction in which the current protection element 8 and the connection wiring 71 are arranged so as to be connected, the hole 801 is cut so as to be divided. In the perpendicular direction, the space between the adjacent current protection elements 8 was cut, and the electrodes 7 were cut into individual chip-type current protection elements formed at both ends thereof.

【0049】実施例2 (工程a)厚さ18μmの銅箔を両面に貼り合わせた、
厚さ0.2mmの両面銅張り積層板であるMCL−E−
679(日立化成工業株式会社製、商品名)の両面の銅
箔をエッチング除去した2枚の絶縁板11、12を、そ
れぞれ、第1の絶縁層1と第2の絶縁層2とし、その片
面に、樹脂フィルム3であるGF3500(日立化成工
業株式会社製、商品名)を、温度80℃、時間10分、
圧力30kgf/cm2のプレス条件で、加熱・加圧し
て仮接着し、2枚の樹脂フィルム付き絶縁板101、1
02を作製し、それぞれに、直径0.8mmの空隙形成
用の穴4をドリルマシンで開けた。
Example 2 (Step a) A copper foil having a thickness of 18 μm was attached to both sides.
MCL-E- is a double-sided copper-clad laminate of 0.2mm thickness
679 (manufactured by Hitachi Chemical Co., Ltd., trade name) were used as the first insulating layer 1 and the second insulating layer 2, respectively, with the two insulating plates 11 and 12 from which the copper foils on both surfaces were removed by etching. GF3500 (trade name, manufactured by Hitachi Chemical Co., Ltd.) as a resin film 3 was heated at 80 ° C. for 10 minutes.
Under a pressing condition of a pressure of 30 kgf / cm 2 , heat and pressure are applied to temporarily bond the two, and the two insulating plates 101 with a resin film,
No. 02 was prepared, and a hole 4 having a diameter of 0.8 mm for forming a void was formed in each of them by a drill machine.

【0050】(工程b)キャリア5と厚さ3〜9μmの
金属箔6とからなるキャリア付き金属箔として、厚さ7
0μmのキャリア銅51/厚さ9μmの極薄銅61から
なるDOUBLETHIN9/70(古河サーキットフ
ォイル株式会社製、商品名)と、樹脂フィルム付き絶縁
板101とを、極薄銅61と樹脂フィルム3とが接する
ように重ね合わせ、温度170℃、時間60分、圧力2
0kgf/cm2の条件で、加熱・加圧し、積層一体化
した。さらに、穴埋め用樹脂であるSER−410CL
(山栄化学株式会社製、商品名)を、積層した基板の空
隙形成用の穴4に、シルクスクリーン印刷によって埋め
込み、更に埋め込んだ面に耐薬品性の保護フィルム41
として、厚さ80μmのフィルムであるL1240H
(日立化成工業株式会社製、商品名)を貼り付けた。
(Step b) As a metal foil with a carrier comprising a carrier 5 and a metal foil 6 having a thickness of 3 to 9 μm,
DOUBLETHIN 9/70 (trade name, manufactured by Furukawa Circuit Foil Co., Ltd.) composed of 0 μm carrier copper 51/9 μm thick ultra-thin copper 61 and insulating plate 101 with a resin film were combined with ultra-thin copper 61 and resin film 3. Are superimposed on each other, and the temperature is 170 ° C., the time is 60 minutes, and the pressure is 2
Under the condition of 0 kgf / cm 2 , heating and pressurization were performed to laminate and integrate. Furthermore, SER-410CL which is a resin for filling holes
(Trade name, manufactured by Yamaei Chemical Co., Ltd.) is buried in the holes 4 of the laminated substrate by means of silk screen printing, and the buried surface is further coated with a chemical-resistant protective film 41.
L1240H which is a film having a thickness of 80 μm
(Trade name, manufactured by Hitachi Chemical Co., Ltd.).

【0051】(工程c)次いで、70μmのキャリア銅
51を手作業で剥離した。
(Step c) Next, the carrier copper 51 of 70 μm was manually peeled off.

【0052】(工程d)その後、厚さ50μmのドライ
フィルムであるH−K450(日立化成工業株式会社
製、商品名)を、極薄銅61の表面にラミネートし、接
続配線71の箇所のみをマスクしたフォトマスクを介し
て紫外線を照射し、現像して、接続配線71の箇所以外
を覆うように、めっきレジストを形成し、硫酸銅による
電気銅めっきを、電流密度4A/dm2、温度25℃
で、40分間行い、接続配線71の厚さを20μmにし
た。その後は、実施例1と同様にチップ型電流保護素子
を作製した。
(Step d) Thereafter, H-K450 (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is a dry film having a thickness of 50 μm, is laminated on the surface of the ultra-thin copper 61, and only a portion of the connection wiring 71 is removed. Ultraviolet light is irradiated through a masked photomask, developed, and a plating resist is formed so as to cover portions other than the connection wiring 71. Electroplating with copper sulfate is performed at a current density of 4 A / dm 2 and a temperature of 25. ° C
For 40 minutes to reduce the thickness of the connection wiring 71 to 20 μm. Thereafter, a chip-type current protection element was manufactured in the same manner as in Example 1.

【0053】比較例1 樹脂フィルム付き絶縁板101、102に空隙形成用の
穴4を形成しない以外には実施例1と同様にして、チッ
プ型電流保護素子を作製した。
Comparative Example 1 A chip-type current protection element was manufactured in the same manner as in Example 1 except that the holes 4 for forming voids were not formed in the insulating plates 101 and 102 with a resin film.

【0054】比較例2 キャリア付き銅箔に代えて、厚さ12μmの銅箔である
YGR−12(日本電解株式会社製、商品名)を用い、
キャリアを除去する工程を行わなかった以外は実施例1
と同様にして、チップ型電流保護素子を作製した。
Comparative Example 2 A copper foil having a thickness of 12 μm, YGR-12 (trade name, manufactured by Nippon Electrolysis Co., Ltd.) was used in place of the copper foil with a carrier.
Example 1 except that the step of removing the carrier was not performed.
In the same manner as in the above, a chip-type current protection element was manufactured.

【0055】比較例3 キャリア付き銅箔に代えて、厚さ18μmの銅箔である
NDGR−18(日本電解株式会社製、商品名)を用
い、キャリアを除去する工程を行わなかった以外は実施
例1と同様にして、チップ型電流保護素子を作製した。
Comparative Example 3 An NDGR-18 (trade name, manufactured by Nippon Electrolysis Co., Ltd.), a 18-μm-thick copper foil, was used in place of the copper foil with a carrier, except that the step of removing the carrier was not performed. In the same manner as in Example 1, a chip-type current protection element was manufactured.

【0056】実施例及び比較例で作製したチップ型電流
保護素子は、抵抗値が約100mΩになるようにそれぞ
れ回路形成を行った。 (抵抗値)100個づつ無作為に抽出し、抵抗値を測定
し、抵抗値が範囲内(±10%以内)のチップ型電流保
護素子の数を数えた。 (溶断時間)抵抗値が上記の範囲内のもの100個につ
いてのみ溶断時間を測定した。なお、溶断電流値は1.
6Aであり、オシロスコープによりラッシュカレントが
発生しないように電圧値を調整し、溶断試験を行った。 (残留抵抗値)溶断した後の抵抗値を測定し、1MΩ以
上の数を数えた。 (発火・発煙)溶断試験中、発火・発煙の有無を目視で
チェックし、発火・発煙のないものの数を数えた。結果
を表1に示す。
Circuits were formed on the chip-type current protection elements manufactured in the examples and comparative examples so that the resistance value was about 100 mΩ. (Resistance value) 100 resistances were extracted at random, the resistance value was measured, and the number of chip-type current protection elements having a resistance value within a range (within ± 10%) was counted. (Fusing time) Fusing time was measured only for 100 pieces having a resistance value within the above range. The fusing current value is 1.
6A, and the fusing test was performed by adjusting the voltage value so that no rush current was generated by the oscilloscope. (Residual resistance value) The resistance value after fusing was measured, and the number of 1 MΩ or more was counted. (Ignition / smoke) During the fusing test, the presence or absence of ignition / smoke was visually checked, and the number of those without ignition / smoke was counted. Table 1 shows the results.

【0057】[0057]

【表1】 [Table 1]

【0058】この結果を見ると、実施例では、電流保護
素子8の抵抗値のばらつきは少なく、溶断時間のばらつ
きも少ないのに対し、空隙形成用の穴を形成しなかった
比較例1では、残留抵抗が数KΩのものがあり、また、
発煙するものも認められ、比較例2では、電流保護素子
8の抵抗値が大きくばらつき、さらに溶断時間のばらつ
きも大きく、比較例3では、電流保護素子8を形成する
銅箔が厚いので、実施例と同じ抵抗値とするにはその回
路幅を25μm程度に形成する必要があるが、そのよう
な精度でエッチング加工するのが困難なため、抵抗値の
ばらつきが大きく、選別したものでも溶断時間のばらつ
きは大きかった。
As can be seen from the results, in the example, the variation in the resistance value of the current protection element 8 was small and the variation in the fusing time was small, whereas in the comparative example 1 in which no hole for forming a gap was formed, Some have a residual resistance of several KΩ,
Some smokes were also observed. In Comparative Example 2, the resistance value of the current protection element 8 greatly fluctuated, and the fusing time also fluctuated widely. In Comparative Example 3, the copper foil forming the current protection element 8 was thick. In order to obtain the same resistance value as in the example, it is necessary to form the circuit width of about 25 μm. However, since it is difficult to perform etching with such accuracy, the resistance value varies greatly, and even if the selected one is used, the fusing time is reduced. Was large.

【0059】[0059]

【発明の効果】以上に説明したように、本発明によっ
て、電流保護素子の形成精度(配線の厚さ、幅)に優
れ、放熱の抑制、および発煙、発火の抑制に優れ、さら
に、溶断後の絶縁抵抗が高く信頼性の高いチップ型電流
保護素子とその製造法を提供することができる。
As described above, according to the present invention, the current protection element is excellent in forming accuracy (thickness and width of wiring), is excellent in suppressing heat radiation, and suppressing smoke and ignition, and further, after fusing. And a highly reliable chip-type current protection element having high insulation resistance and a method of manufacturing the same.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(a)〜(h)は、それぞれ本発明の一実施例
を示す各工程における断面図であり、(D)は(d)の
上面図であり、(i)は上面図である。
1 (a) to 1 (h) are cross-sectional views in respective steps showing one embodiment of the present invention, (D) is a top view of (d), and (i) is a top view. is there.

【符号の説明】[Explanation of symbols]

11.12.絶縁板 101、102.樹脂フィルム付き絶縁板 111、112.片面銅張り積層板 3.樹脂フィルム 4.空隙形成用の穴 41.保護フィルム 42.穴埋め樹脂 5.キャリア 51.キャリア銅 6.厚さ3〜9μmの銅箔 61.極薄銅 91.ニッケル層 7.電極 71.接続配線 72.銅箔 73.銅めっき 8.電流保護素子 801.穴 11.12. Insulating plate 101, 102. Insulating plate with resin film 111, 112. 2. Single-sided copper-clad laminate Resin film 4. Hole for forming void 41. Protective film 42. Filling resin 5. Carrier 51. Carrier copper 6. 61. Copper foil having a thickness of 3 to 9 μm Ultra-thin copper 91. Nickel layer 7. Electrode 71. Connection wiring 72. Copper foil 73. Copper plating 8. Current protection element 801. hole

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】電流保護素子と、その両面に設けられた絶
縁層と、電流保護素子に接続された一対の電極と、から
なるチップ型電流保護素子において、電流保護素子の厚
さが3〜9μmであり、かつ、電流保護素子の少なくと
も溶断予定部の近傍の両面に空隙が設けられていること
を特徴とするチップ型電流保護素子。
1. A chip type current protection element comprising a current protection element, insulating layers provided on both surfaces thereof, and a pair of electrodes connected to the current protection element, wherein the thickness of the current protection element is 3 to A chip-type current protection element having a thickness of 9 μm and having air gaps at least on both surfaces near a portion to be blown of the current protection element.
【請求項2】電流保護素子と電極との接続部の厚さが、
10〜50μmであることを特徴とする請求項1に記載
のチップ型電流保護素子。
2. The thickness of the connection between the current protection element and the electrode is
The chip type current protection device according to claim 1, wherein the thickness is 10 to 50 m.
【請求項3】a.2枚の空隙形成用の穴の開いた第1の
絶縁層と第2の絶縁層を製作する工程、 b.キャリアと厚さ3〜9μmの金属箔とからなるキャ
リア付き金属箔を、第1の絶縁層と積層接着する工程、 c.積層接着した第1の絶縁層からキャリアを除去する
工程、 d.金属箔の不要な箇所をエッチング除去することによ
って、空隙形成用の穴の箇所に電流保護素子が位置する
ように、複数の電流保護素子と電極と電流保護素子の接
続配線を形成する工程、 e.電流保護素子の位置に空隙形成要の穴を合わせた第
2の絶縁層と、第1の絶縁層と第2の絶縁層の外側に、
2枚の片面にのみ金属箔を貼り合わせた第3の絶縁層
を、接着層を介して、金属層が外側となるように重ね
て、積層接着する工程、 f.積層接着した物の接続配線の箇所に電極用の穴をあ
ける工程、 g.めっきを行い、接続配線と金属箔とを電気的に接続
する工程、 h.電極以外の箇所をエッチング除去して電極を形成す
る工程、 i.隣接する電流保護素子との間、および穴の箇所で切
断することによって、両端の電極を形成した個々のチッ
プ型電流保護素子に切り分ける工程、からなることを特
徴とするチップ型電流保護素子の製造法。
3. A method according to claim 1, Manufacturing a first insulating layer and a second insulating layer having two holes for forming gaps, b. Laminating and bonding a metal foil with a carrier comprising a carrier and a metal foil having a thickness of 3 to 9 μm to a first insulating layer; c. Removing the carrier from the laminated and bonded first insulating layer; d. Forming a plurality of current protection elements, electrodes, and connection wiring between the electrodes and the current protection element such that the unnecessary parts of the metal foil are removed by etching so that the current protection elements are located at the positions of the holes for forming voids; e. . A second insulating layer in which a hole for forming a gap is aligned with the position of the current protection element, and a first insulating layer and an outer side of the second insulating layer,
A step of stacking and laminating a third insulating layer in which a metal foil is stuck on only one side of the two sheets via an adhesive layer such that the metal layer is on the outside, f. Making a hole for an electrode at a location of the connection wiring of the laminated and bonded object; g. Plating and electrically connecting the connection wiring and the metal foil; h. Forming an electrode by etching away portions other than the electrode, i. Manufacturing a chip-type current protection element characterized by comprising a step of cutting into individual chip-type current protection elements in which electrodes at both ends are formed by cutting between adjacent current protection elements and at locations of holes. Law.
【請求項4】キャリア付き金属箔に、10〜50μmの
範囲の厚さの第1の銅層と、3〜9μmの範囲の厚さの
第2の銅層と、その2つの銅層の中間層として厚さが1
μm以下のニッケルあるいはその合金層を有する複合金
属箔を用いることを特徴とする請求項3に記載のチップ
型電流保護素子の製造法。
4. A metal foil with a carrier, wherein a first copper layer having a thickness in the range of 10 to 50 μm, a second copper layer having a thickness in the range of 3 to 9 μm, and an intermediate between the two copper layers. 1 layer thickness
4. The method for manufacturing a chip-type current protection device according to claim 3, wherein a composite metal foil having a nickel or alloy layer thereof having a thickness of not more than μm is used.
【請求項5】キャリアを除去した後、厚さ3〜9μmの
金属箔に、接続配線の厚さが、10〜50μmの厚さと
なるように、予めめっきを行う工程を有することを特徴
とする請求項3または4に記載のチップ型電流保護素子
の製造法。
5. The method according to claim 1, further comprising a step of plating the metal foil having a thickness of 3 to 9 μm after removing the carrier so that the thickness of the connection wiring is 10 to 50 μm. A method for manufacturing the chip-type current protection device according to claim 3.
【請求項6】キャリアを除去した後に、電流保護素子と
なる箇所のみの、第1の銅層とニッケルあるいはその合
金層の除去を行うことを特徴とする請求項4に記載のチ
ップ型電流保護素子の製造法。
6. The chip-type current protection device according to claim 4, wherein after removing the carrier, the first copper layer and the nickel or alloy layer thereof are removed only at a portion to be a current protection element. Device manufacturing method.
【請求項7】第1の絶縁層と第2の絶縁層に第3の絶縁
層を接着する接着層に、樹脂フローが200μm以下で
ある樹脂を用いることを特徴とする請求項3〜6のうち
いずれかに記載のチップ型電流保護素子の製造法。
7. The method according to claim 3, wherein a resin having a resin flow of 200 μm or less is used for an adhesive layer for bonding the third insulating layer to the first insulating layer and the second insulating layer. A method for manufacturing the chip-type current protection device according to any one of the above.
JP18954698A 1998-07-06 1998-07-06 Current protecting chip element and its manufacture Pending JP2000021611A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18954698A JP2000021611A (en) 1998-07-06 1998-07-06 Current protecting chip element and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18954698A JP2000021611A (en) 1998-07-06 1998-07-06 Current protecting chip element and its manufacture

Publications (1)

Publication Number Publication Date
JP2000021611A true JP2000021611A (en) 2000-01-21

Family

ID=16243132

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18954698A Pending JP2000021611A (en) 1998-07-06 1998-07-06 Current protecting chip element and its manufacture

Country Status (1)

Country Link
JP (1) JP2000021611A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011258818A (en) * 2010-06-10 2011-12-22 Ibiden Co Ltd Printed wiring board, electronic device, and manufacturing method of printed wiring board
WO2012132572A1 (en) * 2011-03-30 2012-10-04 Jx日鉱日石金属株式会社 Copper foil with copper carrier, method for producing said copper foil, copper foil for electronic circuit, method for producing said copper foil, and method for forming electronic circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011258818A (en) * 2010-06-10 2011-12-22 Ibiden Co Ltd Printed wiring board, electronic device, and manufacturing method of printed wiring board
WO2012132572A1 (en) * 2011-03-30 2012-10-04 Jx日鉱日石金属株式会社 Copper foil with copper carrier, method for producing said copper foil, copper foil for electronic circuit, method for producing said copper foil, and method for forming electronic circuit

Similar Documents

Publication Publication Date Title
US7346982B2 (en) Method of fabricating printed circuit board having thin core layer
US5914649A (en) Chip fuse and process for production thereof
US5929741A (en) Current protector
US5329695A (en) Method of manufacturing a multilayer circuit board
KR100811498B1 (en) Thin integral resistor/capacitor/inductor package, method of manufacture
TWI274363B (en) Low resistance polymer matrix fuse apparatus and method
US5600103A (en) Circuit devices and fabrication method of the same
US5309629A (en) Method of manufacturing a multilayer circuit board
US20090051041A1 (en) Multilayer wiring substrate and method for manufacturing the same, and substrate for use in ic inspection device and method for manufacturing the same
CN101467501B (en) Printed wiring board and method for manufacturing the same
TW201247072A (en) Method of manufacturing multilayer wiring substrate
EP1024529A2 (en) Green sheet and manufacturing method thereof, manufacturing method of multi-layer wiring board, and manufacturing method of double-sided wiring board
JP2000021611A (en) Current protecting chip element and its manufacture
KR20090025546A (en) Manufacturing method of a flexible printed circuit board
JP2000021612A (en) Manufacture of current protecting chip element
JPH0935614A (en) Chip fuse and manufacture of it
JPH08130372A (en) Manufacture of multilayer printed wiring board
JP4574025B2 (en) Wiring module
JPH08236001A (en) Chip type current protecting element and its manufacture
JP2002176232A (en) Alignment mark
JPH08130376A (en) Manufacture of multilayer printed wiring board
JPH10269927A (en) Chip fuse and its manufacture
CN210405831U (en) Multilayer PCB board
JPH0992939A (en) Current protective element module and its manufacture
JP2004179485A (en) Printed wiring board and method of manufacturing the same

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050627

A977 Report on retrieval

Effective date: 20070501

Free format text: JAPANESE INTERMEDIATE CODE: A971007

A131 Notification of reasons for refusal

Effective date: 20070510

Free format text: JAPANESE INTERMEDIATE CODE: A131

A521 Written amendment

Effective date: 20070703

Free format text: JAPANESE INTERMEDIATE CODE: A523

A02 Decision of refusal

Effective date: 20071009

Free format text: JAPANESE INTERMEDIATE CODE: A02