JP2000019212A - Method and equipment for inspecting board - Google Patents

Method and equipment for inspecting board

Info

Publication number
JP2000019212A
JP2000019212A JP10189538A JP18953898A JP2000019212A JP 2000019212 A JP2000019212 A JP 2000019212A JP 10189538 A JP10189538 A JP 10189538A JP 18953898 A JP18953898 A JP 18953898A JP 2000019212 A JP2000019212 A JP 2000019212A
Authority
JP
Japan
Prior art keywords
lead frame
electronic component
soldering
board
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10189538A
Other languages
Japanese (ja)
Inventor
Riyuutarou Sutoki
龍太郎 寿時
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARATA DENSHI KK
Original Assignee
ARATA DENSHI KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARATA DENSHI KK filed Critical ARATA DENSHI KK
Priority to JP10189538A priority Critical patent/JP2000019212A/en
Publication of JP2000019212A publication Critical patent/JP2000019212A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a method and an equipment capable of making a decision quickly and surely whether soldering of an electronic part being mounted on a printed board is acceptable or not. SOLUTION: When a lead frame 2a is inspected, for example, the lead frame 2a is connected through a current measuring unit 6 with a common wire 5 connected with lead frames 2b, 2c,... to form a closed circuit along with an IC chip in an electronic part 2. When a rotary field is generated on the surface of the electronic part 2, the rotary field traverses the lead frame 2a and bonding wires connecting between the lead frame 2a and the IC chip in the electronic part 2 to induce current in the closed circuit. The induced current flowing through the current measuring unit 6 is measured and a decision is made that soldering in the lead frame 2a is acceptable if the measured current exceeds a specified level, e.g. 1 μA, otherwise a decision is made that soldering in the lead frame 2a is to be rejected.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、プリント配線され
た基板(以下、プリント基板という)に実装される電子
部品に対し、電子部品のリードフレームがプリント基板
の所定プリント配線に確かに半田付けされていることを
検査する基板検査方法、及びその方法を実現するための
検査装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component mounted on a printed wiring board (hereinafter referred to as a printed circuit board), in which a lead frame of the electronic component is certainly soldered to a predetermined printed wiring of the printed circuit board. 1. Field of the Invention The present invention relates to a board inspection method for inspecting whether a test is performed and an inspection apparatus for realizing the method.

【0002】[0002]

【従来の技術】電子部品をプリント基板に実装する際、
通常、電子部品のリードフレームはプリント基板の所定
プリント配線に半田付けされる。しかるに、最近のIC
等の高集積化、高機能化に伴ってリードフレームの数が
増し、リードフレーム間のピッチが極めて狭くなってき
ており、半田付け部位の検査、即ち、リードフレームが
プリント基板の所定プリント配線に確かに半田付けされ
ていることの検査においては、簡便で速みやかに、しか
し、確実に行うことができることがますます要求され
る。そして、かかる検査は、所謂インサーキット測定、
即ち電子部品がプリント基板に実装された状態で行われ
る。この種の検査方法においては、従来から、特開平6
−34714に開示されているものが多用されている。
この方法は、図6に示すようなシステム100で構成さ
れるものであり、当該システム100は、プリント基板
に実装されたIC101のリードフレーム102を検査
対象とする場合に、リードフレーム102に10KHz
の交流電流信号を供給する発信器103と、IC101
の上に絶縁体104を介して配置される導電性電極10
5と、この電極105に接続される電流計106と、こ
の電流計106を上記発信器103に接続させる共通信
号帰路107とを備えるものであり、好ましくは、電源
又は接地回路に接続するリードフレーム108を共通信
号帰路107に連結するようにしたものである。このシ
ステム100による半田付け良否検査は、発信器103
の電圧が、検査対象のリードフレーム102に印加され
ると、容量結合によって、電流が電極105を介して電
流計106に送られるので、この電流計106で測定さ
れる電流が、所定の限界内であれば、リードフレーム1
02の半田付けは良好であるとし、測定されない場合に
は、リードフレーム102の半田付けは不良であるとす
るものである。
2. Description of the Related Art When electronic components are mounted on a printed circuit board,
Usually, a lead frame of an electronic component is soldered to a predetermined printed wiring on a printed circuit board. However, recent IC
The number of leadframes has increased with the integration and functionality of such devices, and the pitch between leadframes has become extremely narrow. Inspections that do indeed have to be soldered are increasingly required to be simple, quick, but reliable. And such an inspection is a so-called in-circuit measurement,
That is, the process is performed in a state where the electronic components are mounted on the printed circuit board. Conventionally, this type of inspection method has been disclosed in
The one disclosed in US Pat.
This method is configured by a system 100 as shown in FIG. 6. When the lead frame 102 of the IC 101 mounted on a printed circuit board is to be inspected, the system 100
A transmitter 103 for supplying an alternating current signal of
Electrode 10 disposed on insulator 10 via insulator 104
5, an ammeter 106 connected to the electrode 105, and a common signal return path 107 connecting the ammeter 106 to the transmitter 103. Preferably, a lead frame connected to a power supply or a ground circuit is provided. 108 is connected to the common signal return path 107. The soldering quality inspection by the system 100 is performed by the transmitter 103
Is applied to the lead frame 102 to be inspected, the current is sent to the ammeter 106 via the electrode 105 by capacitive coupling, so that the current measured by the ammeter 106 falls within a predetermined limit. If so, lead frame 1
It is assumed that the soldering of No. 02 is good, and if no measurement is made, the soldering of the lead frame 102 is bad.

【0003】[0003]

【発明が解決しようとする課題】この種の従来方法は、
検査対象のICに配置された電極とそのリードフレー
ム、正確には、このリードフレームに接続する当該IC
内部の導体との間が静電容量で結合されていることに着
眼し、この容量結合を含む閉回路に低周波数の発信器を
挿入し、当該閉回路を流れる電流によって当該リードフ
レームの半田付け良否検査を行うものである。本発明に
おいても、所定の閉回路を構成し、そこに流れる電流を
測定することによって上記検査を行うのであるが、従来
方法と異なって、磁界の変化に基づく誘導電流を所定の
閉回路に流し、それに基づく電流を測定することによっ
て上記検査を行うものであるために、検査対象のIC上
に配設される図6のような絶縁体の厚みを十分薄くして
上記静電容量値を確保することは必要とせず、しかも、
上述した従来方法では当該検査が不可能であった電子部
品、例えばソケット、リレーなどの各種デバイスに対し
ても可能とするものである。
A conventional method of this kind is as follows.
Electrodes placed on the IC to be inspected and their lead frames, more precisely, the ICs connected to this lead frame
Focusing on the fact that the internal conductors are coupled by capacitance, insert a low-frequency oscillator into a closed circuit that includes this capacitive coupling, and solder the lead frame with the current that flows through the closed circuit. A pass / fail inspection is performed. Also in the present invention, the above inspection is performed by forming a predetermined closed circuit and measuring the current flowing therethrough.However, unlike the conventional method, an induced current based on a change in the magnetic field is supplied to the predetermined closed circuit. In order to perform the above-mentioned inspection by measuring the current based on the above, the thickness of the insulator provided on the IC to be inspected as shown in FIG. Does not need to be
With the above-described conventional method, the present invention can be applied to various devices such as sockets and relays, which cannot be inspected.

【0004】本発明の目的は、プリント基板に実装され
る電子部品の半田付け良否を、簡便で速みやかに、しか
し、確実に行える基板検査方法を提供することにある。
また、本発明の目的は、プリント基板に実装される電子
部品の半田付け良否を簡便で安価にできる基板検査装置
を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a board inspection method capable of easily, quickly, but surely determining whether or not an electronic component mounted on a printed board is good or bad.
Another object of the present invention is to provide a board inspection apparatus that can easily and inexpensively determine the quality of soldering of electronic components mounted on a printed board.

【0005】[0005]

【課題を解決するための手段】上記課題を解決するため
に、本発明の基板検査方法は、プリント基板に実装され
るICやLSI、或いは、ソケット、リレー等の電子部
品について、これら電子部品のリードフレームの、上記
プリント基板の所定プリント配線に対する半田付け良否
を検査する場合に、電子部品の表面に載置された磁気誘
導部材内に回転磁界を生成し、かかる回転磁界が電子部
品のリードフレーム、及びこのリードフレームと電子部
品内のICチップとを結ぶボンディングワイヤを横切る
ようにすると、リードフレーム及びボンディングワイヤ
に誘導電流が生じ、この誘導電流がICチップに流れる
ようになるので、検査対象のリードフレームとこれ以外
の全てのリードフレームが結線された共通導線との間に
流れる電流を測定することによって、検査対象のリード
フレームに対する半田付け良否を検査できるようにした
ものであり、簡便で安価に実現できる。本方法は、電流
を測定することによって半田付け良否を検査するように
しており、例えば、電子部品と当該方法を実現する基板
検査装置との間のインピーダンスや静電容量の影響、或
いは電子部品におけるリードフレーム間のインピーダン
スや静電容量の影響を受け難く、したがって、ノイズな
どの影響を受け難いので安定して検査を行うことができ
る。
In order to solve the above-mentioned problems, a board inspection method according to the present invention relates to an IC or an LSI mounted on a printed circuit board or an electronic component such as a socket or a relay. When inspecting the quality of the soldering of the lead frame to the predetermined printed wiring of the printed circuit board, a rotating magnetic field is generated in a magnetic induction member mounted on the surface of the electronic component, and the rotating magnetic field generates the rotating magnetic field. When the lead frame and the bonding wire connecting the IC chip in the electronic component are crossed, an induced current is generated in the lead frame and the bonding wire, and the induced current flows through the IC chip. Measures the current flowing between the lead frame and the common conductor to which all other lead frames are connected By Rukoto, which has to be able to inspect the soldering quality for the lead frame to be inspected it can be simple and low cost. This method is to inspect the soldering quality by measuring the current, for example, the influence of the impedance and capacitance between the electronic component and the board inspection apparatus that implements the method, or in the electronic component The test is hardly affected by the impedance and the capacitance between the lead frames, and is therefore hardly affected by noise and the like, so that the inspection can be stably performed.

【0006】とりわけ、本方法の優れているところは、
ICやLSIの電子部品については、検査対象のリード
フレーム、電子部品内のICチップ、及び共通導線間に
おいては少なくとも一つの閉回路が形成されることに着
眼してなされ、また、ソケットやリレーなどの電子部品
については、このような電子部品もリードフレームによ
ってプリント基板に実装されており、したがって、リー
ドフレーム間には浮遊容量が存在しており、リードフレ
ーム間が高周波的に接続される状態になることに着眼し
てなされているために、上記回転磁界の周波数を適宜選
択すれば、プリント基板に実装される全ての電子部品に
係る半田付け良否が判別できることである。ところで、
この方法は、検査装置の、例えばプローブをリードフレ
ームに直接接触させて半田付け良否を行うものでないた
め、リードフレームが電子部品の周辺に突設される、所
謂QFPやTAB方式のICパッケージのものに限ら
ず、パッケージの底部にエリアアレイ状に配列した、所
謂BGAやCSP方式のものについても適用できること
はもちろんである。
[0006] In particular, the advantages of this method are:
For electronic components such as ICs and LSIs, attention is paid to the fact that at least one closed circuit is formed between a lead frame to be inspected, an IC chip in the electronic component, and a common conductor, and a socket or a relay. For such electronic components, such electronic components are also mounted on a printed circuit board by a lead frame, and therefore, there is a stray capacitance between the lead frames, and a state is established in which the lead frames are connected at a high frequency. Since the focus is on the fact that it is possible, by appropriately selecting the frequency of the rotating magnetic field, it is possible to determine the quality of soldering of all the electronic components mounted on the printed circuit board. by the way,
This method does not use a testing device, for example, a probe directly in contact with a lead frame to determine the quality of soldering. Therefore, a so-called QFP or TAB type IC package in which the lead frame protrudes around the electronic component. However, it is needless to say that the present invention can be applied to a so-called BGA or CSP type device arranged in an area array at the bottom of the package.

【0007】また、本発明の基板検査装置は、プリント
基板に実装される電子部品について、この電子部品のリ
ードフレームの、上記プリント基板の所定プリント配線
に対する半田付け良否を検査する装置で、電子部品の表
面に載置する導磁用ヨークと、この導磁用ヨークに配設
され、電子部品の表面上に回転磁界を生成するための、
例えば交流電流が供給される巻線コイルと、検査対象の
リードフレーム以外の全てのリードフレームが結線され
た共通導線と、この共通導線と検査対象のリードフレー
ムとの間に配設される電流測定計とを備えてなるもので
あり、簡便で安価な装置である。上記導磁用ヨークは、
フェライト、場合により珪素鋼板などで構成され、これ
に巻線コイルを配設する。巻線コイルを配設する際に
は、例えば、全コイル導線を4等分し、対向するコイル
を直列にそれぞれ接続して所謂二相巻線としたり、全コ
イル導線を6等分し、対向するコイルを直列にそれぞれ
接続して所謂三相巻線としたりすればよく、また、直列
接続でなく並列接続であってもよい。そして、二相巻線
の場合には、所定周波数で90度位相のずれた交流電流
を供給し、また、三相巻線の場合には、所定周波数で1
20度位相のずれた交流電流を供給すると、電子部品の
表面上に回転磁界が生成される。しかるに、当該回転磁
界については、電子部品内のICチップに大きな誘導電
流が流れないように、また、リードフレームに誘導電流
に基づく大きな力が加わらないように比較的弱く生成さ
れるようにするのが好ましく、したがって、電流測定計
は、高感度のものを使用することが好ましい。
A board inspection apparatus according to the present invention is an apparatus for inspecting whether or not an electronic component mounted on a printed circuit board is soldered to a predetermined printed wiring of the printed circuit board. A magnetic yoke placed on the surface of the electronic component, and a yoke for generating a rotating magnetic field on the surface of the electronic component, disposed on the magnetic yoke,
For example, a winding coil to which an alternating current is supplied, a common conductor to which all lead frames other than the lead frame to be inspected are connected, and a current measurement disposed between the common conductor and the lead frame to be inspected. This is a simple and inexpensive device. The magnetic yoke is
It is made of ferrite, and in some cases silicon steel plate, etc., on which the winding coil is arranged. When arranging the winding coil, for example, all coil conductors are divided into four equal parts, and the opposing coils are connected in series to form a so-called two-phase winding, or all coil conductors are divided into six equal parts, The coils to be connected may be connected in series to form a so-called three-phase winding, or may be connected in parallel instead of in series. In the case of a two-phase winding, an alternating current with a phase shift of 90 degrees is supplied at a predetermined frequency.
When an alternating current having a phase shift of 20 degrees is supplied, a rotating magnetic field is generated on the surface of the electronic component. However, the rotating magnetic field should be generated relatively weakly so that a large induced current does not flow through the IC chip in the electronic component and a large force based on the induced current is not applied to the lead frame. Therefore, it is preferable to use a high-sensitivity ammeter.

【0008】上記電流測定計は、具体的には、検査対象
のリードフレームとの接続ポイントをイマジナリ・ショ
ート状態にさせてなる、OPアンプを使用した所謂電流
ー電圧変換回路で構成されるものが好ましく、場合によ
っては、電荷ー電圧変換回路(チャージ・アンプ)であ
ってもよく、微小レベルの信号検出に最適である。接続
ポイントをイマジナリ・ショート状態にさせると、外部
回路の影響を無視できるので、当該検査の安定性や正確
性が向上する。
[0008] The above-mentioned current meter is specifically constituted by a so-called current-voltage conversion circuit using an OP amplifier in which a connection point with a lead frame to be inspected is in an imaginary short state. Preferably, in some cases, a charge-voltage conversion circuit (charge amplifier) may be used, which is most suitable for detecting a signal at a minute level. When the connection point is in the imaginary short state, the influence of the external circuit can be neglected, so that the stability and accuracy of the test can be improved.

【0009】[0009]

【発明の実施の形態】本発明の実施の形態に係る基板検
査方法及びそれを実現する装置1の一例を図面を参照し
て説明する。電子部品2は、図1のように、そのリード
フレーム2a等を半田付けすることによってプリント基
板(図示せず)に実装される。本装置1は、上記リード
フレーム2a等の半田付け良否を検査するもので、電子
部品2の表面に載置される導磁用ヨーク(磁気誘導部
材)3と、この導磁用ヨーク3に配設され、電子部品2
の表面上に回転磁界を生成するための交流電流が供給さ
れる巻線コイル(磁気誘導部材)4と、検査対象のリー
ドフレーム2a以外の全てのリードフレーム2b,2c
・・・が結線された共通導線5と、この共通導線5とリ
ードフレーム2aとの間に配設される電流測定計6とを
備えている(図2及び5)。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An example of a substrate inspection method and an apparatus 1 for realizing the same according to an embodiment of the present invention will be described with reference to the drawings. The electronic component 2 is mounted on a printed circuit board (not shown) by soldering the lead frame 2a and the like as shown in FIG. This device 1 is for inspecting the quality of soldering of the lead frame 2a and the like, and includes a yoke for magnetic conduction (magnetic induction member) 3 mounted on the surface of the electronic component 2, and a yoke 3 for the magnetic conduction. Electronic components 2
And a winding coil (magnetic induction member) 4 to which an alternating current for generating a rotating magnetic field is supplied on the surface of the lead frame 2b, 2c except for the lead frame 2a to be inspected.
Are connected, and a current meter 6 disposed between the common conductor 5 and the lead frame 2a (FIGS. 2 and 5).

【0010】上記導磁用ヨーク3は、フェライト、場合
により珪素鋼板などを材質とする4角形の平板で、且
つ、その各辺縁に凸部3a〜3dがそれぞれ設けられ、
そして、この凸部3a〜3dが電子部品2の表面に当接
して、導磁用ヨーク3が電子部品2の表面全体を覆うよ
うに載置される(図1及び2)。かかる導磁用ヨーク3
には、図2に示すように、その凸部3a〜3dの所定位
置に巻線コイル4が巻回される。即ち、本実施の形態で
は、対向する凸部3a及び3cに巻回されるコイル4a
を直列に接続し、また、対向する凸部3b及び3dに巻
回されるコイル4bを直列に接続して二相巻線としてい
る。このようなコイル4aとコイル4bとに90度位相
のずれた所定周波数の交流電流が供給される。
The magnetic guiding yoke 3 is a quadrangular flat plate made of ferrite, and in some cases, a silicon steel plate or the like, and is provided with projections 3a to 3d on each side thereof.
Then, the projections 3a to 3d come into contact with the surface of the electronic component 2, and the magnetic yoke 3 is placed so as to cover the entire surface of the electronic component 2 (FIGS. 1 and 2). Such yoke 3 for magnetic conduction
As shown in FIG. 2, the winding coil 4 is wound at predetermined positions of the projections 3a to 3d. That is, in the present embodiment, the coil 4a wound around the facing convex portions 3a and 3c
Are connected in series, and the coil 4b wound around the facing protrusions 3b and 3d is connected in series to form a two-phase winding. An alternating current having a predetermined frequency shifted by 90 degrees is supplied to the coil 4a and the coil 4b.

【0011】図3は、上述したような90度位相のずれ
た交流電流をコイル4a及びコイル4bにそれぞれ流し
た場合に生ずる磁界、並びに、それらによる合成磁界の
模式図を示したもので、かかる合成磁界は、コイル4a
及びコイル4bに流す電流を適宜選ぶと、各瞬時にはそ
の大きさが等しく、その方向が一定方向に回転する回転
磁界となる。このような回転磁界は、電子部品2の表面
の極近傍において、当該電子部品2に電磁的に作用す
る。即ち、当該回転磁界は、電子部品2のリードフレー
ム2a等、及びこのリードフレーム2a等と電子部品2
内のICチップとを結ぶボンディングワイヤ7とを横切
ることになり(図4)、したがって、リードフレーム2
a等及びボンディングワイヤ7に生じた誘導電流が、電
子部品2内のICチップに流れるようにできる。
FIG. 3 is a schematic diagram of a magnetic field generated when an alternating current having a phase shift of 90 degrees as described above is applied to the coils 4a and 4b, respectively, and a composite magnetic field formed by the magnetic fields. The combined magnetic field is the coil 4a
When a current flowing through the coil 4b is appropriately selected, the magnitude becomes equal at each moment, and the direction becomes a rotating magnetic field that rotates in a fixed direction. Such a rotating magnetic field electromagnetically acts on the electronic component 2 in the extremely vicinity of the surface of the electronic component 2. That is, the rotating magnetic field is applied to the lead frame 2a and the like of the electronic component 2 and the lead frame 2a and the like to the electronic component 2 and the like.
(FIG. 4).
a and the induced current generated in the bonding wire 7 can flow through the IC chip in the electronic component 2.

【0012】図5は、上述した誘導電流に基づき、検査
対象であるリードフレーム2aの半田付け良否を検査す
るための回路構成図であり、上記共通導線5及び電流測
定計6は、同図のように結線される。即ち、検査対象の
リードフレーム2a以外の全てのリードフレーム2b,
2c・・・を共通導線5に結線して短絡させ、この共通
導線5を電流測定計6の接地点に結線するとともに、リ
ードフレーム2aを電流測定計6の入力端子(後述のよ
うなOPアンプを使用する場合、反転入力端子)に接続
させる。かかる電流測定計6は、同図に示すように、リ
ードフレーム2aとの接続ポイントをイマジナリ・ショ
ート状態にさせてなる、OPアンプを使用した電流ー電
圧変換回路で構成されるもので、このような回路を使用
すると、外部回路の影響を無視でき、当該検査の安定性
や正確性が向上する。
FIG. 5 is a circuit configuration diagram for inspecting the quality of the soldering of the lead frame 2a to be inspected based on the above-described induced current. The common conductor 5 and the current meter 6 are shown in FIG. Are connected as follows. That is, all the lead frames 2b, except the lead frame 2a to be inspected,
Are connected to the common conductor 5 and short-circuited. The common conductor 5 is connected to the ground point of the ammeter 6, and the lead frame 2a is connected to the input terminal of the ammeter 6 (an OP amplifier described later). When using, connect it to the inverted input terminal). As shown in the figure, such a current meter 6 is configured by a current-voltage conversion circuit using an OP amplifier in which a connection point with a lead frame 2a is imaginarily short-circuited. If a simple circuit is used, the influence of the external circuit can be neglected, and the stability and accuracy of the inspection can be improved.

【0013】次に、本装置1を用いて半田付け良否を検
査する場合の検査態様を、図4,5を参照しつつ説明す
る。検査対象をリードフレーム2aとする場合に、最初
に、リードフレーム2aとリードフレーム2b,2c・
・・が結線された共通導線5とを電流測定計6を介して
結線し、電子部品2内のICチップとの間で閉回路を形
成するとともに、導磁用ヨーク3を電子部品2の表面に
当接させる。しかる後、導磁用ヨーク3のコイル4aと
コイル4bとに90度位相のずれた所定周波数の交流電
流をそれぞれ供給する。すると、当該交流電流に基づく
回転磁界がリードフレーム2a等及びボンディングワイ
ヤ7を横切るので、上記閉回路に誘導電流が流れる。こ
の閉回路に流れる電流のうち、電流測定計6を流れる電
流を測定して、所定の電流値、例えば1μAを越えてい
れば、リードフレーム2aにおける半田付けは良好であ
るとし、1μA以下であれば、リードフレーム2aにお
ける半田付けは不良であるとする。尚、かかる電流計6
では、実際には、入力電流値に応じた出力電圧値として
測定される。このようにしてリードフレーム2aに対す
る半田付け良否の検査が終了すると、次に、リードフレ
ーム2bについて同様に検査を行い、以下、リードフレ
ーム2c・・・について同様に検査を行って、当該電子
部品2についての半田付け良否に係る検査が完了する。
Next, a description will be given, with reference to FIGS. 4 and 5, of an inspection mode for inspecting the quality of soldering using the present apparatus 1. FIG. When the inspection target is the lead frame 2a, first, the lead frame 2a and the lead frames 2b, 2c.
.. Are connected via the ammeter 6 to the common conductor 5 to form a closed circuit with the IC chip in the electronic component 2, and the yoke 3 for magnetic conduction is connected to the surface of the electronic component 2. Contact. Thereafter, an alternating current having a predetermined frequency shifted by 90 degrees is supplied to the coils 4a and 4b of the yoke 3 for magnetic conduction. Then, a rotating magnetic field based on the alternating current crosses the lead frame 2a and the like and the bonding wires 7, so that an induced current flows through the closed circuit. Among the currents flowing through the closed circuit, the current flowing through the ammeter 6 is measured. If the current exceeds a predetermined current value, for example, 1 μA, the soldering in the lead frame 2a is determined to be good, and if it is 1 μA or less. For example, it is assumed that the soldering of the lead frame 2a is defective. In addition, such an ammeter 6
Then, actually, it is measured as an output voltage value corresponding to the input current value. When the inspection of the quality of the soldering of the lead frame 2a is completed in this manner, the inspection of the lead frame 2b is performed in the same manner, and the inspection of the lead frame 2c. The inspection related to the quality of the soldering is completed.

【0014】[0014]

【発明の効果】本発明の基板検査方法によれば、プリン
ト基板に実装される電子部品の半田付け良否を、簡便で
速みやかに、しかし、確実に行うことができる。また、
本発明の基板検査装置によれば、プリント基板に実装さ
れる電子部品の半田付け良否を簡便で安価にできる。
According to the board inspection method of the present invention, the quality of soldering of electronic components mounted on a printed circuit board can be easily, promptly, but surely determined. Also,
ADVANTAGE OF THE INVENTION According to the board | substrate inspection apparatus of this invention, the quality of the soldering of the electronic component mounted on a printed circuit board can be made simple and cheap.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の実施の形態に係る基板検査装置を用
いて電子部品の半田付け検査態様を示す斜視図である。
FIG. 1 is a perspective view showing a soldering inspection mode of an electronic component using a board inspection apparatus according to an embodiment of the present invention.

【図2】 本装置の磁気誘導部材の構成を示す外観斜視
図である。
FIG. 2 is an external perspective view showing a configuration of a magnetic guiding member of the present apparatus.

【図3】 図2の磁気誘導部材によって形成される磁界
の説明図である。
FIG. 3 is an explanatory diagram of a magnetic field formed by the magnetic guiding member of FIG. 2;

【図4】 測定対象の電子部品に作用する回転磁界及び
当該電子部品に生ずる誘導電流の説明図である。
FIG. 4 is an explanatory diagram of a rotating magnetic field acting on an electronic component to be measured and an induced current generated in the electronic component.

【図5】 半田付け良否を検査するための回路構成図で
ある。
FIG. 5 is a circuit configuration diagram for inspecting the quality of soldering.

【図6】 従来の基板検査装置に係る半田付け良否を検
査するための回路構成図である。
FIG. 6 is a circuit configuration diagram for inspecting soldering quality according to a conventional board inspection apparatus.

【符号の説明】[Explanation of symbols]

1 基板検査装置 2 電子部品 2a,2b,2c・・・ リードフレーム 3 導磁用ヨーク(磁気誘導部
材) 4 巻線コイル(磁気誘導部
材) 5 共通導線 6 電流測定計 7 ボンディングワイヤ
DESCRIPTION OF SYMBOLS 1 Board inspection apparatus 2 Electronic component 2a, 2b, 2c ... Lead frame 3 Yoke for magnetic conduction (magnetic induction member) 4 Winding coil (magnetic induction member) 5 Common conductor 6 Current measuring meter 7 Bonding wire

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 プリント基板に実装される電子部品につ
いて、該電子部品のリードフレームの、前記プリント基
板の所定プリント配線に対する半田付け良否を検査する
基板検査方法において、前記電子部品の表面に載置され
た磁気誘導部材内に回転磁界を生成し、該回転磁界が前
記リードフレーム及び該リードフレームと前記電子部品
内のICチップとを結ぶボンディングワイヤを横切るこ
とによって生ずる誘導電流について、検査対象の前記リ
ードフレームとこれ以外の全てのリードフレームが結線
された共通導線との間に流れる前記誘導電流を測定する
ことによって、前記リードフレームの半田付け良否を検
査することを特徴とする基板検査方法。
In a board inspection method for inspecting whether or not a lead frame of the electronic component is soldered to a predetermined printed wiring of the printed board, the electronic component mounted on the printed board is mounted on a surface of the electronic component. A rotating magnetic field is generated in the magnetic induction member, and the rotating magnetic field traverses the lead frame and a bonding wire connecting the lead frame and an IC chip in the electronic component. A board inspection method for inspecting soldering quality of the lead frame by measuring the induced current flowing between a lead frame and a common conductor to which all other lead frames are connected.
【請求項2】 プリント基板に実装される電子部品につ
いて、該電子部品のリードフレームの、前記プリント基
板の所定プリント配線に対する半田付け良否を検査する
基板検査装置において、前記電子部品の表面に載置する
導磁用ヨークと、該導磁用ヨークに配設され、前記表面
上に回転磁界を生成するための電流が供給される巻線コ
イルと、検査対象の前記リードフレーム以外の全てのリ
ードフレームが結線された共通導線と、該共通導線と前
記検査対象のリードフレームとの間に配設される電流測
定計とを備えてなることを特徴とする基板検査装置。
2. An electronic component mounted on a printed circuit board, wherein the lead frame of the electronic component is mounted on a surface of the electronic component in a board inspection apparatus for inspecting whether or not soldering of a lead frame of the electronic component to predetermined printed wiring of the printed circuit board is good. And a winding coil disposed on the magnetizing yoke and supplied with a current for generating a rotating magnetic field on the surface, and all lead frames other than the lead frame to be inspected. A board inspection apparatus, comprising: a common conductor connected to the lead frame; and a current meter disposed between the common conductor and the lead frame to be inspected.
【請求項3】 前記電流測定計は、検査対象の前記リー
ドフレームとの接続ポイントをイマジナリ・ショート状
態にさせてなることを特徴とする請求項2に記載の基板
検査装置。
3. The substrate inspection apparatus according to claim 2, wherein the ammeter is configured so that a connection point with the lead frame to be inspected is in an imaginary short state.
JP10189538A 1998-07-06 1998-07-06 Method and equipment for inspecting board Pending JP2000019212A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10189538A JP2000019212A (en) 1998-07-06 1998-07-06 Method and equipment for inspecting board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10189538A JP2000019212A (en) 1998-07-06 1998-07-06 Method and equipment for inspecting board

Publications (1)

Publication Number Publication Date
JP2000019212A true JP2000019212A (en) 2000-01-21

Family

ID=16242994

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10189538A Pending JP2000019212A (en) 1998-07-06 1998-07-06 Method and equipment for inspecting board

Country Status (1)

Country Link
JP (1) JP2000019212A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006250608A (en) * 2005-03-09 2006-09-21 Hioki Ee Corp Circuit board inspection method and device therefor
CN104635141A (en) * 2015-01-30 2015-05-20 华为技术有限公司 Integrated circuit detection method, device and system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006250608A (en) * 2005-03-09 2006-09-21 Hioki Ee Corp Circuit board inspection method and device therefor
CN104635141A (en) * 2015-01-30 2015-05-20 华为技术有限公司 Integrated circuit detection method, device and system
WO2016119755A1 (en) * 2015-01-30 2016-08-04 华为技术有限公司 Integrated circuit measurement method, device, and system
CN104635141B (en) * 2015-01-30 2018-07-03 华为技术有限公司 A kind of integrated circuit detection method, apparatus and system
US10466297B2 (en) 2015-01-30 2019-11-05 Huawei Technologies Co., Ltd. Detection points of a printed circuit board to determine electrical parameter of an integrated circuit

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