JP2000012367A - Electronic chip component and manufacture of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve mounting density while maintaining the connection quality of electronic chip component mounted on a mounting substrate by soldering. SOLUTION: A notched recessed part 2 is formed at the side edge part of an insulating block 1 incorporating an element, and an external electrode 3a is mounted so that at least the inner wall face of the recessed part 2 can be coated. This outside electrode 3a is electrically connected through a solder fillet 13 with a land 12 on a mounting substrate 11, and the position of the outside edge E of the solder fillet 13 is substantially housed within the outside dimension of the insulating block 1. Therefore, an inter-part distance G1 can be made close to or smaller than a safe distance G2 necessary for preventing short-circuit between the adjacent solder fillet 13. Thus, mounting density can be improved, and connection quality can be maintained by making it unnecessary to reduce the quantity of the solder fillet 13.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic chip component mounted on a mounting board by soldering, and a method of manufacturing the same. More particularly, the present invention relates to a component structure capable of improving a mounting density without causing a connection failure and a simple structure thereof. Manufacturing method.

[0002]

2. Description of the Related Art In order to further reduce the size, weight, and performance of electronic devices, it is important to improve the component mounting density on a mounting board. As one of such components, an electronic chip component c having a size of several mm square as shown in FIG. 16 is frequently used. The electronic chip component c has a built-in element inside the insulator block 21, and an external electrode 22 is attached to a side end thereof. The illustrated example is a two-terminal element, and therefore, a pair of external electrodes 22 are formed at opposing side ends of a rectangular insulator block 21. FIG. 17 shows a mounting state of the electronic chip component c.
The external electrode 22 of this electronic chip component c is
For the land 32 previously formed in a predetermined pattern,
It is electrically connected through the solder fillet 33.

FIG. 1 shows an example of such an electronic chip component.
8 and FIG. 19 show the multilayer capacitor 25. The multilayer capacitor 25 is composed of a laminate in which four layers of internal electrode patterns are interposed at each interface of five layers of insulating ceramic green sheets (hereinafter, referred to as green sheets). The uppermost third green sheet 23c is a layer having no internal electrode pattern.
The two layers of the first green sheet 23a having the internal electrode pattern 24a and the two layers of the second green sheet 23b having the second internal electrode pattern 24b are alternately laminated. At the time of actual manufacturing, these first and second internal electrode patterns 24a and 24b are respectively formed with large-area first and second green sheets 23a and 23b.
A plurality of multilayer capacitors 25 are collectively manufactured by dividing these green sheet laminates along a predetermined dividing line.

FIG. 19 is a view showing a completed product in which the above-mentioned multilayer capacitor 25 is fired and then external electrodes 28 are formed.
(A) is a state in which external electrodes 28 are attached to both end portions,
(B) is the CC sectional view taken on the line. As is apparent from these drawings, the first internal electrode pattern 24a
And the second internal electrode pattern 24b are led out to the opposite side ends, and have an equivalent circuit configuration equivalent to a parallel connection of three capacitors. In addition, the external electrode 28 is formed of Ni that directly covers both end portions.
It has a two-layer structure of a layer 26 and a solder plating layer 27 covering the layer 26.

[0005]

However, in the conventional electronic chip components, there is a limit in improving the mounting density on the mounting substrate. This is related to the fact that the solder fillet 33 protrudes outside the outer dimensions of the electronic chip component c as shown in FIG. 17 described above. In consideration of a margin for misalignment of the electronic chip component c with the land 32 and a variation in the amount of solder, in order to prevent a short circuit between the adjacent electronic chip components c, it is necessary to set a gap between the outer edges e of the adjacent solder fillets 33. It is necessary to secure the minimum safe distance g2. Therefore, the inter-chip distance g1 between the adjacent electronic chip components c is necessarily larger than the safe distance g2, and it is difficult to increase the mounting density.

It is not advisable to reduce the inter-chip distance g1 by reducing the protruding length of the solder fillet 33, that is, by reducing the amount of solder used. This is because the connection failure between the land 32 and the external electrode 22 is likely to be serious, and even if the mounting density can be improved, the product yield is reduced, and no advantage can be obtained. Therefore, an object of the present invention is to provide an electronic chip component capable of improving the mounting density without causing a connection failure due to a shortage of solder fillet, and a simple manufacturing method thereof.

[0007]

The inventor of the present invention has conducted intensive studies in order to achieve the above-mentioned object. As a result, a notch-shaped concave portion is provided at a side end of the electronic chip component, and a solder corner is formed in this concave portion. By accommodating most of the meat and substantially eliminating the protrusion of the solder fillet beyond the outer dimensions of the electronic chip component, the above-described component distance g1 and the safety distance g2 can be made almost equal, It has been found that the mounting density can be improved without causing a connection failure. The electronic chip component of the present invention is proposed based on such knowledge, and a notch-shaped concave portion is provided at a side end of an insulator block having a built-in element, and covers at least an inner wall surface of the concave portion. The external electrode is attached as described above, and the concave portion is formed to have a size such that the outer edge position of the solder fillet on the land can be substantially contained within the outer dimensions of the insulator block.

In the process of dividing a large-sized substrate and manufacturing a large number of electronic chip components at once,
It can be formed by periodically arranging through-holes in a large-area insulating substrate having a plurality of two-dimensionally arrayed elements and dividing the through-holes. At this time, it is important to set the size of the first through hole so that the concave portion has a size that can substantially fit the outer edge position of the solder fillet on the land within the outer dimensions of the insulator block. It is.

[0009]

FIG. 1 is a conceptual diagram of an electronic chip component of the present invention. The electronic chip component C has an insulator block 1 having a built-in two-terminal element as a main body. The insulator block 1 is formed by cutting a pair of opposing side ends of a rectangular parallelepiped into a rectangular shape. And an external electrode is formed so as to cover at least the inner wall surface of the concave portion 2. Here, FIG. 1A shows an electronic chip component C1 having an external electrode 3a attached only to the inner wall surface of the concave portion 2, and FIG. Each of them represents an electronic chip component C2 having an external electrode 3b extended inside.

FIG. 2 shows a mounting state of the electronic chip component C1 shown in FIG. The external electrodes 22 of the electronic chip component C1 are electrically connected to the lands 12 formed in a predetermined pattern on the mounting board 11 through the solder fillets 13. The solder fillet 13 is in contact with the external electrode 3a inside the concave portion 2, and the position of the outer edge E is substantially within the outer dimensions of the insulator block. Note that the expression “substantially fits” in the present specification may be such that the outer edge E of the solder fillet 13 protrudes from the outer dimensions of the insulator block 1 as long as it can be ignored. Means that.

Here, between the outer edge E of the adjacent solder fillet 13, the electronic chip component C
It is necessary to secure the safety distance G2 in consideration of the margin for the misalignment of 1 and the variation in the amount of solder. However, according to the present invention, most of the solder fillet that has protruded from the outside of the insulator block in the conventional electronic chip component is absorbed by the concave portion. The distance G1 can be reduced to be equal to the safety distance G2. If the retreat amount of the recess 2 from the outer dimensions of the insulator block 1 is set to be large, the distance G1 between the components can be smaller than the safe distance G2. Moreover, there is no need to reduce the volume of the solder fillet. Thus, according to the electronic chip component of the present invention, it is possible to improve the mounting density of the electronic chip component without causing a connection failure.

The electronic chip component C shown in FIG.
2 is similarly mounted, since the external electrodes 3b extend also on the upper and lower surfaces of the insulator block 1, the contact area between the external electrodes 3b and the solder fillets 13 increases,
This has the effect of reducing the connection resistance.

By the way, the shape of the notch-shaped concave portion formed in the electronic chip component of the present invention is not limited to the above-described rectangular shape, and the formed portion is not limited to only one pair at the opposite side end. . FIG. 3 shows formation patterns of various concave portions. These drawings are top views of the insulator block 1, and the bold-lined portions inside the concave portions indicate the portions where external electrodes are formed. 3 (a) shows a pair of rectangular recesses 4a at adjacent side edges, FIG. 3 (b) shows a pair of triangular recesses 4b at opposite side edges, and FIG. 3 (c) shows opposite side edges. 5 shows an electronic chip component having a pair of semicircular concave portions 4c formed in a portion. 3 (a) to 3 (c) show a case where a two-terminal element is incorporated.

On the other hand, FIG. 3 (d) shows two rectangular recesses 4d at opposite side ends, and FIG. 3 (e) shows two pairs of semicircular recesses 4e at opposite side ends. FIG. 3F shows an electronic chip component in which one rectangular recess 4f is formed at each side end. 3 (e) to 3 (f) may have two pairs of two-terminal elements or may have one four-terminal element. Examples of the four-terminal element include a multiple coil, an LC built-in filter, a multiple capacitor for preventing electromagnetic interference, and a multiple resistor. In particular, the electronic chip component shown in FIG. 3F can improve the mounting density in both the X direction and the Y direction. 3A to 3F show only a few examples of the concave portions, and the combination of the shape of each concave portion and the formation site is arbitrary. In addition, there are three or more pairs of external electrode elements built-in, and as shown in FIG. 1B, the external electrodes extend around the concave portion and on the upper and lower surfaces of the insulator block. You may.

Next, as an example of a method of manufacturing an electronic chip component of the present invention, a manufacturing process of a multilayer capacitor will be described with reference to FIGS. First, as shown in FIG. 4, five green sheets are aligned. Here, the uppermost third green sheet 5c is a layer having no internal electrode pattern, but below this, the two layers of the first green sheet 5a having the first internal electrode pattern 6a , The second internal electrode pattern 6b
Are alternately stacked with two layers of second green sheets 5b. The first and second internal electrode patterns 6a and 6b are, for example, Ni vapor-deposited films, and are two-dimensionally arranged on the first and second green sheets 5a and 5b, respectively. However, in the first and second internal electrode patterns 6a, the repetition periods of the respective patterns in the longitudinal direction are shifted from each other, and different internal electrode patterns are exposed inside the concave portions at both end portions of the final multilayer capacitor. It has been made like that. The shape, arrangement, and number of the internal electrode patterns, and the number of stacked green sheets can be arbitrarily changed.

FIG. 5 shows a laminated body 5 obtained by laminating these five green sheets 5c, 5a, 5b, 5a, 5b. Next, as shown in FIG. 6, a punching process using a die is performed to form the through holes 2a at a predetermined repetition cycle. Although the laminated body 5 is divided along each of the A1-A1 dividing line, the A2-A2 dividing line, and the BB dividing line in the drawing, a plurality of (here, nine) laminated capacitors are formed. A1-A1 dividing line, A2-A2
Since the dividing line crosses the through hole 2a, the concave portions 2 are formed at both end portions of each of the divided multilayer capacitors. In addition, the concave portion 2 is formed at both ends of the laminated body 5 from the beginning without depending on the division. In FIG.
FIG. 2 shows an exploded perspective view of a punched laminate 5.

FIG. 8 shows the multilayer capacitor 7 obtained by the division. FIG. 8A is a perspective view of the multilayer capacitor 7,
FIG. 8B is an exploded perspective view thereof. FIG. 9 shows a state in which the external electrode 3 is applied to the concave portion 2 after firing the multilayer capacitor 7. This external electrode 3 is made of, for example, Ni
It is formed by depositing a layer 8 and a solder plating layer 9 in this order.

Here, the above-mentioned multilayer capacitor 7 was actually mounted as shown in FIG. The external dimensions of the multilayer capacitor 7 are 1.0 mm long × 0.5 mm wide × 0.5 mm high,
When the depth of the concave portion 2 is set to 0.2 mm, a sufficient connection reliability to the land 12 can be achieved with the solder fillet 13 in an amount corresponding to the inside of the concave portion 2, and the distance G1 between the components is reduced. It could be 0.2 mm. Incidentally, when a conventional multilayer capacitor having the same external dimensions is mounted as shown in FIG. 17 described above, it is necessary to secure 0.4 mm as a safety distance g2 between the outer edges e of the solder fillets 33. Therefore, the distance g1 between the components is 0.
A distance as large as 45 mm was required. This proves that the electronic chip component of the present invention is suitable for high packaging density. Further, since the divided cross section of the laminate 5 becomes the side end of the final electronic chip component as it is, and the entire side end is not covered with the external electrode as in the conventional case, the dimensional accuracy of the component is improved, The advantage that the mounting device can easily detect component dimensions and component positions is also obtained.

By the way, as a method of manufacturing a multilayer capacitor by a method having a smaller difference from the conventional process, the following alternative method is also possible. This method will be described with reference to FIGS. First, as shown in FIG. 10, five green sheets are aligned.
Here, the uppermost third green sheet 15c is a layer having no internal electrode pattern.
A two-layer first green sheet 15a having a first internal electrode pattern 16a;
b are alternately stacked with two layers of second green sheets 15b. The first and second internal electrode patterns 16a and 16b are different from the first and second internal electrode patterns 6a and 6b shown in FIG.
That is, the deposited film is formed continuously without avoiding the A1-A1 division line.

FIG. 11 shows a laminated body 15 obtained by laminating these five green sheets 15c, 15a, 15b, 15a, 15b. This laminate 15 is different from the above-described laminate 5 shown in FIG. 5 in that the end face of the internal electrode pattern is exposed at the side end. In the drawing, the first internal electrode pattern 16a is visible at the side end on the near side, but the second internal electrode pattern 16b is exposed at the opposite side (not shown). If the laminated body 15 is divided as it is, it becomes a laminated capacitor 25 as shown in FIG. 18 described above. In the present invention, the through holes 2a are formed by punching as shown in FIG. FIG. 13 shows an exploded perspective view of the punched laminate 15.

The multilayer capacitor 17 obtained by the division
Is shown in FIG. FIG. 14A is a perspective view of the multilayer capacitor 17, and FIG. 14B is an exploded perspective view thereof. FIG.
3 shows a state in which the multilayer capacitor 17 is fired, the external electrode 3 is applied to the concave portion 2, and the side end other than the concave portion 2 is covered with the insulating resist layer 10. The reason why the resist layer 10 is provided is that the first layer
This is for protecting the end faces of the second internal electrode patterns 16a and 16b. Note that this resist layer 10 has the above-mentioned FIG.
May be formed on the multilayer capacitor 7 as described above. In this case, the resist layer plays a role in more precisely defining the portion to which the external electrode 3 is to be attached.

[0022]

As is apparent from the above description, the electronic chip component of the present invention has, at its side end, a concave portion on which an external electrode is to be attached, and this concave portion defines the portion where the solder fillet is formed. It plays the role of retracting inward of the body. Therefore, it is possible to reduce the distance between components on the mounting board without reducing the amount of solder used, and it is possible to cope with a higher mounting density while maintaining connection quality. In the method of the present invention for manufacturing such an electronic chip component, through-holes are periodically arranged in a large-area insulating substrate containing a plurality of two-dimensionally arranged elements, and the through-holes are formed. By performing the substrate division at the crossing position, the above-mentioned concave portion can be easily formed with the batch production of a plurality of components. Regarding the number of steps, only a step of forming a through hole is added, and the manufacturing efficiency is extremely excellent.

[Brief description of the drawings]

FIG. 1 is a schematic perspective view of an electronic chip component of the present invention;
(A) is an example in which an external electrode is formed only inside the concave portion,
(B) shows an example in which an external electrode is also formed around the recess.

FIG. 2 is a schematic sectional view showing a mounted state of an electronic chip component of the present invention.

FIG. 3 is a top view showing formation patterns of various concave portions of the electronic chip component of the present invention.

FIG. 4 is a schematic perspective view showing an alignment state of a plurality of green sheets in a manufacturing process of the multilayer capacitor to which the present invention is applied.

5 is a schematic perspective view of a laminate obtained by laminating a plurality of green sheets of FIG.

6 is a schematic perspective view showing a state where a punching process has been performed on the laminate of FIG. 5;

FIG. 7 is an exploded perspective view of the laminated body of FIG. 6 that has been stamped.

8A and 8B are diagrams showing a multilayer capacitor obtained by dividing the multilayer body of FIG. 6, wherein FIG. 8A is a schematic perspective view and FIG. 8B is an exploded perspective view.

FIG. 9 is a schematic perspective view showing a state in which an external electrode is formed in a concave portion at a side end of the multilayer capacitor.

FIG. 10 is a schematic perspective view showing an alignment state of a plurality of green sheets in another manufacturing process of the multilayer capacitor to which the present invention is applied.

FIG. 11 is a schematic perspective view of a laminate obtained by laminating a plurality of green sheets of FIG.

FIG. 12 is a schematic perspective view showing a state where a punching process has been performed on the laminate of FIG. 11;

FIG. 13 is an exploded perspective view of the laminated body of FIG. 12 that has been stamped.

14A and 14B are diagrams showing a multilayer capacitor obtained by dividing the multilayer body of FIG. 11, wherein FIG. 14A is a schematic perspective view and FIG. 14B is an exploded perspective view.

15 is a schematic perspective view of a multilayer capacitor in which an external electrode is provided in a concave portion of FIG. 14 and a resist layer is provided at a side end other than the concave portion.

FIG. 16 is a schematic perspective view showing a conventional electronic chip component.

FIG. 17 is a schematic cross-sectional view showing a mounting state of a conventional electronic chip component.

FIG. 18 is a view showing a conventional multilayer capacitor;
(A) is a schematic perspective view, (b) is an exploded perspective view.

19A and 19B are diagrams showing a conventional multilayer capacitor in which external electrodes are formed, wherein FIG. 19A is a schematic perspective view, and FIG.
It is a C line sectional view.

[Explanation of symbols]

1. Insulator block 2, 4a, 4b, 4c, 4d, 4
e, 4f recess 2a through hole 3, 3a, 3b external electrode 5a, 15a first green sheet 5b, 15b second green sheet 5c, 15c
... Third green sheet 6a, 16a first internal electrode pattern 6b, 16b second internal electrode pattern 7, 17 multilayer capacitor 8 Ni layer 9 solder plating layer 10 resist layer 11 mounting substrate 12 ...
Land 13: Solder fillet C1, C2: Electronic chip component E: Outside edge G1: Distance between components G2: Safety distance

Claims (6)

[Claims] At least one pair of external electrodes is attached to a side end of an insulator block having a built-in element, and the external electrodes are electrically connected to lands of a mounting board via solder fillets. An electronic chip component, wherein the external electrode is applied so as to cover at least an inner wall surface of a notch-shaped recess provided at a side end of the insulator block, and the recess is formed on the land. An electronic chip component, wherein an outer edge position of the solder fillet is formed in a size that can be substantially accommodated within an outer dimension of the insulator block. 2. The electronic chip component according to claim 1, wherein the element is a capacitor, and the external electrode is connected to an internal electrode of the capacitor exposed on an inner wall surface of the recess. 3. The electronic chip component according to claim 1, wherein a surface other than the concave portion at a side end portion where the concave portion is formed is covered with a resist layer. 4. An insulating substrate incorporating a plurality of elements arranged two-dimensionally and having a plurality of through holes arranged periodically is divided along a dividing line crossing the through holes. Thereby, a first step of collectively forming a plurality of insulator blocks having a concave portion derived from the through hole at a side end portion, and an electrical connection between a land of the mounting board and a solder fillet. A second step of applying an external electrode so as to cover at least an inner wall surface of the concave portion, wherein the concave portion formed by dividing the through hole has a thickness corresponding to the solder fillet on the land. A size of the through hole is set so that an outer edge position of the through hole is substantially within an outer dimension of the insulator block. 5. The method according to claim 1, wherein the insulating substrate is provided in a first cycle at a first period.
A first unit substrate on which an internal electrode pattern is formed, and a second unit substrate on which a second internal electrode pattern is formed at a second period shifted from the first period. ,
Half of the plurality of through holes expose only the first internal wiring pattern on the inner wall surface, and the other half of the plurality of through holes
5. The method according to claim 4, wherein only the internal wiring pattern is formed so as to be exposed on the inner wall surface. 6. The method according to claim 1, wherein after the first step is completed, a side end of the insulator block other than the concave portion is covered with a resist layer, and the external electrode is formed in the second step. Item 5. The method for producing an electronic chip component according to Item 4.