JP2000009795A - Probe substrate for bare chip inspection - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a substrate capable of reducing a contact resistance by surely carrying out an electrical contact, even when a positional deviation between an inspection probe substrate and a semi-conductor chip occurs. SOLUTION: In a probe substrate for bare chip inspection which carries out a separation of a bare chip, a fine wiring pattern 4 is formed on a polyimide tape being a base at a position facing to an electrode pad of a semiconductor chip of an object to be inspected. Then, a projecting portion 8 comprising a plurality of small projections 8-1-8-13 dispersedly disposed in a connection range is provided at a position facing to the electrode pad on the fine wiring pattern 4. One of small projections 3-1-8-13 is positively brought into contact with the electrode pad, and since an oxidation film on the electrode pad is easily broken, sure connection and low contact resistance are obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a probe substrate for bare chip inspection, and more particularly to a probe substrate for bare chip inspection for inspecting the quality of a semiconductor chip in a single package without packaging.

[0002]

2. Description of the Related Art A printed circuit board on which a plurality of bare chips are mounted and which has not yet been packaged is referred to as an MCM.
(Multi chip module). With the development of electronic devices, the MCM has come to be positioned as an important technology for device development as an effective means for responding to essential needs of light and thin. However, the biggest technical problem is the quality guaranteed bare chip (KGD: known good).
die) This is a non-destructive inspection method for sorting, and for that purpose, development of an inspection probe substrate provided with a member that contacts the electrode pads of the semiconductor chip and ensures electrical conduction with the electrode pads. Is the point.

Conventionally, an inspection probe substrate having a structure in which tungsten microneedles match the positions of aluminum pads (electrode pads) of a semiconductor chip has been used. However, the number of pads increases as the size of semiconductor chips is reduced and the number of pins is increased, and the pad pitch is also significantly reduced. For this reason, in the probe substrate on which the microneedles made of tungsten are arranged, there is a great restriction on the manufacture of the substrate itself.

Therefore, recently, a socket incorporating a KGD discriminating probe which combines a tape carrier and a micro bump manufacturing technique has been developed. The configuration uses a probe substrate provided with protrusions (provided at positions corresponding to electrode pads of a semiconductor chip) on a substrate provided with fine wiring. A semiconductor chip is sandwiched between the probe substrate and the upper die, and the projections and the electrode pads are positioned to perform a screening test.

[0005]

However, according to the conventional bare chip inspection probe board, the following problems occur when the probe board built-in socket is used. (I) Since the alignment between the projections of the probe substrate and the electrode pads of the semiconductor chip is usually a mechanical alignment of dropping the semiconductor chip into the socket, the semiconductor substrate is taken into consideration from the manufacturing accuracy of the probe substrate and the cutting accuracy of the semiconductor chip. The position of the electrode pads on the chip and the protrusions on the probe substrate are
It may be shifted by about 0 μm. (Ii) When only one projection on the probe board is arranged, if the projection is miniaturized for the purpose of reducing the contact resistance with the electrode pad, when a displacement of several tens of μm occurs, the electrode pad and the projection are completely in contact. May not. Conversely, if the projection is enlarged to ensure the contact between the electrode pad and the projection, the oxide film on the electrode pad cannot be broken through during contact, and the contact resistance increases due to the oxide film. It will be easier.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a substrate capable of surely making electrical contact even when a displacement occurs between an inspection probe substrate and a semiconductor chip and reducing contact resistance. It is in.

[0007]

In order to achieve the above object, the present invention provides a bare chip inspection probe board for selecting bare chips, wherein a wiring pattern is provided at a position facing an electrode pad of a semiconductor chip to be inspected. And a plurality of conductive minute protrusions formed on a part of the wiring pattern and distributed within a connection range with the electrode pad. To provide a probe substrate for bare chip inspection.

[0008]

Embodiments of the present invention will be described below with reference to the drawings. The probe substrate for bare chip inspection according to the present invention is provided with fine wiring using a copper foil and projections using a plating layer on a flexible substrate (insulating substrate) such as a polyimide tape material. The protruding portions serve as electrodes on the probe side, and each comes into contact with an electrode pad of the bare chip. The projection is electrically connected to a predetermined position of the fine wiring, and is connected to the inspection device through the fine wiring. The protrusion is composed of a plurality of minute protrusions, each having an outer diameter set to several tens of μm.

As described above, the bare chip inspection probe substrate of the present invention uses a flexible substrate as the bare chip inspection probe substrate and has a plurality of minute projections, so that a displacement of about several tens of μm can be detected by the probe. Even if it occurs between the substrate and the semiconductor chip, at least some of the minute projections reliably contact the electrode pads of the semiconductor chip. In addition, since each of the minute projections is small, the oxide film on the electrode pad is reliably pierced and comes into contact with the surface of the electrode pad, so that the contact resistance can be significantly reduced. Even if the flexible board has a variation of several tens of μm in the pad height of the semiconductor chip to be contacted, the flexible board itself is deformed according to the unevenness, so that reliable contact is possible.

Next, a method for manufacturing a probe substrate for bare chip inspection according to the present invention will be described. FIG. 1 shows a process of manufacturing a probe substrate for bare chip inspection according to the present invention. [1] As shown in FIG. 1A, a polyimide tape 3 is adhered to a copper foil 1 with an adhesive 2 to prepare a tape carrier material having a three-layer structure.

[2] A positive photoresist is applied to one surface of the copper foil of the tape carrier material obtained in the step (a). Next, a series of photofabrications such as exposure, development, etching, and resist film peeling are performed on the photoresist-coated surface to form a fine wiring pattern 4 as shown in FIG. [3] A positive-type thickening resist is applied on the fine wiring pattern 4, and a resist film 5 is formed as shown in FIG. A plurality of resist openings 6 are formed on the fine wiring pattern 4 at positions corresponding to (not shown). Although the resist opening 6 appears as a single opening in FIG.
As shown in FIG. 2, a plurality of minute apertures (for example,
m) of small apertures 6 _{-1 to} 6 _-13 .

[4] The substrate according to (c) is immersed in an electrolytic nickel plating solution, and as shown in (d), a nickel plating layer 7a is formed in the resist opening 6 so as to have a thickness substantially filling the resist opening 6. Was given. [5] The substrate according to (d) was immersed in a hard gold plating solution to perform electrolytic plating, and a gold plating film 7b was applied to the surface of the nickel plating layer 7a.

[6] As shown in FIG.
The resist film 5 is used to dissolve and remove the fine wiring pattern 4.
The protrusions 8 (a plurality of minute protrusions 8)_-1~ 8_-13Has)
Was formed as shown in FIG. Created in this way
Cut the board to the desired size and place it in the probe socket
Then, a probe substrate for bare chip inspection was completed. FIG.
Shows details of the resist opening 6 according to the present invention. This state
The state is in the step of FIG.
6 shows the shape of the opening 6. One protrusion is a circle
Formed by the fine wiring pattern 4 as shown in FIG.
A resist film 5 is provided on the fine wiring pattern 4.
A plurality of resist openings 6 are provided on the resist film 5.
Have been. Each of the resist openings 6 is distributed and arranged.
Small opening 6_-1~ 6_-13And the process shown in FIG.
When the process is completed, the minute opening 6 _-1~ 6_-13Protrude into each of
Micro projections 8 of raised portion 8_-1~ 8_-13Is formed.

FIG. 3 shows details of the projection 8 according to the present invention. The protruding portion 8 has the thirteen minute openings 6 _-1 to 6 shown in FIG.
6 _-13 , each of which is composed of minute projections 8 _-1 to 8 _-13 . In the step of forming the resist opening 6, a dry film resist may be used instead of the thickening resist described above.

The formation of the projections 8 is not limited to the above-described combination of gold plating / nickel plating, but may be a composite plating film containing a hard powder such as palladium, rhodium, nickel alloy, diamond, or silica. Various combinations can be used.

[0016]

Next, an embodiment of the present invention will be described. First, as shown in FIG.
3 consisting of 12 μm adhesive and 25 μm polyimide tape
A tape carrier material having a layer structure was prepared. Next, a positive photoresist is applied to the copper foil surface, and the positive photoresist (for example, PMER manufactured by Tokyo Ohka Co., Ltd.) is subjected to a series of photofabrications such as exposure, development, etching, and resist stripping. A fine wiring pattern was formed. Further, after applying a positive type thickening resist to a thickness of 20 μm on the fine wiring pattern, exposure and development were performed, and a resist opening was provided on the fine wiring at a position corresponding to the aluminum pad of the chip.

Next, the substrate was immersed in an electrolytic nickel plating solution, and nickel plating having a thickness of about 20 μm was applied to the resist opening. This nickel plating has a thickness that almost completely fills the opening. Next, a gold plating film having a thickness of about 0.5 μm was provided by electrolytic plating on the nickel plating film in the hard gold plating solution. Thereafter, the resist film was dissolved and removed using a dedicated stripping solution. The substrate having the fine wiring pattern with the protrusions formed in this manner is cut into an appropriate size. This was set in a probe socket, and a probe substrate for bare chip inspection was completed. It was confirmed that the probe substrate for bare chip inspection completed in this way achieved the object of the present invention.

According to the study by the present inventors, a preferable result was obtained when one of the minute projections 8 _-1 to 8 _-13 of the projection 8 had a diameter of about 100 μm or less. If the diameter is larger than this, the contact force to the electrode pad will be weaker,
In some cases, the oxide film on the electrode pad could not be destroyed.

[0019]

As is apparent from the above description, according to the present invention, since the projections in contact with the electrode pads of the semiconductor chip are constituted by a plurality of dispersed small projections, the positional displacement between the probe substrate and the chip is reduced. Can be surely brought into contact with each other. Since the minute projection can surely break through the oxide film on the electrode pad, the contact resistance can be significantly reduced.

Further, by using a flexible substrate as the insulating substrate, even if the height of the electrode pads of the semiconductor chip to be contacted varies, the flexible substrate is deformed in accordance with the unevenness of the electrode pads. Will be possible.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram showing a manufacturing process of a probe substrate for bare chip inspection according to the present invention.

FIG. 2 is a plan view showing details of a resist opening according to the present invention.

FIG. 3 is a plan view showing details of a protrusion according to the present invention.

[Explanation of symbols]

Reference Signs List 1 copper foil 2 adhesive 3 polyimide tape 4 fine wiring pattern 5 resist film 6 resist opening 6 _{-1 to} 6 _-13 minute opening 7a nickel plating layer 7b gold plating layer 8 protrusion 8 _-1 to 8 _-13 minute projection

Continued on the front page F-term (reference) 2G003 AG03 AG08 AG12 2G011 AA16 AB06 AC14 AE03 AE11 4M106 AA02 AD01 AD08 AD09 AD26 BA01 DD23

Claims (2)

[Claims] 1. A bare chip inspection probe substrate for selecting bare chips, comprising: an insulating substrate having a part of a wiring pattern formed at a position facing an electrode pad of a semiconductor chip to be inspected; And a plurality of conductive minute projections dispersed in a connection range with the electrode pad. 2. The probe substrate according to claim 1, wherein the insulating substrate is a flexible substrate.